JP2009176791A5 - - Google Patents

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Publication number
JP2009176791A5
JP2009176791A5 JP2008011072A JP2008011072A JP2009176791A5 JP 2009176791 A5 JP2009176791 A5 JP 2009176791A5 JP 2008011072 A JP2008011072 A JP 2008011072A JP 2008011072 A JP2008011072 A JP 2008011072A JP 2009176791 A5 JP2009176791 A5 JP 2009176791A5
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JP
Japan
Prior art keywords
base material
hole
recess
forming
wiring board
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2008011072A
Other languages
English (en)
Japanese (ja)
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JP2009176791A (ja
JP5138395B2 (ja
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Publication date
Application filed filed Critical
Priority to JP2008011072A priority Critical patent/JP5138395B2/ja
Priority claimed from JP2008011072A external-priority patent/JP5138395B2/ja
Priority to US12/349,780 priority patent/US8119932B2/en
Publication of JP2009176791A publication Critical patent/JP2009176791A/ja
Publication of JP2009176791A5 publication Critical patent/JP2009176791A5/ja
Application granted granted Critical
Publication of JP5138395B2 publication Critical patent/JP5138395B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2008011072A 2008-01-22 2008-01-22 配線基板及びその製造方法 Expired - Fee Related JP5138395B2 (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2008011072A JP5138395B2 (ja) 2008-01-22 2008-01-22 配線基板及びその製造方法
US12/349,780 US8119932B2 (en) 2008-01-22 2009-01-07 Wiring board and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2008011072A JP5138395B2 (ja) 2008-01-22 2008-01-22 配線基板及びその製造方法

Publications (3)

Publication Number Publication Date
JP2009176791A JP2009176791A (ja) 2009-08-06
JP2009176791A5 true JP2009176791A5 (enExample) 2010-12-24
JP5138395B2 JP5138395B2 (ja) 2013-02-06

Family

ID=40875538

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008011072A Expired - Fee Related JP5138395B2 (ja) 2008-01-22 2008-01-22 配線基板及びその製造方法

Country Status (2)

Country Link
US (1) US8119932B2 (enExample)
JP (1) JP5138395B2 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5077324B2 (ja) 2009-10-26 2012-11-21 株式会社デンソー 配線基板
JP5452443B2 (ja) * 2009-10-27 2014-03-26 パナソニック株式会社 導体パターン形成基材
US9420707B2 (en) * 2009-12-17 2016-08-16 Intel Corporation Substrate for integrated circuit devices including multi-layer glass core and methods of making the same
US8207453B2 (en) 2009-12-17 2012-06-26 Intel Corporation Glass core substrate for integrated circuit devices and methods of making the same
KR20130072608A (ko) * 2011-12-22 2013-07-02 삼성전자주식회사 디스플레이 장치
US9445496B2 (en) 2012-03-07 2016-09-13 Intel Corporation Glass clad microelectronic substrate
JP6030351B2 (ja) * 2012-06-22 2016-11-24 京セラ株式会社 配線基板および電子装置
US9001520B2 (en) 2012-09-24 2015-04-07 Intel Corporation Microelectronic structures having laminated or embedded glass routing structures for high density packaging
JP2014179430A (ja) * 2013-03-14 2014-09-25 Ibiden Co Ltd 半導体素子搭載用多層プリント配線板
KR101607981B1 (ko) * 2013-11-04 2016-03-31 앰코 테크놀로지 코리아 주식회사 반도체 패키지용 인터포저 및 이의 제조 방법, 제조된 인터포저를 이용한 반도체 패키지
JP2015185754A (ja) * 2014-03-25 2015-10-22 株式会社東芝 半導体装置
CN109803481B (zh) * 2017-11-17 2021-07-06 英业达科技有限公司 多层印刷电路板及制作多层印刷电路板的方法
JP2020188209A (ja) * 2019-05-16 2020-11-19 イビデン株式会社 プリント配線板とプリント配線板の製造方法
CN112954889A (zh) * 2021-01-20 2021-06-11 江门崇达电路技术有限公司 一种沉铜工艺测试板及其制作方法
US11881461B2 (en) * 2021-09-30 2024-01-23 Texas Instruments Incorporated Electric field control for bond pads in semiconductor device package
US20230197592A1 (en) * 2021-12-16 2023-06-22 Intel Corporation Power delivery techniques for glass substrate with high density signal vias
JP2025147138A (ja) * 2024-03-22 2025-10-06 サミー株式会社 遊技機

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4211603A (en) * 1978-05-01 1980-07-08 Tektronix, Inc. Multilayer circuit board construction and method
JPH01119096A (ja) * 1987-10-31 1989-05-11 Mitsumi Electric Co Ltd シールド板内蔵の回路基板
US5142775A (en) * 1990-10-30 1992-09-01 International Business Machines Corporation Bondable via
US5224265A (en) * 1991-10-29 1993-07-06 International Business Machines Corporation Fabrication of discrete thin film wiring structures
US5949030A (en) * 1997-11-14 1999-09-07 International Business Machines Corporation Vias and method for making the same in organic board and chip carriers
US8278738B2 (en) 2005-02-17 2012-10-02 Sharp Kabushiki Kaisha Method of producing semiconductor device and semiconductor device
JP3880602B2 (ja) 2005-02-17 2007-02-14 シャープ株式会社 半導体装置の製造方法、半導体装置
JP4879536B2 (ja) * 2005-09-13 2012-02-22 株式会社フジクラ 複合基板及びその製造方法、並びに電子装置
JP5105736B2 (ja) * 2005-10-31 2012-12-26 株式会社東芝 プリント回路板、電子機器、およびプリント回路板の製造方法
US7906404B2 (en) * 2008-11-21 2011-03-15 Teledyne Scientific & Imaging, Llc Power distribution for CMOS circuits using in-substrate decoupling capacitors and back side metal layers

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