JP2009110991A - 半導体装置及びその製造方法 - Google Patents
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Abstract
【解決手段】貫通孔を有する第1フィルム101及び第2フィルム103を互いに貫通孔の開口が大きい面101a、103aを向かい合せて、その真ん中にはんだボール102を載置し、半導体素子104の電極106と回路基板100の電極105をそれぞれ第1フィルム及び第2フィルムの貫通孔の開口小さい面101b、103bを位置合わせ、真空で加圧及び加熱により、半導体素子、フィルム、回路基板が互いに接着すると同時に、はんだボールを介して、半導体素子の電極と回路基板の電極が電気的に接続される。
【選択図】図3
Description
12 フィルム
13 マスク
14 炭酸ガスレーザ
15 テーパ状の貫通孔
16 金メッキ板
17 ポジレジスト膜
18 樹脂フィルム
100 回路基板
101 第1フィルム
101a 第1フィルムの表面側の第1開口
101b 第1フィルムの裏面側の第2開口
102 はんだボール
103 第2フィルム
103a 第2フィルムの表面側の第3開口
103b 第2フィルムの裏面側の第4開口
104 半導体素子
105 基板電極
106 半導体素子電極
201 第1フィルム
201a 第1フィルムの表面側の第1開口
201b 第1フィルムの裏面側の第2開口
202 はんだボール
203 第2フィルム
203a 第2フィルムの表面側の第3開口
203b 第2フィルムの裏面側の第4開口
204 半導体素子
205 基板電極
206 半導体素子電極
301 第1フィルム
301a 第1フィルムの表面側の第1開口
301b 第1フィルムの裏面側の第2開口
302 はんだボール
303 第2フィルム
303a 第2フィルムの表面側の第3開口
303b 第2フィルムの裏面側の第4開口
304 半導体素子
305 基板電極
306 半導体素子電極
307 導電ペースト
Claims (7)
- 第1基板上に第1電極を形成する工程と、
第2基板上に第2電極を形成する工程と、
第1フィルムに、該第1フィルムの表面側の第1開口が、裏面側の第2開口よりも大きい第1貫通孔を形成する工程と、
第2フィルムに、該第2フィルムの表面側の第3開口が、裏面側の第4開口よりも大きい第2貫通孔を形成する工程と、
前記第1フィルムの前記第1開口上に、はんだボールを載置する工程と、
前記はんだボールを介して、前記第1フィルム上に前記第2フィルムを配置し、該第1フィルムの前記第1開口と、該第2フィルムの前記第3開口との位置合わせを行う工程と、
前記第1基板の前記第1電極と、前記第1フィルムの前記第2開口との位置合わせを行う工程と、
前記第2基板の前記第2電極と、前記第2フィルムの前記第4開口との位置合わせを行う工程と、
前記はんだボールを加熱溶融して、前記第1電極と前記第2電極とを電気的に接続する工程と
を含むことを特徴とする回路基板の製造方法。 - 前記加熱工程を行う前に、前記第2フィルムの貫通孔に更に導電ペーストを充填することを特徴とする請求項1記載の回路基板の製造方法。
- 前記第1フィルム及び第2フィルムは、熱可塑フィルム、熱融着フィルム、または熱硬化性フィルムであることを特徴とする請求項1又は2記載の回路基板の製造方法。
- 前記はんだボールは、SnAg、SnIn、SnBi、SuAg及びSuAgCuを含むはんだペーストで形成されたことを特徴とする請求項1〜3のいずれか一項に記載の回路基板の製造方法。
- 前記加熱溶融工程を行う前、又は後、又は同時に、前記第1フィルムと前記第2フィルムを加圧することを特徴とする請求項1〜4のいずれか一項記載の回路基板の製造方法。
- 基板上に第1電極を形成する工程と、
半導体素子上に第2電極を形成する工程と、
第1フィルムに、該第1フィルムの表面側の第1開口が、裏面側の第2開口よりも大きい第1貫通孔を形成する工程と、
第2フィルムに、該第2フィルムの表面側の第3開口が、裏面側の第4開口よりも大きい第2貫通孔を形成する工程と、
前記第1フィルムの前記第1開口上に、はんだボールを載置する工程と、
前記はんだボールを介して、前記第1フィルム上に前記第2フィルムを配置し、該第1フィルムの前記第1開口と、該第2フィルムの前記第3開口との位置合わせを行う工程と、
前記基板上に形成された前記第1電極と、前記第1フィルムの前記第2開口との位置合わせを行う工程と、
前記半導体素子に形成された前記第2電極と、前記第2フィルムの前記第4開口との位置合わせを行う工程と、
前記はんだボールを加熱溶融して、前記第1電極と前記第2電極とを電気的に接続する工程と
を含むことを特徴とする回路基板の製造方法。 - 第1電極を有する基板と、
前記基板上に配置され、前記第1電極と位置合わせる裏面側の第1開口が、表面側の第2開口よりも小さい第1貫通孔を有する第1フィルムと、
前記第1フィルムの前記第2開口上に載置されるはんだと、
前記はんだを介して、前記第1フィルムの前記第2開口と位置合わせる表面側の第3開口が、裏面側の第4開口よりも大きい第2貫通孔を有する第2フィルムと、
前記第2のフィルム上に配置され、前記第2のフィルムの第4開口と位置合わせる第2電極を有する半導体素子と、
を有することを特徴とする回路基板。
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Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8237279B2 (en) | 2010-09-10 | 2012-08-07 | International Business Machines Corporation | Collar structure around solder balls that connect semiconductor die to semiconductor chip package substrate |
JP2012204570A (ja) * | 2011-03-25 | 2012-10-22 | Hitachi Plant Technologies Ltd | プリント基板の製造装置および製造方法 |
WO2016094721A1 (en) * | 2014-12-12 | 2016-06-16 | Qualcomm Incorporated | Integrated device package comprising photo sensitive fill between a substrate and a die |
Citations (5)
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JPH07245327A (ja) * | 1994-03-07 | 1995-09-19 | Fujitsu Ltd | 薄膜コネクタとそれを用いた半導体チップの実装方法 |
JPH11330160A (ja) * | 1998-05-14 | 1999-11-30 | Sumitomo Bakelite Co Ltd | 導電性ボール配列シートおよび導電性ボール配列シート製造装置 |
JP2001185577A (ja) * | 1999-12-24 | 2001-07-06 | Hitachi Ltd | 電子機器 |
JP2007122965A (ja) * | 2005-10-26 | 2007-05-17 | Lintec Corp | 導電接合シート用の絶縁シート、導電接合シート、導電接合シートの製造方法および電子複合部品の製造方法 |
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Cited By (4)
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US8237279B2 (en) | 2010-09-10 | 2012-08-07 | International Business Machines Corporation | Collar structure around solder balls that connect semiconductor die to semiconductor chip package substrate |
JP2012204570A (ja) * | 2011-03-25 | 2012-10-22 | Hitachi Plant Technologies Ltd | プリント基板の製造装置および製造方法 |
WO2016094721A1 (en) * | 2014-12-12 | 2016-06-16 | Qualcomm Incorporated | Integrated device package comprising photo sensitive fill between a substrate and a die |
US10037941B2 (en) | 2014-12-12 | 2018-07-31 | Qualcomm Incorporated | Integrated device package comprising photo sensitive fill between a substrate and a die |
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