JP2009087712A - 導体ペーストおよび厚膜回路用基板 - Google Patents
導体ペーストおよび厚膜回路用基板 Download PDFInfo
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- JP2009087712A JP2009087712A JP2007255652A JP2007255652A JP2009087712A JP 2009087712 A JP2009087712 A JP 2009087712A JP 2007255652 A JP2007255652 A JP 2007255652A JP 2007255652 A JP2007255652 A JP 2007255652A JP 2009087712 A JP2009087712 A JP 2009087712A
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- Prior art keywords
- conductor
- paste
- silicon nitride
- thick film
- powder
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
Landscapes
- Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
- Conductive Materials (AREA)
- Parts Printed On Printed Circuit Boards (AREA)
Abstract
【解決手段】 貫通導体10を形成するための導電ペーストは、焼成収縮率が35(%)以下と小さい銀粉末が用いられると共に、これに窒化珪素粉末が添加されていることから、高い導電性を確保しつつ焼成収縮が抑制される。そのため、酸化雰囲気中で焼成処理が施されることにより、サーマルビアとしても配線接続用としても用い得る貫通導体10が得られる。
【選択図】図1
Description
Claims (5)
- セラミック基板に設けられた貫通孔に充填して焼成するための導体ペーストであって、
焼成収縮率が35(%)以下の銀粉末と、
窒化珪素粉末と
を、含むことを特徴とする導体ペースト。 - 前記銀粉末はアトマイズ法で製造したものである請求項1の導体ペースト。
- 前記銀粉末は1乃至5(μm)の平均粒径を有するものである請求項1または請求項2の導体ペースト。
- 前記窒化珪素粉末はペースト全体に対する質量割合で2.5乃至10(%)の範囲で含まれるものである請求項1乃至請求項3の何れか1項に記載の導体ペースト。
- 貫通孔を有するセラミック基板と、
前記貫通孔内に充填された前記請求項1乃至請求項4の何れか1項に記載の導体ペーストから酸化雰囲気で焼成されることによって生成された貫通導体と
を、含むことを特徴とする厚膜回路用基板。
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007255652A JP4933998B2 (ja) | 2007-09-28 | 2007-09-28 | 導体ペーストおよび厚膜回路用基板 |
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---|---|---|---|
JP2007255652A JP4933998B2 (ja) | 2007-09-28 | 2007-09-28 | 導体ペーストおよび厚膜回路用基板 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009087712A true JP2009087712A (ja) | 2009-04-23 |
JP4933998B2 JP4933998B2 (ja) | 2012-05-16 |
Family
ID=40660875
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Application Number | Title | Priority Date | Filing Date |
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JP2007255652A Expired - Fee Related JP4933998B2 (ja) | 2007-09-28 | 2007-09-28 | 導体ペーストおよび厚膜回路用基板 |
Country Status (1)
Country | Link |
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JP (1) | JP4933998B2 (ja) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011142162A (ja) * | 2010-01-06 | 2011-07-21 | Daikin Industries Ltd | パワーモジュール、電力変換装置、及び冷凍装置 |
JP2011192762A (ja) * | 2010-03-15 | 2011-09-29 | Daikin Industries Ltd | パワーモジュール |
WO2012052191A1 (de) * | 2010-10-20 | 2012-04-26 | Robert Bosch Gmbh | Ausgangswerkstoff und verfahren zur herstellung einer sinterverbindung |
US20130038983A1 (en) * | 2011-08-10 | 2013-02-14 | Samsung Electro-Mechanics Co., Ltd. | Conductive paste for internal electrode of multilayer ceramic electronic component and multilayer ceramic electronic component using the same |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10135630A (ja) * | 1996-10-31 | 1998-05-22 | Sumitomo Kinzoku Electro Device:Kk | 厚膜配線基板における貫通孔へのペーストの充填方法 |
JPH11163487A (ja) * | 1997-12-02 | 1999-06-18 | Dai Ichi Kogyo Seiyaku Co Ltd | セラミック多層回路基板用導電ペースト |
-
2007
- 2007-09-28 JP JP2007255652A patent/JP4933998B2/ja not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH10135630A (ja) * | 1996-10-31 | 1998-05-22 | Sumitomo Kinzoku Electro Device:Kk | 厚膜配線基板における貫通孔へのペーストの充填方法 |
JPH11163487A (ja) * | 1997-12-02 | 1999-06-18 | Dai Ichi Kogyo Seiyaku Co Ltd | セラミック多層回路基板用導電ペースト |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2011142162A (ja) * | 2010-01-06 | 2011-07-21 | Daikin Industries Ltd | パワーモジュール、電力変換装置、及び冷凍装置 |
JP2011192762A (ja) * | 2010-03-15 | 2011-09-29 | Daikin Industries Ltd | パワーモジュール |
WO2012052191A1 (de) * | 2010-10-20 | 2012-04-26 | Robert Bosch Gmbh | Ausgangswerkstoff und verfahren zur herstellung einer sinterverbindung |
US20130038983A1 (en) * | 2011-08-10 | 2013-02-14 | Samsung Electro-Mechanics Co., Ltd. | Conductive paste for internal electrode of multilayer ceramic electronic component and multilayer ceramic electronic component using the same |
Also Published As
Publication number | Publication date |
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JP4933998B2 (ja) | 2012-05-16 |
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