JP2009016383A - パッケージドデバイスおよびパッケージドデバイス製造方法 - Google Patents
パッケージドデバイスおよびパッケージドデバイス製造方法 Download PDFInfo
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- JP2009016383A JP2009016383A JP2007173077A JP2007173077A JP2009016383A JP 2009016383 A JP2009016383 A JP 2009016383A JP 2007173077 A JP2007173077 A JP 2007173077A JP 2007173077 A JP2007173077 A JP 2007173077A JP 2009016383 A JP2009016383 A JP 2009016383A
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- H01L23/053—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body
- H01L23/055—Containers; Seals characterised by the shape of the container or parts, e.g. caps, walls the container being a hollow construction and having an insulating or insulated base as a mounting for the semiconductor body the leads having a passage through the base
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- B81—MICROSTRUCTURAL TECHNOLOGY
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Abstract
【解決手段】本発明のパッケージドデバイスX1は、密閉された内部スペース20aを規定する内表面21a,22aを有するパッケージ20と、パッケージ20に固定されているデバイスチップ10と、パッケージ20の内表面21a,22aの少なくとも一部および/またはデバイスチップ10の表面の少なくとも一部を覆うパリレン膜30とを備える。本発明の製造方法は、電極パッド23が設けられているパッケージ本体21に対してデバイスチップ10を搭載する工程と、デバイスチップ10および電極パッド23を配線部品26によって電気的に接続する工程と、パッケージ本体21の凹部20a’内にパリレン30を蒸着させる工程と、凹部20a’を閉じるための蓋体22およびパッケージ本体21を接合する工程とを含む。
【選択図】図3
Description
前記内部スペース内にて前記パッケージに固定されているデバイスチップと、
前記パッケージの前記内表面の少なくとも一部、および/または、前記デバイスチップの表面の少なくとも一部、を覆うパリレン膜と、を備えるパッケージドデバイス。
(付記2)前記内部スペース内に配設された電子部品を更に備え、前記パリレン膜は、更に当該電子部品の表面の少なくとも一部を覆う、付記1に記載のパッケージドデバイス。
(付記3)前記デバイスチップには、固定部および可動部を有するマイクロ可動素子が作り込まれている、付記1または2に記載のパッケージドデバイス。
(付記4)前記パッケージは、凹部を有するパッケージ本体と、前記凹部を閉じるための蓋体とを含み、前記蓋体は光学ガラス板を含む、付記1から3のいずれか一つに記載のパッケージドデバイス。
(付記5)前記光学ガラス板における前記内表面はパリレン膜によって覆われていない、付記4に記載のパッケージドデバイス。
(付記6)前記光学ガラス板における前記内表面の全体がパリレン膜によって覆われている、付記4に記載のパッケージドデバイス。
(付記7)前記パリレン膜は、更に前記パッケージの外表面の少なくとも一部を覆う、付記1から6のいずれか一つに記載のパッケージドデバイス。
(付記8)凹部を有し且つ当該凹部内に電極パッドが設けられているパッケージ本体に対し、前記凹部にてデバイスチップを搭載する搭載工程と、
前記デバイスチップおよび前記電極パッドを配線部品によって電気的に接続する工程と、
前記パッケージ本体の前記凹部内にパリレンを蒸着させる被覆工程と、
前記凹部を閉じるための蓋体および前記パッケージ本体を接合する接合工程と、を含むパッケージドデバイス製造方法。
(付記9)前記搭載工程にて前記パッケージ本体に搭載される前記デバイスチップには、固定部と、可動部と、当該固定部および当該可動部を連結する一時的支持部とを有するマイクロ可動素子が作り込まれており、
前記被覆工程よりも後であって前記接合工程よりも前に、前記マイクロ可動素子における前記一時的支持部を切断するための切断工程を更に含む、付記8に記載のパッケージドデバイス製造方法。
(付記10)前記搭載工程にて前記パッケージ本体に搭載される前記デバイスチップには、固定部と、可動部と、当該固定部および当該可動部を連結する一時的支持部とを有するマイクロ可動素子が作り込まれており、
前記搭載工程よりも後であって前記被覆工程よりも前において、前記マイクロ可動素子における前記一時的支持部を切断するための切断工程を更に含む、付記8に記載のパッケージドデバイス製造方法。
(付記11)凹部を有し且つ当該凹部内に電極パッドが設けられているパッケージ本体における前記凹部内にパリレンを蒸着させる工程と、
前記電極パッド上からパリレンを除去する工程と、
前記パッケージ本体に対し、前記凹部にてデバイスチップを搭載する搭載工程と、
前記デバイスチップおよび前記電極パッドを配線部品によって電気的に接続する接続工程と、
前記凹部を閉じるための蓋体および前記パッケージ本体を接合する接合工程と、を含むパッケージドデバイス製造方法。
(付記12)前記接続工程よりも後であって前記接合工程よりも前において、前記パッケージ本体の前記凹部内にパリレンを蒸着させる工程を更に含む、付記11に記載のパッケージドデバイス製造方法。
(付記13)前記搭載工程にて前記パッケージ本体に搭載される前記デバイスチップには、固定部と、可動部と、当該固定部および当該可動部を連結する一時的支持部とを有するマイクロ可動素子が作り込まれており、
前記搭載工程から前記接合工程までの間において、前記マイクロ可動素子における前記一時的支持部を切断するための切断工程を更に含む、付記11または12に記載のパッケージドデバイス製造方法。
(付記14)前記接合工程よりも前において、前記蓋体の表面の少なくとも一部にパリレンを蒸着させる工程を更に含む、付記8から13のいずれか一つに記載のパッケージドデバイス製造方法。
11 ベース基板
12 ミラー基板
13,23,24 電極パッド
20 パッケージ
20a 内部スペース
21,22 パッケージング部材
21a,22a 内表面
26 配線
30 パリレン膜
41,42,44 レーザビーム
Claims (7)
- 密閉された内部スペースを規定する内表面を有するパッケージと、
前記内部スペース内にて前記パッケージに固定されているデバイスチップと、
前記パッケージの前記内表面の少なくとも一部、および/または、前記デバイスチップの表面の少なくとも一部、を覆うパリレン膜と、を備えるパッケージドデバイス。 - 前記内部スペース内に配設された電子部品を更に備え、前記パリレン膜は、更に当該電子部品の表面の少なくとも一部を覆う、請求項1に記載のパッケージドデバイス。
- 前記デバイスチップには、固定部および可動部を有するマイクロ可動素子が作り込まれている、請求項1または2に記載のパッケージドデバイス。
- 前記パッケージは、凹部を有するパッケージ本体と、前記凹部を閉じるための蓋体とを含み、当該蓋体は光学ガラス板を含む、請求項1から3のいずれか一つに記載のパッケージドデバイス。
- 凹部を有し且つ当該凹部内に電極パッドが設けられているパッケージ本体に対し、前記凹部にてデバイスチップを搭載する搭載工程と、
前記デバイスチップおよび前記電極パッドを配線部品によって電気的に接続する工程と、
前記パッケージ本体の前記凹部内にパリレンを蒸着させる被覆工程と、
前記凹部を閉じるための蓋体および前記パッケージ本体を接合する接合工程と、を含むパッケージドデバイス製造方法。 - 凹部を有し且つ当該凹部内に電極パッドが設けられているパッケージ本体における前記凹部内にパリレンを蒸着させる工程と、
前記電極パッド上からパリレンを除去する工程と、
前記パッケージ本体に対し、前記凹部にてデバイスチップを搭載する搭載工程と、
前記デバイスチップおよび前記電極パッドを配線部品によって電気的に接続する接続工程と、
前記凹部を閉じるための蓋体および前記パッケージ本体を接合する接合工程と、を含むパッケージドデバイス製造方法。 - 前記接続工程よりも後であって前記接合工程よりも前において、前記パッケージ本体の前記凹部内にパリレンを蒸着させる工程を更に含む、請求項6に記載のパッケージドデバイス製造方法。
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US12/164,670 US7906822B2 (en) | 2007-06-29 | 2008-06-30 | Packaged device and method of manufacturing the same |
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