JP2008530808A - 青色感度の高い光感応性素子、光感応性素子の製造方法、および、光感応性素子の駆動方法 - Google Patents
青色感度の高い光感応性素子、光感応性素子の製造方法、および、光感応性素子の駆動方法 Download PDFInfo
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Abstract
Description
Claims (34)
- 低濃度にドープされた半導体基板(SU)と、該半導体基板上に配置された絶縁層(IS)と、該絶縁層内に設けられた光入射窓(LF)と、光入射窓の領域内の半導体基板に第2の導電型のドープ物質でドープされた基板ウェル(SW)と、半導体基板の表面の少なくとも光入射窓にかかる領域に配置されたエピタキシ層(ES)とを含むボディを備えた光感応性素子において、
エピタキシ層は少なくとも上方の層領域では第1の導電型のドープ物質によって高濃度にドープされており、エピタキシ層とウェルドープ領域との半導体接合領域(UE)が設けられており、高濃度にドープされたエピタキシ層の層厚さは80nm未満である
ことを特徴とする光感応性素子。 - エピタキシ層(ES)は表面電荷密度が6.6×1011cm−2より大きいドープ量を有している、請求項1記載の素子。
- 半導体接合領域(UE)の周囲の空乏領域の厚さは50nmより大きい、請求項1または2記載の素子。
- 半導体基板(SU)およびエピタキシ層(ES)は相互に独立にSi,SiGeまたはGeのうち少なくとも1つの半導体を含む、請求項1から3までのいずれか1項記載の素子。
- 基板ウェルの下方の半導体基板(SU)内に第2の導電型のドープ物質によって高濃度にドープされた埋め込み層(VS)が配置されている、請求項1から4までのいずれか1項記載の素子。
- 光入射窓(LF)の下方に位置する領域の外側に第2の導電型のドープ物質によって高濃度にドープされた端子領域がボディの表面に達するように設けられており、該端子領域は埋め込み層(VS)と表面のコンタクトとを低オームに接続する、請求項5記載の素子。
- 半導体基板(SU)は第1の導電型の基本ドープ量を有する、請求項1から6までのいずれか1項記載の素子。
- エピタキシ層は半導体基板の方向すなわち下方へ向かって低下するドープグラジエントを有する、請求項1から7までのいずれか1項記載の素子。
- エピタキシ層は半導体基板の方向すなわち下方へ向かってゲルマニウム含量の増大するSiGeから成る、請求項1から7までのいずれか1項記載の素子。
- 半導体基板(SU)とエピタキシ層(ES)とのあいだ、光入射窓(LF)の外側に絶縁層が配置されており、光入射窓の外側の絶縁層上方のエピタキシ層(ES)が光入射窓の領域よりも高いドープ量を有するかまたは高濃度にドープされた層に直接に接触しており、光入射窓の外側に第2のコンタクトがエピタキシ層に対する端子として設けられており、光が入射すると半導体基板の高濃度にドープされた端子領域に接続された第1のコンタクトと第2のコンタクトとのあいだを流れる光電流が測定される、請求項6から9までのいずれか1項記載の素子。
- 高濃度にドープされた埋め込み層(VS)のドープ部は条片状または格子状に形成されている、請求項5から10までのいずれか1項記載の素子。
- 条片状に形成された埋め込み層(VS)のドープ部は端子領域への低オームの接続が形成されるように調整されている、請求項11記載の素子。
- エピタキシ層、基板ウェルまたは端子領域に対する1つずつのコンタクトのほか、さらに別の基板コンタクトが低濃度にドープされた半導体基板に設けられる、請求項1から12までのいずれか1項記載の素子。
- エピタキシ層(ES)の上方の光入射窓(LF)の縁領域にエミッタ構造体(EM)が配置されている、請求項1から9までのいずれか1項記載の素子。
- エミッタ構造体(EM)は光入射窓(LF)の上方の中央部または光入射窓(LF)の縁部にリング状に閉じた形態で配置され、第2の導電型のドープ物質によってドープされたポリシリコンを含む、請求項14記載の素子。
- エミッタ構造体(EM)に第2のコンタクトが設けられており、光が入射すると半導体基板の高濃度にドープされた端子領域に接続された第1のコンタクトと第2のコンタクトとのあいだを流れる光電流が測定される、請求項14または15記載の素子。
- エミッタ構造体(EM)と基板ウェルまたは埋め込み層とのあいだにバイアス電圧が印加される、請求項14から16までのいずれか1項記載の素子。
- エピタキシ層(ES)と基板ウェルまたは埋め込み層(VS)とのあいだにバイアス電圧が印加される、請求項1から13までのいずれか1項記載の素子。
- 基板ウェルまたは埋め込み層(VS)と基板の第2のコンタクトとのあいだにバイアス電圧が印加される、請求項18記載の素子。
- 高濃度にドープされたエピタキシ層(ES)の層厚さは50nm以下である、請求項1から15までのいずれか1項記載の素子。
- 素子の光入射側に反射防止コーティングが設けられている、請求項1から16までのいずれか1項記載の素子。
- 半導体ボディおよびエピタキシ層はともにPIN構造またはNIP構造を有する、請求項1から17までのいずれか1項記載の素子。
- PIN構造またはNIP構造の真性層の厚さは、検出すべき波長の全ての光量子が真性層の内部で吸収されるように選定されている、請求項18記載の素子。
- 請求項1から23までのいずれか1項記載の光感応性素子の製造方法において、
共通のウェハ上に並行して光感応性素子およびバイポーラトランジスタを形成し、ここでバイポーラトランジスタの製造に対して付加的なマスクステップが不要となるようにマスクステップを適合化する
ことを特徴とする光感応性素子の製造方法。 - バイポーラトランジスタおよび光感応性素子をエピタキシ層(ES)の形成まで同時に形成する、請求項24記載の方法。
- 光感応性素子のエミッタ構造体のパターニングとバイポーラトランジスタのトランジスタ領域の外側のエピタキシ層のパターニングとを共通のパターニングステップにより行う、請求項24または25記載の方法。
- バイポーラトランジスタのエミッタおよびフォトトランジスタのエミッタ構造体をパターニングするためのマスク(EPM,EM)を、エピタキシ層(ES)を高濃度にドープするためのインプランテーションマスクとして用いる、請求項24から26までのいずれか1項記載の方法。
- 半導体基板内に条片状または格子状のドープ部の形態の埋め込み層を形成し、該埋め込み層の上方の半導体基板に相応のマスクを介したインプランテーションを行って同じ条片状または格子状のドープ部を備えた基板ウェルを形成する、請求項24から27までのいずれか1項記載の方法。
- 請求項1から13および18から23までのいずれか1項記載の光感応性素子をフォトダイオードとして駆動する、
光感応性素子の駆動方法において、
エピタキシ層、基板ウェルまたは端子領域に相応する第1のコンタクトおよび第2のコンタクトにバイアス電圧を印加する
ことを特徴とする光感応性素子の駆動方法。 - 基板コンタクトをエピタキシ層と同じ電位に接続する、請求項29記載の方法。
- 請求項1から13および18から23までのいずれか1項記載の光感応性素子をアバランシェフォトダイオードとして駆動する、
光感応性素子の駆動方法において、
エピタキシ層および基板に相応する第1のコンタクトおよび第2のコンタクトにバイアス電圧を印加して光入射の際のアバランシェ効果を支援する
ことを特徴とする光感応性素子の駆動方法。 - 請求項1から23までのいずれか1項記載の光感応性素子をフォトトランジスタとして駆動する、
光感応性素子の駆動方法において、
基板とエミッタ構造体とのあいだにバイアス電圧を印加する
ことを特徴とする光感応性素子の駆動方法。 - 請求項1から18までのいずれか1項記載の光感応性素子を迅速かつ高感度の短波長可視光の検出に用いることを特徴とする光感応性素子の使用。
- 請求項1から19までのいずれか1項記載の光感応性素子を青色発光ダイオードと組み合わせて光検出および光学符号化されたデータの読み取りに用いることを特徴とする光感応性素子の使用。
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JP2016538713A (ja) * | 2013-10-17 | 2016-12-08 | マイクロン テクノロジー, インク. | 欠陥の少ないエピタキシャルフォトニックデバイスを提供する方法およびその結果生じる構造 |
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DE102005025937A1 (de) | 2006-08-24 |
US8227882B2 (en) | 2012-07-24 |
JP4829255B2 (ja) | 2011-12-07 |
KR20070104422A (ko) | 2007-10-25 |
GB2436756A (en) | 2007-10-03 |
KR100977199B1 (ko) | 2010-08-20 |
WO2006087096A1 (de) | 2006-08-24 |
DE102005025937B4 (de) | 2009-11-26 |
GB0711455D0 (en) | 2007-07-25 |
US20080277749A1 (en) | 2008-11-13 |
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