JP2008529296A - 半導体デバイスの製造方法 - Google Patents
半導体デバイスの製造方法 Download PDFInfo
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- JP2008529296A JP2008529296A JP2007552788A JP2007552788A JP2008529296A JP 2008529296 A JP2008529296 A JP 2008529296A JP 2007552788 A JP2007552788 A JP 2007552788A JP 2007552788 A JP2007552788 A JP 2007552788A JP 2008529296 A JP2008529296 A JP 2008529296A
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 61
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 48
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- 238000000034 method Methods 0.000 claims abstract description 69
- 239000000463 material Substances 0.000 claims abstract description 38
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- 230000008569 process Effects 0.000 claims description 36
- 239000003989 dielectric material Substances 0.000 claims description 32
- 239000004020 conductor Substances 0.000 claims description 28
- 238000005229 chemical vapour deposition Methods 0.000 claims description 17
- 230000004888 barrier function Effects 0.000 claims description 14
- 230000015572 biosynthetic process Effects 0.000 claims description 10
- 238000005530 etching Methods 0.000 claims description 9
- 239000013590 bulk material Substances 0.000 claims description 2
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- 239000011148 porous material Substances 0.000 description 7
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- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 description 4
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- CZDYPVPMEAXLPK-UHFFFAOYSA-N tetramethylsilane Chemical compound C[Si](C)(C)C CZDYPVPMEAXLPK-UHFFFAOYSA-N 0.000 description 2
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- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
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- 125000005375 organosiloxane group Chemical group 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- -1 tetra-alkylsilane Chemical compound 0.000 description 1
- 238000001029 thermal curing Methods 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
- UHUUYVZLXJHWDV-UHFFFAOYSA-N trimethyl(methylsilyloxy)silane Chemical compound C[SiH2]O[Si](C)(C)C UHUUYVZLXJHWDV-UHFFFAOYSA-N 0.000 description 1
- PQDJYEQOELDLCP-UHFFFAOYSA-N trimethylsilane Chemical compound C[SiH](C)C PQDJYEQOELDLCP-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- 229910052721 tungsten Inorganic materials 0.000 description 1
- 239000010937 tungsten Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Liquid Deposition Of Substances Of Which Semiconductor Devices Are Composed (AREA)
- Formation Of Insulating Films (AREA)
Abstract
Description
ORION:英国特許第2355992号明細書
FLOWFILL:英国特許第731928号明細書
米国特許第5874367号明細書
米国特許第6287989号明細書
LOW‐K FLOWFILL:英国特許第2331626号明細書
米国特許第6242366号明細書
すなわち、(200mmウェーハに対し、)13.56MHzのRF周波数と、500WのRF電力とともに、400sccmのO2流量、700sccmのテトラメチルシラン流量および2400sccmのN2流量が、20mmで位置する対向するシャワーヘッドに、チャンバ圧力:2Torr、ウェーハプラテン温度:35℃の条件下で適用される。
<処理条件>
13.56MHzのRF周波数で500WのRF電力が、(供給される水素流量:1600sccm、)小容積単一ウェーハプロセスチャンバ(水素圧:4Torr)内で、400℃で15秒間、対向する基板プラテンに密着する(close-coupled)シャワーヘッドに適用される。
<処理条件>
H2流量:1600sccm、チャンバー圧:4Torr、RF電力:1kWで180秒間後、2.5kWで70秒間、RF周波数:13.56MHz、プラテン温度:400℃
Claims (17)
- 基板を設ける工程と、
硬化された状態で低い誘電率を有する群から選択される、未硬化、または部分的にのみ硬化された誘電材料からなる、露出表面を有する誘電体層を、前記基板に適用する工程と、
前記誘電材料を硬化する工程と
を具え、
前記硬化工程は、
前記露出表面またはその付近の前記誘電材料内に、少なくとも一のさらなる製造工程中に、保護層として作用する緻密層を形成するための第一の部分硬化と、前記誘電材料であるバルク材料を硬化するための第二の硬化とからなることを特徴とする半導体デバイスの製造方法。 - 少なくとも一の製造工程が、前記第一の部分硬化と前記第二の硬化との間で行われる請求項1に記載の半導体デバイスの製造方法。
- 前記製造工程は、前記誘電材料によって少なくとも部分的に画定される壁部を有する、凹部または形成部を、前記誘電体層の中に形成する工程を含む請求項2に記載の半導体デバイスの製造方法。
- 前記凹部または形成部は、エッチング工程により形成される請求項3に記載の半導体デバイスの製造方法。
- 前記緻密層は、前記エッチング工程用マスクを形成するためにプレエッチングされる請求項4に記載の半導体デバイスの製造方法。
- 前記第二の硬化は、前記凹部または形成部の形成後に行われる請求項3、4または5に記載の半導体デバイスの製造方法。
- 前記第二の硬化後、前記凹部または形成部内に導電材料を堆積する請求項6に記載の半導体デバイスの製造方法。
- 前記方法は、前記半導体デバイスの、凹部または形成部の少なくとも側壁部上に、バリア層を適用する工程をさらに具えることを特徴とする請求項3〜7のいずれか一項に記載の半導体デバイスの製造方法。
- 前記方法は、少なくとも前記導電材料上に、キャッピング層を形成する工程をさらに具えることを特徴とする請求項7または8に記載の半導体デバイスの製造方法。
- 前記誘電材料は、硬化により多孔質になることができ、かつ、前記第二の硬化によって多孔質になる材料である請求項1〜9のいずれか一項に記載の半導体デバイスの製造方法。
- 前記誘電材料は、CVD技術を用いて適用されるSiCO:H型材料を有することを特徴とする請求項1〜10のいずれか一項に記載の半導体デバイスの製造方法。
- 前記誘電材料に、低誘電率の低−k前駆物質材料が適用され、該低−k前駆物質材料は、Orion(登録商標)の前駆物質材料を有することを特徴とする請求項11に記載の半導体デバイスの製造方法。
- 前記誘電材料に、低誘電率の低−k前駆物質材料が適用され、該低−k前駆物質材料は、Low−K Flowfill(登録商標)の前駆物質材料を有することを特徴とする請求項11に記載の半導体デバイスの製造方法。
- 前記適用されるCVD技術は、PE−CVD、LT−CVD、AP−CVDおよびRT−CVDのうちの一であることを特徴とする請求項11、12または13に記載の半導体デバイスの製造方法。
- 前記第一の部分硬化は、CVD法で行われることを特徴とする請求項1〜14のいずれか一項に記載の半導体デバイスの製造方法。
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PCT/IB2006/050269 WO2006079979A2 (en) | 2005-01-27 | 2006-01-25 | A method of manufacturing a semiconductor device |
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JP (1) | JP2008529296A (ja) |
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Cited By (12)
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---|---|---|---|---|
JP2010171081A (ja) * | 2009-01-20 | 2010-08-05 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2011139033A (ja) * | 2009-12-04 | 2011-07-14 | Novellus Systems Inc | ハードマスク材料 |
US9234276B2 (en) | 2013-05-31 | 2016-01-12 | Novellus Systems, Inc. | Method to obtain SiC class of films of desired composition and film properties |
US9337068B2 (en) | 2012-12-18 | 2016-05-10 | Lam Research Corporation | Oxygen-containing ceramic hard masks and associated wet-cleans |
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US10297442B2 (en) | 2013-05-31 | 2019-05-21 | Lam Research Corporation | Remote plasma based deposition of graded or multi-layered silicon carbide film |
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US9997451B2 (en) * | 2016-06-30 | 2018-06-12 | International Business Machines Corporation | Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device |
WO2019212799A1 (en) * | 2018-05-03 | 2019-11-07 | Applied Materials, Inc. | Rf grounding configuration for pedestals |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0555387A (ja) * | 1991-06-14 | 1993-03-05 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2000332011A (ja) * | 1999-03-17 | 2000-11-30 | Canon Sales Co Inc | 層間絶縁膜の形成方法及び半導体装置 |
JP2002083809A (ja) * | 2000-09-06 | 2002-03-22 | Hitachi Ltd | 半導体装置及びその製造方法 |
US20020074659A1 (en) * | 2000-12-18 | 2002-06-20 | International Business Machines Corporation | Method for forming a porous dielectric material layer in a semiconductor device and device formed |
US20030124870A1 (en) * | 2001-11-16 | 2003-07-03 | Macneil John | Forming low k dielectric layers |
JP2004509468A (ja) * | 2000-09-13 | 2004-03-25 | シップレーカンパニー エル エル シー | 電子デバイスの製造 |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CA2137928C (en) * | 1992-07-04 | 2002-01-29 | Christopher David Dobson | A method of treating a semiconductor wafer |
GB2331626B (en) * | 1996-08-24 | 2001-06-13 | Trikon Equip Ltd | Method and apparatus for depositing a planarized dielectric layer on a semiconductor substrate |
JP2002538604A (ja) * | 1999-02-26 | 2002-11-12 | トリコン ホールディングス リミティド | ポリマー層の処理方法 |
JP2001118842A (ja) * | 1999-10-15 | 2001-04-27 | Nec Corp | 半導体装置とその製造方法 |
GB2393577B (en) * | 2001-07-18 | 2005-07-20 | Trikon Holdings Ltd | Low dielectric constant layers |
US6528409B1 (en) * | 2002-04-29 | 2003-03-04 | Advanced Micro Devices, Inc. | Interconnect structure formed in porous dielectric material with minimized degradation and electromigration |
US7250370B2 (en) * | 2003-09-19 | 2007-07-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two step post-deposition treatment of ILD layer for a lower dielectric constant and improved mechanical properties |
-
2006
- 2006-01-24 TW TW095102607A patent/TW200631095A/zh unknown
- 2006-01-25 EP EP06710745A patent/EP1872395A2/en not_active Withdrawn
- 2006-01-25 JP JP2007552788A patent/JP2008529296A/ja active Pending
- 2006-01-25 CN CN2006800034302A patent/CN101111930B/zh not_active Expired - Fee Related
- 2006-01-25 US US11/815,007 patent/US20090104774A1/en not_active Abandoned
- 2006-01-25 WO PCT/IB2006/050269 patent/WO2006079979A2/en active Application Filing
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH0555387A (ja) * | 1991-06-14 | 1993-03-05 | Mitsubishi Electric Corp | 半導体装置およびその製造方法 |
JP2000332011A (ja) * | 1999-03-17 | 2000-11-30 | Canon Sales Co Inc | 層間絶縁膜の形成方法及び半導体装置 |
JP2002083809A (ja) * | 2000-09-06 | 2002-03-22 | Hitachi Ltd | 半導体装置及びその製造方法 |
JP2004509468A (ja) * | 2000-09-13 | 2004-03-25 | シップレーカンパニー エル エル シー | 電子デバイスの製造 |
US20020074659A1 (en) * | 2000-12-18 | 2002-06-20 | International Business Machines Corporation | Method for forming a porous dielectric material layer in a semiconductor device and device formed |
US20030124870A1 (en) * | 2001-11-16 | 2003-07-03 | Macneil John | Forming low k dielectric layers |
Cited By (15)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010171081A (ja) * | 2009-01-20 | 2010-08-05 | Toshiba Corp | 半導体装置及びその製造方法 |
JP2011139033A (ja) * | 2009-12-04 | 2011-07-14 | Novellus Systems Inc | ハードマスク材料 |
US10211310B2 (en) | 2012-06-12 | 2019-02-19 | Novellus Systems, Inc. | Remote plasma based deposition of SiOC class of films |
US11264234B2 (en) | 2012-06-12 | 2022-03-01 | Novellus Systems, Inc. | Conformal deposition of silicon carbide films |
US10832904B2 (en) | 2012-06-12 | 2020-11-10 | Lam Research Corporation | Remote plasma based deposition of oxygen doped silicon carbide films |
US10325773B2 (en) | 2012-06-12 | 2019-06-18 | Novellus Systems, Inc. | Conformal deposition of silicon carbide films |
US9337068B2 (en) | 2012-12-18 | 2016-05-10 | Lam Research Corporation | Oxygen-containing ceramic hard masks and associated wet-cleans |
US10297442B2 (en) | 2013-05-31 | 2019-05-21 | Lam Research Corporation | Remote plasma based deposition of graded or multi-layered silicon carbide film |
US10472714B2 (en) | 2013-05-31 | 2019-11-12 | Novellus Systems, Inc. | Method to obtain SiC class of films of desired composition and film properties |
US9234276B2 (en) | 2013-05-31 | 2016-01-12 | Novellus Systems, Inc. | Method to obtain SiC class of films of desired composition and film properties |
US11049716B2 (en) | 2015-04-21 | 2021-06-29 | Lam Research Corporation | Gap fill using carbon-based films |
US9847221B1 (en) | 2016-09-29 | 2017-12-19 | Lam Research Corporation | Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing |
US10002787B2 (en) | 2016-11-23 | 2018-06-19 | Lam Research Corporation | Staircase encapsulation in 3D NAND fabrication |
US10580690B2 (en) | 2016-11-23 | 2020-03-03 | Lam Research Corporation | Staircase encapsulation in 3D NAND fabrication |
US9837270B1 (en) | 2016-12-16 | 2017-12-05 | Lam Research Corporation | Densification of silicon carbide film using remote plasma treatment |
Also Published As
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WO2006079979A2 (en) | 2006-08-03 |
TW200631095A (en) | 2006-09-01 |
CN101111930B (zh) | 2011-04-20 |
US20090104774A1 (en) | 2009-04-23 |
CN101111930A (zh) | 2008-01-23 |
WO2006079979A3 (en) | 2007-04-26 |
EP1872395A2 (en) | 2008-01-02 |
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