JP2008519434A5 - - Google Patents

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Publication number
JP2008519434A5
JP2008519434A5 JP2007539143A JP2007539143A JP2008519434A5 JP 2008519434 A5 JP2008519434 A5 JP 2008519434A5 JP 2007539143 A JP2007539143 A JP 2007539143A JP 2007539143 A JP2007539143 A JP 2007539143A JP 2008519434 A5 JP2008519434 A5 JP 2008519434A5
Authority
JP
Japan
Prior art keywords
semiconductor
trench
insulating
active layer
stressor material
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2007539143A
Other languages
English (en)
Japanese (ja)
Other versions
JP2008519434A (ja
Filing date
Publication date
Priority claimed from US10/977,266 external-priority patent/US7276406B2/en
Application filed filed Critical
Publication of JP2008519434A publication Critical patent/JP2008519434A/ja
Publication of JP2008519434A5 publication Critical patent/JP2008519434A5/ja
Pending legal-status Critical Current

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JP2007539143A 2004-10-29 2005-10-25 最適化された応力効果に関する２重トレンチを備えたトランジスタ構造とその方法 Pending JP2008519434A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/977,266 US7276406B2 (en) 2004-10-29 2004-10-29 Transistor structure with dual trench for optimized stress effect and method therefor
PCT/US2005/038847 WO2006050051A2 (en) 2004-10-29 2005-10-25 Transistor structure with dual trench for optimized stress effect and method thereof

Publications (2)

Publication Number Publication Date
JP2008519434A JP2008519434A (ja) 2008-06-05
JP2008519434A5 true JP2008519434A5 (enExample) 2008-12-11

Family

ID=36260826

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007539143A Pending JP2008519434A (ja) 2004-10-29 2005-10-25 最適化された応力効果に関する２重トレンチを備えたトランジスタ構造とその方法

Country Status (6)

Country Link
US (1) US7276406B2 (enExample)
JP (1) JP2008519434A (enExample)
KR (1) KR20070069184A (enExample)
CN (1) CN100592479C (enExample)
TW (1) TWI433264B (enExample)
WO (1) WO2006050051A2 (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7491622B2 (en) 2006-04-24 2009-02-17 Freescale Semiconductor, Inc. Process of forming an electronic device including a layer formed using an inductively coupled plasma
US7670895B2 (en) 2006-04-24 2010-03-02 Freescale Semiconductor, Inc Process of forming an electronic device including a semiconductor layer and another layer adjacent to an opening within the semiconductor layer
US7528078B2 (en) 2006-05-12 2009-05-05 Freescale Semiconductor, Inc. Process of forming electronic device including a densified nitride layer adjacent to an opening within a semiconductor layer
JP2007329295A (ja) * 2006-06-08 2007-12-20 Hitachi Ltd 半導体及びその製造方法
DE102006046377A1 (de) * 2006-09-29 2008-04-03 Advanced Micro Devices, Inc., Sunnyvale Halbleiterbauelement mit Isoliergräben, die unterschiedliche Arten an Verformung hervorrufen
WO2008042144A2 (en) * 2006-09-29 2008-04-10 Advanced Micro Devices, Inc. A semiconductor device comprising isolation trenches inducing different types of strain
US7829407B2 (en) * 2006-11-20 2010-11-09 International Business Machines Corporation Method of fabricating a stressed MOSFET by bending SOI region
US7737498B2 (en) * 2008-05-07 2010-06-15 International Business Machines Corporation Enhanced stress-retention silicon-on-insulator devices and methods of fabricating enhanced stress retention silicon-on-insulator devices
US8084822B2 (en) * 2009-09-30 2011-12-27 International Business Machines Corporation Enhanced stress-retention fin-FET devices and methods of fabricating enhanced stress retention fin-FET devices
US20110084324A1 (en) * 2009-10-09 2011-04-14 Texas Instruments Incorporated Radiation hardened mos devices and methods of fabrication
US8815671B2 (en) 2010-09-28 2014-08-26 International Business Machines Corporation Use of contacts to create differential stresses on devices
US8460981B2 (en) 2010-09-28 2013-06-11 International Business Machines Corporation Use of contacts to create differential stresses on devices
CN102446971A (zh) * 2011-09-08 2012-05-09 上海华力微电子有限公司 一种提高晶体管载流子迁移率的pmos结构
TWI565070B (zh) * 2013-04-01 2017-01-01 旺宏電子股份有限公司 半導體結構
US10801833B2 (en) * 2018-04-09 2020-10-13 The Boeing Company Strain sensitive surfaces for aircraft structural analysis and health monitoring
CN114496903A (zh) * 2022-02-10 2022-05-13 广东省大湾区集成电路与系统应用研究院 一种半导体结构及其制造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5691230A (en) * 1996-09-04 1997-11-25 Micron Technology, Inc. Technique for producing small islands of silicon on insulator
KR100346845B1 (ko) 2000-12-16 2002-08-03 삼성전자 주식회사 반도체 장치의 얕은 트렌치 아이솔레이션 형성방법
US6524929B1 (en) * 2001-02-26 2003-02-25 Advanced Micro Devices, Inc. Method for shallow trench isolation using passivation material for trench bottom liner
US6852634B2 (en) * 2002-06-27 2005-02-08 Semiconductor Components Industries L.L.C. Low cost method of providing a semiconductor device having a high channel density

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