JP2008513977A - 半導体デバイス中の金属シリサイドの一方向拡散 - Google Patents

半導体デバイス中の金属シリサイドの一方向拡散 Download PDF

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Publication number
JP2008513977A
JP2008513977A JP2007530694A JP2007530694A JP2008513977A JP 2008513977 A JP2008513977 A JP 2008513977A JP 2007530694 A JP2007530694 A JP 2007530694A JP 2007530694 A JP2007530694 A JP 2007530694A JP 2008513977 A JP2008513977 A JP 2008513977A
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Japan
Prior art keywords
metal
silicide
temperature
alloy layer
layer
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JP2007530694A
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English (en)
Japanese (ja)
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JP2008513977A5 (enExample
Inventor
ドメニクッチ、アンソニー
ジョーンズ、ブラッドリー
ラボイエ、クリスチャン
パーティル、ロバート
ユー ワン、ユン
ホン ウォン、クォン
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International Business Machines Corp
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International Business Machines Corp
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Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JP2008513977A publication Critical patent/JP2008513977A/ja
Publication of JP2008513977A5 publication Critical patent/JP2008513977A5/ja
Withdrawn legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H01L21/28512Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table
    • H01L21/28518Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers on semiconductor bodies comprising elements of Group IV of the Periodic Table the conductive layers comprising silicides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2007530694A 2004-09-14 2005-08-18 半導体デバイス中の金属シリサイドの一方向拡散 Withdrawn JP2008513977A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/711,365 US7208414B2 (en) 2004-09-14 2004-09-14 Method for enhanced uni-directional diffusion of metal and subsequent silicide formation
PCT/EP2005/054087 WO2006029950A1 (en) 2004-09-14 2005-08-18 Uni-directional diffusion of metal silicide in semiconductor devices

Publications (2)

Publication Number Publication Date
JP2008513977A true JP2008513977A (ja) 2008-05-01
JP2008513977A5 JP2008513977A5 (enExample) 2010-09-09

Family

ID=35170075

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007530694A Withdrawn JP2008513977A (ja) 2004-09-14 2005-08-18 半導体デバイス中の金属シリサイドの一方向拡散

Country Status (7)

Country Link
US (2) US7208414B2 (enExample)
EP (1) EP1800332A1 (enExample)
JP (1) JP2008513977A (enExample)
KR (1) KR20070053234A (enExample)
CN (1) CN100505168C (enExample)
TW (1) TW200616051A (enExample)
WO (1) WO2006029950A1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147897A (ja) * 2004-11-22 2006-06-08 Samsung Electronics Co Ltd 半導体装置の製造方法
JP2007067225A (ja) * 2005-08-31 2007-03-15 Toshiba Corp 半導体装置およびその製造方法

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7238611B2 (en) * 2005-04-13 2007-07-03 United Microelectronics Corp. Salicide process
KR100715267B1 (ko) * 2005-06-09 2007-05-08 삼성전자주식회사 스택형 반도체 장치 및 그 제조 방법
US7419907B2 (en) * 2005-07-01 2008-09-02 International Business Machines Corporation Eliminating metal-rich silicides using an amorphous Ni alloy silicide structure
US7538029B2 (en) * 2005-07-06 2009-05-26 International Business Machines Corporation Method of room temperature growth of SiOx on silicide as an etch stop layer for metal contact open of semiconductor devices
JP4755894B2 (ja) * 2005-12-16 2011-08-24 株式会社東芝 半導体装置およびその製造方法
US7485572B2 (en) * 2006-09-25 2009-02-03 International Business Machines Corporation Method for improved formation of cobalt silicide contacts in semiconductor devices
US7622386B2 (en) * 2006-12-06 2009-11-24 International Business Machines Corporation Method for improved formation of nickel silicide contacts in semiconductor devices
US7553762B2 (en) * 2007-02-09 2009-06-30 United Microelectronics Corp. Method for forming metal silicide layer
JP5214261B2 (ja) * 2008-01-25 2013-06-19 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
KR101384111B1 (ko) * 2009-01-09 2014-04-10 주식회사 에스앤에스텍 블랭크 마스크, 이를 이용하는 포토 마스크 및 이를 제조하는 방법
JP5332947B2 (ja) * 2009-06-25 2013-11-06 富士通セミコンダクター株式会社 半導体装置の製造方法
US8021982B2 (en) 2009-09-21 2011-09-20 International Business Machines Corporation Method of silicide formation by adding graded amount of impurity during metal deposition
CN102044422B (zh) * 2009-10-19 2012-07-04 中芯国际集成电路制造(上海)有限公司 自对准金属硅化物的形成方法
CN102110624B (zh) * 2009-12-23 2012-05-30 中芯国际集成电路制造(上海)有限公司 检测镍铂去除装置的方法
CN101764058B (zh) * 2009-12-31 2013-07-31 复旦大学 形成超薄可控的金属硅化物的方法
US8304319B2 (en) * 2010-07-14 2012-11-06 Taiwan Semiconductor Manufacturing Company, Ltd. Method for making a disilicide
CN102427052B (zh) * 2011-11-03 2013-12-18 上海新傲科技股份有限公司 具有高效复合中心的soi材料衬底及其制备方法
CN103137462B (zh) * 2011-11-25 2015-11-25 中芯国际集成电路制造(上海)有限公司 自对准金属硅化物的形成方法
CN104934468B (zh) * 2014-03-17 2018-07-20 中芯国际集成电路制造(上海)有限公司 栅极及其制作方法
US9865466B2 (en) * 2015-09-25 2018-01-09 Applied Materials, Inc. Silicide phase control by confinement
JP2018078212A (ja) * 2016-11-10 2018-05-17 三重富士通セミコンダクター株式会社 半導体装置の製造方法
US10453750B2 (en) 2017-06-22 2019-10-22 Globalfoundries Inc. Stacked elongated nanoshapes of different semiconductor materials and structures that incorporate the nanoshapes
CN114334985B (zh) * 2020-10-12 2025-07-04 华邦电子股份有限公司 存储元件及其形成方法
CN112585763B (zh) * 2020-11-27 2024-04-05 英诺赛科(苏州)半导体有限公司 半导体装置和其制造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5027185A (en) * 1988-06-06 1991-06-25 Industrial Technology Research Institute Polycide gate FET with salicide
US5536684A (en) * 1994-06-30 1996-07-16 Intel Corporation Process for formation of epitaxial cobalt silicide and shallow junction of silicon
US5780361A (en) 1995-06-23 1998-07-14 Nec Corporation Salicide process for selectively forming a monocobalt disilicide film on a silicon region
US5780362A (en) * 1996-06-04 1998-07-14 Wang; Qingfeng CoSi2 salicide method
US6022801A (en) * 1998-02-18 2000-02-08 International Business Machines Corporation Method for forming an atomically flat interface for a highly disordered metal-silicon barrier film
US6413859B1 (en) * 2000-03-06 2002-07-02 International Business Machines Corporation Method and structure for retarding high temperature agglomeration of silicides using alloys
US6323130B1 (en) * 2000-03-06 2001-11-27 International Business Machines Corporation Method for self-aligned formation of silicide contacts using metal silicon alloys for limited silicon consumption and for reduction of bridging
US6251779B1 (en) * 2000-06-01 2001-06-26 United Microelectronics Corp. Method of forming a self-aligned silicide on a semiconductor wafer
US6605513B2 (en) * 2000-12-06 2003-08-12 Advanced Micro Devices, Inc. Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing
US6444578B1 (en) * 2001-02-21 2002-09-03 International Business Machines Corporation Self-aligned silicide process for reduction of Si consumption in shallow junction and thin SOI electronic devices
JP3515556B2 (ja) * 2001-12-04 2004-04-05 株式会社東芝 プログラマブル素子、プログラマブル回路及び半導体装置
US6657244B1 (en) * 2002-06-28 2003-12-02 International Business Machines Corporation Structure and method to reduce silicon substrate consumption and improve gate sheet resistance during silicide formation
US6905560B2 (en) * 2002-12-31 2005-06-14 International Business Machines Corporation Retarding agglomeration of Ni monosilicide using Ni alloys

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006147897A (ja) * 2004-11-22 2006-06-08 Samsung Electronics Co Ltd 半導体装置の製造方法
JP2007067225A (ja) * 2005-08-31 2007-03-15 Toshiba Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
EP1800332A1 (en) 2007-06-27
KR20070053234A (ko) 2007-05-23
CN1989598A (zh) 2007-06-27
US20070128867A1 (en) 2007-06-07
CN100505168C (zh) 2009-06-24
US7208414B2 (en) 2007-04-24
WO2006029950A1 (en) 2006-03-23
TW200616051A (en) 2006-05-16
US20060057844A1 (en) 2006-03-16

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