JP2008284009A - Game machine voice control device, and game machine equipped with the game machine voice control device - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a game machine voice control device permitting more flexible connection of a memory board to a sound board, and a game machine equipped with the game machine voice control device. <P>SOLUTION: Two connectors 84 and 85 for connecting the memory board are attached to the sound board 44. The total of the data bus width of a data bus 86 connecting the connector 84 and a voice control LSI 80 and the data bus width of a data bus 87 connecting the connector 85 and the voice control LSI 80 is set at the same as the data bus width of the voice control LSI 80. By connecting a plurality of memory boards parallel to the voice control LSI 80 by the sound board 44, the voice control device 34 is constituted by a plurality of memory boards whose data bus width is smaller than that of the voice control LSI 80. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a gaming machine voice control device that controls a voice generated in accordance with a game and a gaming machine including the gaming machine voice control device.

  2. Description of the Related Art Conventionally, gaming machines that use a speaker to generate various sounds synchronized with game content are widely known. For example, in a pachinko machine that is one form of gaming machine, when a game ball wins a specific winning opening provided on the gaming board, the change of the symbols displayed on the liquid crystal display device is started and stops after a predetermined time. If the symbol is a “big hit” symbol, the big hit game is executed and a large number of game balls are paid out to the player. Then, by generating sound effects from the speakers in accordance with the progress of the game, such as symbol variations and jackpot games, the player's interest is attracted. Here, sound generation by the speaker is controlled by a sound control device provided on the back side or inside of the gaming machine, but the sound to be generated varies depending on the type of gaming machine. Therefore, the voice control device must be individually manufactured according to the type of gaming machine, and it is difficult to reduce the manufacturing cost of the gaming machine.

  Therefore, a sound board equipped with a sound controller that outputs sound signals to the speaker and a memory board (ROM board) that stores sound source data specific to each type of gaming machine are provided separately, and these are connected to each other. Thus, a gaming machine in which the entire voice control device is configured has been proposed (see, for example, Patent Document 1). According to this gaming machine, when a new gaming machine is manufactured using parts of an old gaming machine, the sound board can be used in common for a plurality of gaming machines, and thus can be used as it is for a new gaming machine. . Then, it is only necessary to configure a voice control device by exchanging only a unique memory board for each type of gaming machine and mount it on a new gaming machine. Therefore, it is not necessary to newly manufacture the entire voice control device, and the manufacturing cost of the gaming machine can be reduced.

In recent years, efforts have been made to generate more beautiful and varied audio, and as a result, a high-performance audio controller with a larger data bus width has been mounted on the sound board. . In addition, in order to generate various sounds, the storage capacity of the memory board is also increased.
JP 2001-62120 A

  However, in such a conventional gaming machine, if the voice control controller mounted on the sound board is changed to one having a large data bus width, the processing speed of the memory board is not increased unless the data bus width of the memory board is increased accordingly. And high performance cannot be realized. In addition, when a decoding circuit for selecting one of a plurality of memories provided in the memory board is provided in the sound board, the capacity of the memory board that can be connected to the sound board is limited. The board cannot be shared. Therefore, when a new sound board with different performance is manufactured, even if a large number of old memory boards are left in stock, they cannot be used, resulting in a waste.

  The present invention has been made to solve the above-described problem, and a gaming machine voice control device capable of more freely connecting a memory board to a sound board and a game equipped with the gaming machine voice control device. The purpose is to provide a machine.

  In order to achieve the above object, a voice control device for a gaming machine according to claim 1 manages a main control of a game of a gaming machine, transmits a signal according to the control, and a voice according to the game. Sound generation means for generating sound, a sound control controller for synthesizing speech by a signal received from the main control board and outputting a sound signal, a sound board for controlling generation of sound by the sound generation means, and the sound control A voice control device for a gaming machine having a memory storing sound source data used in a controller, and a memory board detachably attached to the sound board, wherein the sound board connects the memory board And a plurality of data buses extending from the plurality of connection portions are connected in parallel to the voice control controller.

  In addition to the configuration of the invention described in claim 1, the voice control device for gaming machines according to claim 2 of the present invention is a relay that connects the connection portion of the sound board and the plurality of memory boards. A plurality of memory substrates are connected to one of the connection portions through the relay substrate.

  According to a third aspect of the present invention, there is provided a voice control device for a gaming machine, in addition to the configuration of the first or second aspect of the present invention, a plurality of the data buses connecting the connection section and the voice control controller. The total data bus width is equal to the data bus width of the voice controller.

  A voice control device for a gaming machine according to claim 4 of the present invention controls the main control of the game of the gaming machine, and generates a main control board that transmits a signal according to the control and a voice according to the game. A sound control unit that generates sound and outputs a sound signal by performing sound synthesis using a signal received from the main control board, and used in the sound control controller for controlling sound generation by the sound generation means A plurality of memories in which sound source data to be stored are stored, a memory board detachably attached to the sound board, and an address signal input from an address bus extending from the voice control controller, And a first decoding circuit for generating a signal for selecting one of the first decoding circuits, wherein the first decoding circuit is connected to the first decoding circuit. Characterized by providing the re-substrate.

  According to a fifth aspect of the voice control device for gaming machines of the present invention, in addition to the configuration of the fourth aspect of the present invention, a second signal for generating a signal for selecting one of the plurality of memory boards is provided. A relay circuit for connecting the sound board and the plurality of memory boards, and a plurality of address signals output from the sound board for selecting one of the plurality of memories; And a memory substrate selection signal for selecting one of the plurality of memory substrates, which is located in the upper bits of the chip select signal.

  According to a sixth aspect of the present invention, there is provided a voice control device for gaming machines in addition to the configuration of the fifth aspect of the present invention. ID information storage means for storing information, and an ID information decoding circuit for generating a signal for mapping from the ID information, and the second decoding circuit of the relay board is for selecting the memory board A signal is generated using a signal generated by the ID information decoding circuit.

  According to a seventh aspect of the present invention, the voice control device for gaming machines is connected to the sound board using the ID information in addition to the configuration of the sixth aspect of the invention. The storage capacity of the memory board is recognized.

  In addition to the configuration of the invention according to claim 6 or 7, the voice control device for gaming machines according to claim 8 of the present invention has an appropriate storage capacity of the memory board connected to the sound board in advance. The memory board connected to the sound board with reference to the appropriate storage capacity storage means for storing, the storage capacity stored in the appropriate storage capacity storage means, and the storage capacity recognized by the ID information Appropriate storage capacity determining means for determining whether or not the storage capacity is a preset storage capacity.

  A gaming machine according to claim 9 of the present invention includes the voice control device for gaming machine according to any one of claims 1 to 8.

  According to the voice control device for a gaming machine according to claim 1, the sound board includes a plurality of connection parts for connecting the memory boards, and the data buses extending from the connection parts are connected to the voice control controller in parallel. By connecting the memory board to the connection unit, a plurality of memory boards are connected in parallel to the voice control controller. Thus, a voice control device for a gaming machine can be configured using a plurality of memory boards having a data bus width smaller than that of the voice control controller without using an expensive member such as a circuit for converting the data bus width. Therefore, one memory board can be connected to a plurality of types of sound boards having different data bus widths. That is, the degree of freedom of connection of the memory substrate can be improved.

  In addition to the effect of the invention described in claim 1, the voice control device for gaming machines according to claim 2 of the present invention includes a relay board that connects the connection part of the sound board and the plurality of memory boards. A plurality of memory boards can be connected to one connection portion via the relay board. Accordingly, it is possible to connect more memory substrates to the sound substrate than the number of connection portions, and it is possible to easily increase the storage capacity. In addition, the voice control device for gaming machines can be configured by using a memory board having a data bus width smaller than the data bus width of the connection portion of the sound board.

  In addition to the effect of the invention described in claim 1 or 2, the voice control device for gaming machines according to claim 3 of the present invention is a data bus of a plurality of data buses connecting the connection unit and the voice control controller. Since the total width is equal to the data bus width of the voice control controller, various controls can be performed with the performance of the data bus width of the voice control controller having a larger data bus width.

  According to the voice control device for a gaming machine according to claim 4 of the present invention, since the first decoding circuit for generating a signal for selecting one of the plurality of memories is provided on the memory board, the mounted memory A plurality of types of memory boards having different numbers can be connected to the sound board. Therefore, the degree of freedom of connection of the memory substrate can be improved, and the manufacturing cost can be reduced as compared with the case where the sound substrate is manufactured for each type of memory substrate.

  According to a fifth aspect of the present invention, there is provided a voice control device for gaming machines, in addition to the effect of the fourth aspect of the invention, wherein a plurality of memory boards are connected to a relay board connecting the sound board and the plurality of memory boards. Since the second decoding circuit for generating a signal for selecting one of the two is provided, a plurality of memory boards can be connected to one sound board. Therefore, the degree of freedom of connection of the memory board to the sound board can be improved.

  The voice control device for gaming machines according to claim 6 of the present invention stores ID information, which is information indicating its own storage capacity, in addition to the effect of the invention according to claim 5. In accordance with this ID information, a signal for selecting one of the plurality of memory boards is generated by the second decoding circuit, so that a continuous memory map in which no space is generated can be formed.

  According to a seventh aspect of the present invention, in addition to the effect of the sixth aspect, the voice control controller includes a memory board connected to the sound board using the ID information. Therefore, control according to the storage capacity of the memory board can be performed.

  In addition to the effects of the invention described in claim 6 or 7, the voice control device for gaming machines according to claim 8 of the present invention has an appropriate storage capacity of an appropriate memory board connected to the sound board. Pre-stored by the storage means, and the appropriate storage capacity judgment means determines whether the storage capacity of the appropriate memory board and the storage capacity of the actually connected memory board match. It is possible to determine whether or not the memory board having the same capacity is correctly connected to the sound board.

  In addition, the gaming machine according to claim 9 of the present invention can achieve the same effects as the invention according to any one of claims 1 to 8.

  Hereinafter, a pachinko machine 1 including a voice control device 34 according to a first embodiment of the present invention will be described with reference to the drawings. First, with reference to FIG.1 and FIG.2, the mechanical structure of the pachinko machine 1 is demonstrated. FIG. 1 is a perspective view of the state in which the front frame 14 and the middle frame 13 of the pachinko machine 1 are opened as seen obliquely from the front, and FIG. 2 is a front view of the pachinko machine 1. In the following description, the front side of the sheet of FIG. 2 is referred to as “the front side of the pachinko machine 1” and the depth side of the sheet is referred to as “the back side of the pachinko machine 1”.

  First, a schematic configuration of the pachinko machine 1 will be described. As shown in FIG. 1, the pachinko machine 1 includes an outer frame 12 that is disposed in an island facility (not shown) of a game arcade and supports a main body of the pachinko machine 1 in a substantially rectangular shape when viewed from the front. The vicinity of the left column portion of the middle frame 13 is pivotally supported in the vicinity of the outer frame left column portion 12 a of the outer frame 12.

  The middle frame 13 is made of a metal angle member having a substantially rectangular shape when viewed from the front. The left column portion of the middle frame 13 is pivotally supported in the vicinity of the outer frame left column portion 12a of the outer frame 12 via the upper hinge 22 and the lower hinge 21, so that the middle frame 13 is substantially the same as the outer frame 12. It can be rotated horizontally (openable and closable). The game board 2 is disposed in the upper half of the middle frame 13. Further, an upper plate 5 is provided below the game board 2 on the front side of the middle frame 13 to supply game balls to the launcher and receive prize balls. A lower plate 6 is provided. Further, on the right side of the lower plate 6, a launch handle 7 for adjusting the launch of the game ball by the launcher is provided. A front frame 14 having a substantially rectangular shape in front view is provided on the front side of the game board 2.

  Further, a center cover 27 is provided on the back side of the middle frame 13 of the pachinko machine 1, and a main board 41, a sub-integrated board 58, and a power board 42, which will be described later, for controlling each part constituting the pachinko machine 1. A number of control devices (see FIG. 3) such as the voice control device 34 are protected. The present invention has a feature in the structure of the voice control device 34, and details will be described later. Further, a lower cover 28 is provided below the center cover 27, and various parts for operating the pachinko machine 1 are protected. Further, a game ball tank 29 for storing game balls supplied from the gaming machine installation island is provided above the center cover 27.

  Next, the table frame 14 will be described. As shown in FIG. 2, the front frame 14 has a substantially rectangular shape when viewed from the front, and has an opening at a substantially central position so that the game area 4 of the game board 2 can be viewed from the front side. A glass window 23 (see FIG. 1), which is a transparent plate, is fitted into the opening, and the gaming area 4 can be visually recognized through the glass window 23. The front frame left end portion 14a (see FIG. 1) of the front frame 14 is pivotally supported in the vicinity of the left column portion of the middle frame 13, so that the front frame 14 rotates in a substantially horizontal direction with respect to the middle frame 13. It is movable (can be opened and closed). A speaker 32 is provided at the upper left part of the front frame 14 and a speaker 33 is provided at the upper right part. The two speakers 32 and 33 are connected to the sound control device 34 (see FIG. 3) by wiring. Yes. Various sounds are generated from the speakers 32 and 33 under the control of the sound control device 34. A large number of lighting lamps 63 (see FIG. 3) for production are provided on the front surface of the front frame 14.

  Next, the game board 2 will be described. By operating the launch handle 7, a game ball launched from a launcher (not shown) as launching means flows down the space formed by the game board 2 and the glass window 23. The game board 2 is supported by the front side of the game board opening (not shown) of the game board fixed frame fixed to the back side of the middle frame 13 and is supported by a front frame 14 that holds the glass window 23 substantially at the center. Protected. As shown in FIG. 1, a game area 4 having a substantially circular shape in front view is provided on the front surface of the game board 2, surrounded by the outer rail 3, in which game balls launched by the launching means flow down.

  As shown in FIG. 2, a symbol display device 8 having a liquid crystal display device 36, various lamps and LEDs is provided in the approximate center of the game area 4. Further, a special symbol starting electric accessory 15 is provided on the lower side of the symbol display device 8, and normal symbol starting gates 19 and 20 are respectively arranged on the left and right sides of the special symbol starting electric accessory 15. Yes. A normal winning opening 10 is provided on the left side of the normal symbol starting gate 19, and an ordinary winning opening 11 is provided on the right side of the normal symbol starting gate 20. Further, a special winning opening 16 is provided below the special symbol starting electric accessory 15, and a gaming ball that has not won any winning opening is collected below the special winning opening 16. A mouth 30 is provided.

  Next, the symbol display device 8 will be described. As shown in FIG. 2, a special symbol memory number display LED 60 composed of four LEDs is provided in the lower part of the symbol display device 8, and a special symbol composed of two 7-segment LEDs is provided on the right side thereof. A symbol display unit 25 is provided. Further, a normal symbol storage number display LED 59 composed of four LEDs is provided at the upper part of the symbol display device 8, and a normal symbol display unit 24 is provided above it. The symbol display device 8 includes a liquid crystal display device 36 at the center, and the liquid crystal display device 36 displays various images such as moving images and messages.

  Next, the electrical configuration of the pachinko machine 1 will be described with reference to FIG. FIG. 3 is a block diagram showing an electrical configuration of the pachinko machine 1. As shown in FIG. 3, the control unit 40 mainly includes a main board 41, a sound control device 34, a power supply board 42, an effect control board 43, a payout control board 45, an electrical decoration board 46, an intermediate board 47, and a sub-integrated board. 58. The voice control device 34 includes a sound board 44, a first memory board 120, and a second memory board 130. The control unit 40 is provided on the back side (back side) of the pachinko machine 1 and is protected by the center cover 27 (see FIG. 1).

  First, the main substrate 41 will be described. The main board 41 that performs main control of the pachinko machine 1 is provided with a main board CPU unit 50 that performs various processes according to a program. The main board CPU unit 50 includes a CPU 51 for performing various arithmetic processes, a RAM 52 for temporarily storing data values generated during the arithmetic processes, a control program, initial values of various data, and other boards. And a ROM 53 that stores commands and the like for instructing these, and these are integrally molded as one LSI. Further, an interrupt signal generation circuit 57 is connected to the CPU unit 50, and the CPU 51 executes a control program stored in the ROM 53 every time an interrupt signal is input from the interrupt signal generation circuit 57. To do.

  Further, the main board 41 is provided with an I / O interface 54, and a game ball that has won the sub-board such as the sub-integrated board 58, the payout control board 45, the intermediate board 47, and the special symbol starter electric accessory 15. A start port switch 72 is connected to detect. Further, the I / O interface 54 of the main board 41 is connected to an output port 55 for outputting information of the pachinko machine 1 to a game hall management computer (not shown).

  Next, the payout control board 45 and the intermediate board 47 will be described. The payout control board 45 incorporates a CPU 45 a, an input interface (not shown), a RAM and a ROM, and is connected to a prize ball payout device 49. Then, according to the command transmitted from the main board 41, the prize ball payout device 49 is controlled. Further, the intermediate board 47 has a large winning opening opening solenoid 70 for opening / closing the opening / closing member of the special winning opening 16, an electric combination opening solenoid 71 for opening / closing the opening / closing member of the special symbol starting electric combination 15, The normal symbol operation switches 73 and 74 that detect the game balls that have passed the symbol start gates 19 and 20, the count switch 75 that counts the number of game balls that have won the big winning opening 16, and the normal winning ports 10 and 11 won. Winning port switches 76 and 77 for detecting a game ball, a normal symbol memory number display LED 59 and a special symbol memory number display LED 60 composed of four LEDs, and a normal symbol display unit 24 and 2 composed of one LED. A special symbol display unit 25 composed of two 7-segment LEDs is connected. The intermediate board 47 relays switches and solenoids, and relays to a display unit or the like that receives direct control from the main board 41.

  Next, the sub integrated substrate 58 will be described. The sub integrated board 58 is provided with a CPU 581, a RAM 582, and a ROM 583, and is connected to the effect control board 43, the sound board 44, and the electrical decoration board 46. And according to the command transmitted from the main board | substrate 41, the comprehensive control of the production control board 43, the sound board 44, and the electrical decoration board 46 is performed.

  Next, the electrical decoration board 46 and the effect control board 43 will be described. The illumination board 46 incorporates a CPU 46a, an input interface (not shown), RAM and ROM, and controls the illumination lamp 63. The effect control board 43 incorporates a CPU 43a, an input interface (not shown), RAM, ROM, VDP, and the like. The CPU 43a outputs display control data to the VDP according to a command received from the sub-integrated board 58, and the VDP outputs image data (RGB data) to the liquid crystal display device 36 in accordance with the input display control data. Thereby, the display mode of the liquid crystal display device 36 is controlled.

  Next, the voice control device 34 will be described. The voice control device 34 includes a sound board 44, a first memory board 120, and a second memory board 130. The sound board 44 includes a sound control unit 79 having a CPU, a RAM, a ROM, and the like, and a sound control LSI 80 that outputs a sound signal. The sound board 44 includes a 2 GB first memory board 120 having 1 GB ROMs 121 and 122 (see FIG. 4) and a 2 GB second memory board 130 having 1 GB ROMs 131 and 132 (see FIG. 4). And are connected. Sound source data is stored in the ROMs in the two memory boards 120 and 130, and the sound control LSI 80 reads out necessary sound source data from the memory boards 120 and 130, generates sound signals, and sends them to the speakers 32 and 33. Output.

  Next, with reference to FIG. 4, the details of the sound board 44, the first memory board 120, and the second memory board 130, which are the main parts of the present invention, will be described. FIG. 4 is a block diagram showing details of the voice control device 34 of the first embodiment. In FIG. 4, the data bus and the address bus are represented by a single line, but actually comprise a plurality of signal lines. For the sake of simplification of description, a plurality of signal lines are expressed by a single line in the following manner.

  First, the sound board 44 will be described. The sound board 44 includes a sound control unit 79, a sound control LSI 80, and an amplifier circuit 81. The voice control unit 79 includes a voice control CPU 91, a voice control RAM 92, and a voice control ROM 93. The voice control ROM 93 stores a voice control program for the speakers 32 and 33, data for controlling a voice generation mode, and the like, and transmits signals and data to the voice control CPU 91. Similarly, the audio control RAM 92 is connected to the audio control CPU 91, and various counters, flags, data, signals, and the like are temporarily stored. The voice control CPU 91 receives a command for controlling the sound generation mode by the speakers 32 and 33 from the sub-integrated board 58 and outputs a control signal to the voice control LSI 80 based on the received command.

  The audio control LSI 80 has a data bus width of 64 bits, and reads out necessary sound source data from ROMs in the memory boards 120 and 130, which will be described later, in accordance with a control signal input from the display control CPU 91. Then, an audio signal is generated, and the generated audio signal is output to the amplifier circuit 81 in synchronization with the gaming state of the pachinko machine 1.

  Next, the data buses 86 and 87 and the address buses 88 and 89 of the sound board 44 will be described. The data bus width of the sound control LSI 80 used in the sound board 44 is 64 bits. Here, in the sound board 44 of the first embodiment, two connectors 84 and 85 are provided in order to connect the 32-bit memory boards 120 and 130 to the 64-bit sound control LSI 80. The audio control LSI 80 and the connector 84 are connected by a 32-bit data bus 86, and the audio control LSI 80 and the connector 85 are similarly connected by a 32-bit data bus 87. The data bus width (32 bits) of the data bus 86 connected from the connector 84 to the audio control LSI 80 and the data bus width (32 bits) of the data bus 87 connected from the connector 85 to the audio control LSI 80. The total is equal to the data bus width (64 bits) of the voice control LSI.

  Next, the first memory substrate 120 and the second memory substrate 130 will be described. The first memory board 120 is provided with 32-bit ROMs 121 and 122 and a decoding circuit 124, and is connected to another board by a connector 129. The decode circuit 124 is a circuit for selecting one of the two ROMs 121 and 122 in accordance with a chip select signal transmitted by a decode circuit input line 123 that is a part of the address bus 126. The decode circuit 124 and the ROM 121 are connected by a chip select signal line 127, and the decode circuit 124 and the ROM 122 are similarly connected by a chip select signal line 128. An address bus 126 is connected from the connector 129 to the ROMs 121 and 122, and a data bus 125 having a data bus width of 32 bits is connected from the connector 129 to the ROMs 121 and 122.

  Similarly to the first memory board 120, the second memory board 130 also has 32-bit ROMs 131 and 132 and a decoding circuit 134, and is connected to another board by a connector 139. Then, one of the two ROMs 131 and 132 is selected by the decode circuit 134 according to the chip select signal transmitted through the decode circuit input line 133, and the chip select signal lines 137 and 138 are connected to the decode circuit 134. The ROM 131 and 132 are connected to each other. The connector 139 and the ROMs 131 and 132 are connected by a 32-bit data bus 135 and an address bus 136.

  The ROMs 121 and 122 provided on the first memory substrate 120 and the ROMs 131 and 132 provided on the second memory substrate 130 are both flash ROMs that can be electrically rewritten. Therefore, when a new type of gaming machine is manufactured using parts of an old gaming machine, the contents of the ROMs 121 and 122 and the ROMs 131 and 132 can be rewritten and used to reduce costs.

  According to the voice control device 34 having such a configuration, the voice control LSI 80 having a data bus width of 64 bits and the two memory boards 120 and 130 having a data bus width of 32 bits are connected with a simple configuration. Can do. Therefore, when a large number of 32-bit memory boards remain in stock, it is not necessary to newly manufacture a 64-bit memory board, and by connecting the two 32-bit memory boards 120 and 130 to the sound board 44, The voice control device 34 can be configured. Further, since the 32-bit memory board can be connected to both the 32-bit audio control LSI and the 64-bit audio control LSI 80, the memory board can be shared, and the manufacturing cost can be reduced. it can. Here, the sound source data used in the sound control device 34 includes various sound source data such as a GM standard sound source, a PCM sound source, an FM sound source, a software sound source, and a game sound source. According to the voice control device 34 according to the present invention, a plurality of types of sound source data can be obtained regardless of the type and standard of the sound source data by simply replacing the memory board connected to the sound board 44 with a memory board storing other sound source data. The voice of the gaming machine can be controlled.

  In addition, when a voice control LSI 80 and a memory board having different data bus widths are connected to each other by using a circuit for converting the data bus width, it is necessary to newly manufacture a relay board or the like having a conversion circuit. Yes and costly. However, according to the present invention, a common memory substrate can be realized with a simple configuration using inexpensive members.

  The main board 41 in the first embodiment corresponds to a “main control board” of the present invention, and the speakers 32 and 33 correspond to “sound generation means”. The voice control unit 79 and the voice control LSI 80 correspond to “voice control controller”, and the connectors 129 and 139 of the memory boards 120 and 130 correspond to “connection portions”.

  Next, the voice control device 234 according to the second embodiment of the present invention will be described with reference to FIG. FIG. 5 is a block diagram showing details of the voice control device 234 of the second embodiment. Note that, in the voice control device 234 according to the second embodiment, unlike the voice control device 34 according to the first embodiment, four memory boards 220, 230, 240, 250 are relayed to the sound board 44. The substrates 201 and 211 are connected to each other. In addition, the components of the pachinko machine according to the second embodiment are mounted in parallel on the memory boards 220, 230, 240, and 250 in that the voice control device 234 is provided with relay boards 201 and 211. This is the same as the pachinko machine 1 of the first embodiment, except that the ROM is 8 bits and no decoding circuit is provided on the memory board. Therefore, the same reference numerals are given to components common to the pachinko machine 1, and the description of the mechanical configuration shown in FIGS. 1 and 2 and the description of the electrical configuration shown in FIG. 3 are omitted or simplified. It shall be.

  First, the memory substrates 220, 230, 240, and 250 will be described. The memory board 220 is provided with 8-bit ROMs 221 and 222 in parallel. Thus, unlike the memory boards 120 and 130 of the first embodiment, a memory board having a data bus width of 16 bits is formed without providing a decoding circuit for selecting one of the two ROMs 221 and 222. Yes. The ROMs 221 and 222 and the connector 229 are connected by a data bus and an address bus, and the memory board 220 is connected to another board by the connector 229. The memory board 230 has ROMs 231 and 232 and a connector 239, the memory board 240 has ROMs 241 and 242 and a connector 249, and the memory board 250 has ROMs 251 and 252 and a connector 259 as well as the memory board 220. Is provided.

  Next, the relay boards 201 and 211 will be described. The relay board 201 is provided with a connector 209 connected to the connector of the sound board 44 and two connectors 207 and 208 connected to the connectors of the memory board. The data bus 203 having a data bus width of 32 bits extending from the connector 209 branches inside the relay board 201 and is connected to the connectors 207 and 208. Similarly, the address bus 204 extending from the connector 209 is also branched and connected to the connectors 207 and 208. This makes it possible to connect the two memory boards 220 and 230 of 16 bits to the sound board 44. The relay board 211 is also provided with three connectors 217 to 219 as in the relay board 201. Then, the memory boards 240 and 250 are connected to the sound board 44 by the data bus 213 and the address bus 214.

  According to the voice control device 234 having such a configuration, by using the two relay boards 201 and 211, the four memory boards 220, 230, 240, and 250 having a data bus width of 16 bits can be used. It can be connected to the voice control LSI 80 which is a bit. That is, the voice control device 234 can be configured using a memory board having a data bus width smaller than the data buses 86 and 87 (32 bits) of the connectors 84 and 85 of the sound board 44. Therefore, when a large number of 16-bit memory boards remain in stock, it is not necessary to newly manufacture 64-bit memory boards, and the 16-bit memory boards 220, 230, 240, and 250 can be used as they are.

  In the voice control device 234, the connectors 229, 239, 249, and 259 provided on the four memory boards 220, 230, 240, and 250 are the connectors 207, 208, 217, and 218 of the relay boards 201 and 211, and the sound. The structure is such that it can be connected to all the connectors 84 and 85 of the substrate 44. This improves the degree of freedom of connection between the memory board and the sound board.

  Next, a voice control device 334 according to a third embodiment of the present invention will be described with reference to FIG. FIG. 6 is a block diagram showing details of the voice control device 334 of the third embodiment. In the voice control device 334 according to the third embodiment, unlike the second embodiment, the data bus width of the ROM provided in parallel on the four memory boards 320, 330, 340, and 350, respectively. Is 16 bits, and the decoding boards 305 and 315 are provided on the relay boards 301 and 311. In addition, about the component which is common in 1st and 2nd embodiment, the same code | symbol is attached | subjected and description shall be abbreviate | omitted or simplified.

  First, the memory substrates 320, 330, 340, and 350 will be described. The memory board 320 is provided with 16-bit ROMs 321 and 322 in parallel. Thus, a memory board having a data bus width of 32 bits is configured. The ROMs 321 and 322 and the connector 329 are connected by a data bus and an address bus, and the memory board 320 is connected to another board by the connector 329. The memory board 330 includes ROMs 331 and 332 and a connector 339, the memory board 340 includes ROMs 341 and 342 and a connector 349, and the memory board 350 includes ROMs 351 and 352 and a connector 359 similar to the memory board 320. Is provided.

  Next, the relay boards 301 and 311 will be described. The relay board 301 is provided with a connector 309 connected to the connector of the sound board 44 and two connectors 307 and 308 connected to the connectors of the memory board. The connectors 309 and 307 and the connectors 309 and 308 are connected by a data bus 303 having a data bus width of 32 bits. The relay board 301 is provided with a decode circuit 305 that is a circuit for selecting one of the two memory boards 320 and 330. The connector 309 and the connector 307, and the connector 309 and the connector 308 are connected by the address bus 304 via the decode circuit 305. The decode circuit 305 is a signal for selecting one of the memory boards. Is generated and output. This makes it possible to connect two memory boards 320 and 330 each having 32 bits to the sound board 44. Note that the relay board 311 is also provided with three connectors 317 to 319 and a decode circuit 315 in the same manner as the relay board 301. Then, the two memory boards 340 and 350 are connected to the sound board 44 by the data bus 313 and the address bus 314.

  According to the sound control device 334 having such a configuration, a memory board having a data bus width different from the data bus width of the sound control LSI 80 can be connected to the sound board 44. In addition, since the decoding circuits 305 and 315 are provided on the relay boards 301 and 311, the data bus widths of all the connectors provided on the relay boards 301 and 311 are the same. Therefore, even when the data bus width of the connectors 84 and 85 on the sound board 44 is the same as the data bus width of the memory board, the voice control is performed using a larger number of memory boards than the number of connectors on the sound board 44. Apparatus 334 can be configured. In the voice control device 334, the connectors 329, 339, 349, and 359 provided on the four memory boards 320, 330, 340, and 350 are the connectors 307, 308, 317, and 318 of the relay boards 301 and 311 and effects. The connector can be connected to all the connectors 84 and 85 of the control board 43. Therefore, two memory boards can be directly connected to the sound board 44, and more memory boards can be connected to the sound board 44 via the relay boards 301 and 311.

  Next, a voice control device 434 according to a fourth embodiment of the present invention will be described with reference to FIG. FIG. 7 is a block diagram illustrating details of the voice control device 434 according to the fourth embodiment. In the voice control device 434 according to the fourth embodiment, unlike the first to third embodiments, a decoding circuit 490 is provided on the sound board 444. Moreover, the same code | symbol is attached | subjected about the component which is common in 1st-3rd embodiment, and description shall be abbreviate | omitted or simplified.

  First, the memory substrates 420, 430, and 440 will be described. The memory board 420 is provided with 8-bit ROMs 421 to 424 in parallel. Thus, a memory board having a data bus width of 32 bits is configured. The ROMs 421 to 424 and the connector 429 are connected by a data bus and an address bus, and the memory board 420 is connected to another board by the 32-bit connector 429. The memory board 430 is provided with 16-bit ROMs 431 and 432 and a connector 439, and the memory board 440 is provided with 16-bit ROMs 441 and 442 and a connector 449, respectively, and the data bus width is a 32-bit memory board. Is configured. Thus, the number of ROMs mounted on the memory substrate can be changed as appropriate.

  Next, the sound board 444 will be described. Unlike the sound board 44 of the first to third embodiments, the sound board 444 of the fourth embodiment includes three connectors 483 to 485 and a decoding circuit 490. The audio control LSI 80 and the connectors 484 and 485 are connected by an address bus 489 via a decode circuit 490. The voice control LSI 80 and the connector 483 are connected by an address bus 488. The audio control LSI 80 is connected to the connector 483 via a 32-bit data bus 486 and is also connected to the connectors 484 and 485 via a 32-bit data bus 487.

  According to the voice control device 434 having such a configuration, the address assigned from the voice control LSI 80 is decoded by the decode circuit 490 provided on the sound board 444. That is, the arrangement position of the decoding circuit for selecting the memory board and distributing the channels is not limited to the memory board and the relay board, but may be a sound board.

  Next, a voice control device 534 according to a fifth embodiment of the present invention will be described with reference to FIGS. FIG. 8 is a block diagram showing details of the voice control device 534 according to the fifth embodiment. FIG. 9 shows the relationship between the ID information input to the voice control CPU 91 and the storage capacity recognized by the voice control CPU 91. FIG. FIG. 10 is a diagram comparing the memory map when the ID information is not used and the memory map when the ID information is used. In addition, about the component which is common in 1st and 2nd embodiment, the same code | symbol is attached | subjected and description shall be abbreviate | omitted or simplified. The voice control device 534 according to the fifth embodiment is characterized in that a plurality of types of memory boards having different capacities can be connected to one sound board 544.

  Hereinafter, the configuration of the voice control device 534 will be described with reference to FIG. First, the sound board 544 will be described. The sound board 544 is provided with a sound control unit 79, a sound control LSI 80, and an amplifier circuit 81. The voice control unit 79 includes a voice control CPU 91, a voice control RAM 92, and a voice control ROM 93. The voice control CPU 91 provided on the sound board 544 of the fifth embodiment is a CPU capable of supporting a memory with a storage capacity of 8 GB. The voice control CPU 91 is connected to an address bus and a data bus, and outputs an address signal and a data signal. The address signal includes a memory substrate selection signal for selecting one of the plurality of memory substrates, and a chip select signal for selecting one of the plurality of ROMs provided on the memory substrate. And is decoded by a first decoding circuit 525, 535 and a second decoding circuit 501 described later. Each ROM in the memory boards 520 and 530, which will be described later, recognizes whether or not it is accessed by the input chip select signal, and data access is possible when it is accessed. Here, the voice control CPU 91 according to the present embodiment recognizes the capacity of the memory board connected to the sound board 544 using the ID information stored in the memory board. The sound board 544 is provided with a connector 588, and the relay board 500 or the memory boards 520 and 530 can be connected through the connector 588.

  Next, the memory substrate 520 having a storage capacity of 4 GB will be described. The memory board 520 is provided with ROMs 521 to 524 having a storage capacity of 1 GB and a first decoding circuit 525, and is connected to another board by a connector 518. The first decoding circuit 525 is a circuit for selecting one of the four ROMs 521 to 524 in accordance with a chip select signal transmitted through the address bus. The first decode circuit 525 and the ROMs 521 to 524 are connected by a chip select signal line, and a decode circuit input line that is a part of an address bus is connected from the connector 518 to the first decode circuit 525. Further, an address bus and a data bus are connected from the connector 518 to the ROMs 521 to 524. Here, in the block diagram shown in FIG. 8, a single line extending from the connector 518 is expressed, but actually, it is composed of a plurality of address buses and data buses. In addition, since there are four ROMs 521 to 524 mounted on the memory substrate 520, there are actually two decoding circuit input lines connected from the connector 518 to the first decoding circuit 525.

  Further, the memory board 520 is provided with an ID information storage unit 526 that stores ID information indicating its own storage capacity. In the ID information storage unit 526, the ID0 signal line 527 is connected to the power supply potential, and the ID1 signal line 528 is connected to the ground potential, which indicates that its own storage capacity is 4 GB. This will be described in detail later. . The ID0 signal line 527 and the ID1 signal line 528 are both connected to the connector 518.

  Next, the memory substrate 530 having a storage capacity of 2 GB will be described. The memory board 530 is provided with ROMs 531 and 532 having a storage capacity of 1 GB and a first decoding circuit 535, and is connected to another board by a connector 519. Unlike the first decode circuit 525 of the 4 GB memory substrate 520, the first decode circuit 535 in the memory substrate 530 is a circuit for selecting one of the two ROMs 531 and 532. An address bus and a data bus are connected from the connector 519 to the ROMs 531 and 532, a decode circuit input line which is a part of the address bus is connected from the connector 519 to the first decode circuit 535, and Are connected to chip select signal lines.

  The memory board 530 is also provided with an ID information storage unit 536 indicating its own storage capacity. The ID0 signal line 537 and the ID1 signal line 538 are connected from the connector 519 to the ID information storage unit 536, and both of these two signal lines are connected to the ground potential, so that the storage capacity thereof is 2 GB. Indicates that there is. Details of this will be described later.

  Next, the relay board 500 will be described. The relay board 500 is provided with a second decoding circuit 501 and an ID information decoding circuit 502. A connector 515 connected to the connector 588 of the sound board 544 and connectors 516 and 517 to which the memory boards 520 and 530 are connected are provided.

  The ID information decoding circuit 502 decodes ID information input from the ID information storage unit 526 of the memory board 520 and the ID information storage unit 536 of the memory board 530 via the terminals 1A, 1B, 2A, and 2B. The mode signal is generated and output to the second decoding circuit 501. As this mode, four types of modes are set according to the storage capacity of the memory board connected to the connector 516 and the connector 517, and a mode signal corresponding to the mode is output. Specifically, when a 2 GB memory board is connected to both the connector 516 and the connector 517, “mode 0”, and when a 4 GB memory board is connected to the connector 516 and a 2 GB memory board is connected to the connector 517, “mode” is set. 1 ”, when a 2 GB memory board is connected to the connector 516 and a 4 GB memory board is connected to the connector 517, a“ 4 GB ”memory board is connected to both the connector 516 and the connector 517. In this case, a mode signal indicating “mode 3” is output. In this embodiment, since the 4 GB memory board 520 is connected to the connector 516 and the 2 GB memory board 530 is connected to the connector 517, the “mode 1” is transmitted from the ID information decoding circuit 502 to the second decoding circuit 501. A mode signal indicating is output.

  Also, ID information indicating the storage capacity of the two memory boards connected to the relay board 500 is output from the ID information decoding circuit 502 to the voice control CPU 91. The voice control CPU 91 recognizes the storage capacity of the memory board connected via the connector 588 based on this ID information.

  The second decoding circuit 501 is connected to the audio control CPU 91 of the sound board 544, the first decoding circuit 525 of the memory board 520, and the first decoding circuit 535 of the memory board 530 via an address bus. The second decoding circuit 501 determines the mapping according to the mode signal input from the ID information decoding circuit 502. By performing the mapping based on the mode signal described above, the second decoding circuit 501 continues without any vacancy in the address. The mapping can be determined as follows. Then, one of the two memory substrates 520 and 530 is selected in accordance with the memory substrate selection signal located in the upper bits of the chip select signal. In the relay board 500, a data bus is connected from the connectors 516 and 517 to the connector 515.

  Next, with reference to FIGS. 8 and 9, the relationship between the ID information input to the voice control CPU 91 and the storage capacity of the memory boards 520 and 530 will be described. As shown in FIG. 8, two terminals of ID0 and ID1 are connected from the voice control CPU 91 to the connector 588. Then, the 4 GB memory board 520 or the 2 GB memory board 530 can be directly connected to the sound board 544, and two memory boards can be connected via the relay board 100. As described above, in the ID information storage unit 526 of the 4 GB memory substrate 520, the ID0 signal line 527 is connected to the power supply potential (High), and the ID1 signal line 528 is connected to the ground potential (Low). In the ID information storage unit 536 of the 2 GB memory substrate 530, both the ID0 signal line 537 and the ID1 signal line 538 are connected to the ground potential (Low).

  When the memory boards 520 and 530 are directly connected to the sound board 544 without using the relay board 500, the ID0 signal lines 527 and 537 are connected to ID0 of the voice control CPU 91, and the ID1 signal lines 528 and 538 are voice controlled. It is connected to ID1 of CPU91. Then, as shown in FIG. 5, the capacity of the memory board recognized by the voice control CPU 91 is 2 GB when both ID0 and ID1 are “Low”, ID0 is “High”, and ID1 is “Low”. In some cases, 4 GB.

  When two memory boards are connected to the sound board 544 via the relay board 500, the ID0 signal line 527 of the memory board 520 is input to 1A and the ID1 signal line 528 is input to 1B. Further, the ID0 signal line 537 of the memory substrate 530 is input to 2A, and the ID1 signal line 538 is input to 2B. The ID information of the two memory boards 520 and 530 is converted by the ID information decoding circuit 502 and output to ID0 and ID1 of the voice control CPU 91.

  Then, as shown in FIG. 5, when the 2 GB memory board 530 is connected to both the connectors 516 and 517 of the relay board 500, “High” is set in ID0 and “Low” is set in ID1 of the voice control CPU 91. The voice control CPU 91 recognizes that the capacity of the memory board is 4 GB. When a 4 GB memory board 520 is connected to the connector 516 and a 2 GB memory board 530 is connected to the connector 517, “Low” is input to ID 0, “High” is input to ID 1, and the capacity is 6 GB. Be recognized. Similarly, when a 4 GB memory board is connected to the connector 516 and a 2 GB memory board is connected to the connector 517, “Low” is input to ID 0 and “High” is input to ID 1. When a 4 GB memory board 520 is connected to both connectors 516 and 517, “High” is input to both ID 0 and ID 1, and the capacity is recognized as 8 GB. Thus, the voice control CPU 91 can recognize the storage capacity of the memory board based on the ID information input by ID0 and ID1 and perform each control.

  Next, with reference to FIG. 10, the effect of using ID information when decoding in the relay board 500 will be described. As shown in FIG. 10, in a method that does not use ID information when decoding in the relay board 500, the memory map is obtained when the 2 GB memory board 530 is connected to the two sound boards 544 through the relay board 500. There is a problem that a space is generated in Similarly, when the 2 GB memory board 530 is connected to the connector 516 and the 4 GB memory board 520 is connected to the connector 517, an empty space is generated in the memory map. Even if the voice control CPU 91 recognizes that the capacity of the connected memory board is 4 GB, the case where one 4 GB memory board 520 is connected and the case where two 2 GB memory boards 530 are connected. There was a problem because the memory map was different from the case where it was done. Further, even when the capacity of the connected memory board is 6 GB, it has not been possible to determine which of the connectors 516 and 517 the 4 GB memory board 520 is connected to.

  On the other hand, in the present embodiment, the ID information is used when decoding in the relay board 500, and the mapping can be determined continuously without causing a space in the address. As a result, the memory map is the same when one 4 GB memory substrate 520 is used and when two 2 GB memory substrates 530 are used. Similarly, when one 4 GB memory board 520 and two 2 GB memory boards 530 are used, the memory map is the same regardless of which of the connectors 516 and 517 is connected to the 4 GB memory board 530. Therefore, it is not necessary to redesign the sound board 544 even when the type or number of memory boards connected to the sound board 544 is changed. That is, the sound board 544 can be versatile.

  As described above, according to the voice control device 534 of the fifth embodiment, the first decode circuits 525 and 535 for generating a signal for selecting one of the plurality of ROMs are provided on the memory boards 520 and 530. Therefore, a plurality of types of memory boards having different capacities can be connected to the sound board 544. Further, the relay board 500 for connecting the two memory boards and the sound board 544 is provided with a second decoding circuit 501 that generates a signal for selecting one of the two memory boards, so that the sound board 544 is provided. It is possible to connect two memory boards.

  Further, ID information indicating its own storage capacity is stored in the memory boards 520 and 530, and the voice control device 534 can perform control according to the capacity of the memory board by using this ID information. Specifically, since the capacity of the memory board connected to the sound board 544 is first recognized by the voice control CPU 91 based on this ID information, control according to the capacity of the memory board can be performed. Further, the second decoding circuit 501 of the relay board 500 can continuously determine the mapping by the mode signal based on the ID information. Therefore, the sound board 544 can be used in common for a plurality of types of pachinko machines.

  Further, since the ID information is 2-bit information, the capacity can be recognized with a simple configuration for all connection methods of the two types of memory boards 520 and 530 to the sound board 544. Further, since the program for controlling the voice control CPU 91 is stored in the voice control ROM 93 in the sound board 544, even when the sound board 544 is used for other types of pachinko machines, the control of the voice control CPU 91 is performed. You can use it without changing or adding programs.

  Next, a voice control device 634 according to a sixth embodiment of the present invention will be described with reference to FIG. FIG. 11 is a block diagram showing details of the voice control device 634 according to the sixth embodiment. The voice control device 634 of the sixth embodiment is different from the relay board 500 of the fifth embodiment only in the structure of the relay board 600, and whether or not a memory board having a preset capacity is connected. This is characterized in that this determination can be made with a simple configuration using ID information. Therefore, the same components as those in the fifth embodiment are denoted by the same reference numerals, and the description thereof is omitted or simplified.

  As shown in FIG. 11, the relay substrate 600 in the voice control device 634 of the sixth embodiment has a second decoding circuit for selecting one of the two memory substrates connected to the connectors 616 and 617. 201 and an ID information conversion circuit 602 that converts ID information input via the connectors 616 and 617 and outputs the ID information to the voice control CPU 91 of the sound board 544. The ID information conversion circuit 602 is provided with a transistor 605 and a photocoupler 610. The photocoupler 610 is an IC including a light emitting diode 611 and a phototransistor 612. By using this, an input signal and an output signal are electrically insulated, so that electrical noise can be avoided.

  Next, the circuit structure of the ID information conversion circuit 602 will be described. First, the base of the transistor 605 is connected to the terminal 1A and the terminal ID1, the collector is connected to the power supply potential, and the emitter is connected to the anode of the light emitting diode 611 in the photocoupler 610. The cathode of the light emitting diode 611 is connected to the terminal 2A. In the photocoupler 610, the collector of the phototransistor 612 is connected to the power supply potential and the terminal ID0, and the emitter is connected to the ground. The terminals 1B and 2B are both connected to the ground.

  Next, signals output from the ID information conversion circuit 602 to the voice control CPU 91 will be described. Since the ID0 signal line 527 of the 4 GB memory board 520 is connected to the power supply potential, a signal indicating “High” is sent to the terminal ID1 on the voice control CPU 91 side connected to the ID0 signal line 527 via the terminal 1A. Is output. In the transistor 605, since a voltage with a positive base is applied between the base and the emitter, a current flows through the transistor 605, and the light-emitting diode 611 of the photocoupler 610 emits light. Then, since a current flows through the phototransistor 612 in the photocoupler 610, a signal indicating “Low” is output to the terminal ID0 on the voice control CPU 91 side.

  The voice control CPU 91 receives “Low” at the terminal ID 0 and “High” at the terminal ID 1, so that the 4 GB memory board 520 is connected to the connector 616 side of the relay board 600 and the 2 GB memory is connected to the connector 617 side. It is recognized that the substrate 530 is connected. The ROM 583 of the sub-integrated board 58 stores information indicating the capacity of a regular memory board to be connected to the sound board 544 and is output to the sound control CPU 91. Then, the voice control CPU 91 determines whether or not the capacity of the memory board recognized by the signal input from the relay board 600 matches the capacity recognized by the signal input from the sub-integrated board 58. Do. As a result, when it is determined that they match, the speakers 32 and 33 can be controlled based on the recognized capacity.

  In this way, using the ID information stored in the memory boards 520 and 530, the capacity of the regular memory board set in advance in the sub-integrated board 58 and the memory board actually connected to the sound board 544 are stored. It can be determined whether or not the capacity is consistent. Based on the determination result, the speakers 32 and 33 can be controlled. Here, the circuit configuration of the ID information conversion circuit 602 shown in FIG. 11 is not limited to this, and can be changed as appropriate. The ROM 583 of the sub-integrated board 58 corresponds to “appropriate storage capacity storage means” of the present invention, and the voice control CPU 91 corresponds to “appropriate storage capacity determination means”.

  Needless to say, the present invention is not limited to the above-described embodiment, and various modifications are possible. For example, in the first to sixth embodiments, the voice control program necessary for the control of the voice control CPU 91 is stored in the voice control ROM 93 of the voice control unit 79, but the memory board storing the voice control program is used as the sound board. It can also be detachably provided.

  The sound board 44 of the first to third embodiments is provided with two connectors 84 and 85 for connecting a memory board or a relay board, and 32-bit data is sent from each connector to the voice control LSI 80. The buses 86 and 87 are connected, but the number of connectors provided on the sound board 44 is not limited to two. For example, four connectors for connecting a memory board or a relay board are arranged on the sound board 44, and four 16-bit memory boards are connected by connecting a 16-bit data bus from each connector to the audio control LSI 80. It can also be connected to a 64-bit audio control LSI 80. That is, in the second and third embodiments, the relay board is used to increase the number of memory boards connected to the sound board 44, but the memory board to be connected can be increased by increasing the number of connectors of the sound board 44. You can also increase the number of Further, it is possible to connect three or more memory boards to the sound board 44 by changing the structure of the relay board. Thus, the connection variation is not limited to the above embodiment.

  Further, the data bus width of each substrate and IC shown in the above embodiment is merely an example, and it is needless to say that it can be changed as appropriate. For example, the audio control LSI 80 of the above embodiment has 64 bits, but the present invention can be applied to other values such as 8 bits, 16 bits, 32 bits, 128 bits, 256 bits, and the like. Similarly, for the CPU, the memory board, and the ROM built in the memory board, even if the data bus width is different such as 8 bits, 16 bits, 32 bits, 64 bits, 128 bits, 256 bits, etc., the present invention. Can be applied. Similarly, the voice control CPU 91 of the above embodiment is a CPU compatible with a maximum of 8 GB, but this can be changed. In the fifth and sixth embodiments, the case where the 4 GB memory substrate 520 and the 2 GB memory substrate 530 are connected to the sound substrate 44 has been described. However, in the case of using memory substrates of various capacities such as 6 GB and 8 GB. Of course, the present invention can be applied.

  Further, it is sufficient that one or more ROMs are mounted on the memory substrate, and the number and capacity of the mounted ROMs are not limited by the above embodiment. For example, in the first embodiment, two 32-bit ROMs are mounted on each of the first memory board 120 and the second memory board 130, and a signal for selecting one ROM is generated by the decoding circuits 124 and 134. A 32-bit memory substrate is configured. However, the memory board of the first embodiment is not provided with a decoding circuit as in the memory board of the second embodiment, and by connecting two 16-bit ROMs and four 8-bit ROMs in parallel, a 32-bit memory is provided. A memory substrate can also be constructed. Further, a memory board on which one 32-bit ROM is mounted can be connected. The ROM used in the fifth and sixth embodiments has a capacity of 1 GB. The 4 GB memory board has four ROMs and the 2 GB memory board has two ROMs. The capacity and the number of can be changed as appropriate. In addition, the number of ROMs can be reduced by changing the installed ROM to a ROM with a large capacity. On the other hand, if there is an inventory of ROMs with a small capacity, the number of ROMs to be used can be increased. Thus, a memory substrate having a large capacity can be manufactured.

  In the fifth embodiment, the connectors 518 and 519 of the memory boards 520 and 530 can be connected to both the connectors 516 and 517 of the relay board 500 and the connector 588 of the sound board 544. Therefore, a plurality of memory boards can be connected to the sound board 544 via the relay board 500, and one memory board can be directly connected to the sound board 544. As a result, the degree of freedom of connection of the memory substrate is improved.

  On the other hand, it is possible to use a plurality of types of connectors, thereby reducing connection errors when the capacity of the memory substrate to be connected is determined. Specifically, by making the shape of the connector dedicated for the 4 GB memory board 520 different from the shape of the connector dedicated for the 2 GB memory board 530, the 2 GB memory board cannot be connected to the connector dedicated for 4 GB. , Less mistakes. Further, if the connector of the memory board on which the program ROM is mounted and the connector of the memory board on which the ROM on which the sound source data is stored have different shapes, each memory board can be appropriately connected to the sound board 544. . Thus, it is possible to prevent different types of memory boards from being connected while maintaining the degree of freedom of connection within the same type of memory board and the degree of freedom in reusing components.

  Further, when a plurality of types of connectors are used, even if there is no physical compatibility between the connectors, the signal lines may be the same to provide compatibility. Furthermore, the signal lines are not compatible between all the connectors, but the signal lines are the same between only some of the multiple types of connectors, and the other connectors are compatible. You may comprise so that it may not exist. This makes it possible to distinguish between connectors that have compatible signal lines and connectors that do not have compatible signal lines, so it is possible to improve the degree of freedom of connection between compatible connectors. It is possible to prevent malfunctions due to connection, connection errors, and the like.

  Also, when multiple types of connectors are used, physical compatibility is not provided between all connectors, but only some of the multiple types of connectors are physically compatible. The other connectors may be configured so as not to have physical compatibility. Furthermore, instead of making the shape between all connectors compatible, only the shape between some of the connectors is compatible, and the shape between other connectors is compatible. You may make it not have sex. Thereby, a compatible connector and an incompatible connector can be distinguished, and a connection error can be prevented while improving the degree of freedom of connection between compatible connectors.

  In order to connect a plurality of types of memory boards having different connector shapes, a plurality of types of connectors can be provided in advance on the sound board side or the relay board side. Specifically, the connector A and the connector B are provided in advance on one sound board, and if the connector provided on the memory board to be connected is the connector A, it is fitted to the connector A of the sound board. Thereafter, when the voice control device is applied to another type of gaming machine, if the connector provided on the memory board to be connected is the connector B, the voice control apparatus is fitted to the connector B of the sound board. Thus, in addition to being able to connect a plurality of types of memory boards having different storage capacities to the sound board, a plurality of types of memory boards having different connector shapes can be connected to one sound board, and a plurality of one memory board can be connected. It is also possible to connect to various types of sound boards. That is, the versatility of the sound board and the memory board can be improved. Therefore, it is possible to more easily reduce costs in terms of reuse of parts and ease of design.

  The sound board 44 does not need to be separated from other boards, for example, the sub-integrated board 58, the main board 41, the effect control board 43, the payout control board 45, the electrical decoration board 46, the intermediate board 47, etc. It may be a composite unit integrated with such a substrate. Further, the IC mounted on the memory substrate is not limited to the flash ROM, and may be a ROM such as an EPROM or an EEPROM, or a storage medium other than the ROM. Also, a plurality of types of ROM may be used for one gaming machine voice control device, and a plurality of types of ROM may be used for one memory board. Furthermore, a plurality of different types of storage media can be used for one memory substrate. Therefore, for example, the EPROM and the EEPROM can be mounted on one memory substrate, and both a specific type of ROM and a storage medium other than the ROM can be mounted on one memory substrate.

  The gaming machine of the present invention is not limited to a pachinko machine, but can be applied to various gaming machines such as a pachikon machine and a pachislot machine, and a sound control device thereof.

It is the perspective view which looked at the state where the front frame 14 and the middle frame 13 of the pachinko machine 1 were opened from diagonally forward. 1 is a front view of a pachinko machine 1. FIG. 2 is a block diagram showing an electrical configuration of the pachinko machine 1. FIG. It is a block diagram which shows the detail of the audio | voice control apparatus 34 of 1st embodiment. It is a block diagram which shows the detail of the audio | voice control apparatus 234 of 2nd embodiment. It is a block diagram which shows the detail of the audio | voice control apparatus 334 of 3rd embodiment. It is a block diagram which shows the detail of the audio | voice control apparatus 434 of 4th embodiment. It is a block diagram which shows the detail of the audio | voice control apparatus 534 of 5th embodiment. It is a figure which shows the relationship between ID information input into the audio | voice control CPU91, and the memory capacity which the audio | voice control CPU91 recognizes. It is the figure which compared the memory map when not using ID information, and the memory map when using ID information. It is a block diagram which shows the detail of the audio | voice control apparatus 634 of 6th embodiment.

Explanation of symbols

1 Pachinko machine 32, 33 Speaker 34, 234, 334, 434, 534, 634 Voice control device 41 Main board 44, 444, 544 Sound board 58 Sub integrated board 79 Voice control unit 80 Voice control LSI
84, 85, 483, 484, 485 Connector 86, 87, 486, 487 Data bus 91 Voice control CPU
120, 130, 220, 230, 240, 250, 320, 330, 340, 350, 420, 430, 440, 520, 530 Memory board 201, 211, 301, 311, 500, 600 Relay board 501, 601 Second decoding Circuit 502 ID information decoding circuit 525, 535 First decoding circuit 526, 536 ID information storage unit 602 ID information conversion circuit

Claims (9)

A main control board that controls the main control of the game of the gaming machine and transmits a signal according to the control,
Pronunciation means for generating sounds according to the game;
A voice control controller that performs voice synthesis by a signal received from the main control board and outputs a voice signal; and a sound board that controls generation of voice by the sound generation unit;
A voice control device for gaming machines having a memory in which sound source data used in the voice control controller is stored, and a memory board detachably attached to the sound board;
The sound board includes a plurality of connection portions for connecting the memory board,
A voice control device for a gaming machine, wherein a plurality of data buses extending from the connection portion are connected in parallel to the voice control controller. A relay board for connecting the connection portion of the sound board and the plurality of memory boards;
The voice control device for gaming machines according to claim 1, wherein a plurality of the memory boards are connected to one of the connection portions via the relay board.   3. The gaming machine according to claim 1, wherein a total of data bus widths of the plurality of data buses connecting the connection unit and the voice control controller is equal to a data bus width of the voice control controller. Voice control device. A main control board that controls the main control of the game of the gaming machine and transmits a signal according to the control,
Pronunciation means for generating sounds according to the game;
A voice control controller that performs voice synthesis by a signal received from the main control board and outputs a voice signal; and a sound board that controls generation of voice by the sound generation unit;
A plurality of memories storing sound source data used in the voice control controller, and a memory board detachably attached to the sound board;
A gaming machine voice control device comprising: a first decoding circuit that receives an address signal input from an address bus extending from the voice control controller and generates a signal for selecting one of the plurality of memories. And
A voice control device for a gaming machine, wherein the first decoding circuit is provided on the memory substrate. A second decoding circuit for generating a signal for selecting one of the plurality of memory boards, and a relay board for connecting the sound board and the plurality of memory boards;
The plurality of address signals output from the sound board are located in a chip select signal for selecting one of the plurality of memories and upper bits of the chip select signal, and are stored in the plurality of memory boards. 5. A voice control device for a gaming machine according to claim 4, further comprising a memory board selection signal for selecting one of the signals. ID information storage means that is provided in the memory substrate and stores ID information that is information indicating the storage capacity of the memory substrate;
An ID information decoding circuit for generating a signal for mapping from the ID information,
6. The gaming machine according to claim 5, wherein the second decoding circuit of the relay board generates a signal for selecting the memory board using a signal generated by the ID information decoding circuit. Voice control device.   7. The voice control device for gaming machines according to claim 6, wherein the voice control controller recognizes a storage capacity of the memory board connected to the sound board using the ID information. Appropriate storage capacity storage means for storing in advance the storage capacity of the appropriate memory board connected to the sound board;
Referring to the storage capacity stored in the appropriate storage capacity storage means and the storage capacity recognized by the ID information, the storage capacity of the memory board connected to the sound board is preset. The voice control device for gaming machines according to claim 6 or 7, further comprising appropriate storage capacity determination means for determining whether or not the capacity.   A gaming machine comprising the gaming machine voice control device according to any one of claims 1 to 8.

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