JP2008166391A - Method of forming conductor pattern and electronic component - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a method of forming a conductor pattern useful for improving an occupied rate in using a conductive substrate, and an electronic component further reduced in size and thickness. <P>SOLUTION: The method of forming a conductor pattern has: a step of forming a resist 4 including a lower resist 2 having insulation and an upper resist 3 having insulation and made of a material different from that of the lower resist 2, and having an opening 40 for exposing the conductive substrate 1, on the conductive substrate 1; a step of forming a center conductor layer 11 on the conductive substrate 1 in the opening 40 of the resist 4 by electric plating using the conductive substrate 1 as a base; a step of removing the upper resist 3; and a step of forming a surface conductor layer 12 on the exposed surface of the center conductor layer 11 by electric plating using the center conductor layer 11 as a base. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

  The present invention relates to a method for forming a conductor pattern and an electronic component, and more particularly to a method for forming a conductor pattern using electroplating and an electronic component including the conductor pattern.

  In recent years, small portable devices such as mobile phones and notebook personal computers are rapidly spreading. In order to make these devices smaller, thinner, and higher performance, the inductors and transformers used in these devices and electronic components such as printed wiring boards on which they are mounted are also being made smaller and thinner. Is an important issue.

In order to achieve both miniaturization and thinning of electronic components, it is important to increase the space factor of the conductor pattern. In order to improve the space factor of the conductor pattern, various methods for forming a conductor pattern have been proposed (see Patent Document 1). The space factor of the conductor pattern means the ratio of the cross-sectional area of the conductor pattern per unit area in the cross section perpendicular to the extending direction of the conductor pattern.
JP 2001-267166 A

  However, there is already a limit to the method for forming a conductor pattern with a high space factor on the plane of an insulating substrate having a desired thickness. Therefore, a technique is required in which a conductor pattern is formed on a base material having a desired thickness, and then the conductor pattern is transferred onto a thin insulating substrate (insulating layer). Thereby, since the final thickness of the substrate can be reduced, a conductor pattern having a higher space factor can be realized.

  When the transfer technique is adopted, it is not always necessary to use an insulating substrate as a base material. When electroplating is used for forming the conductor pattern, it is more advantageous from the viewpoint of productivity to use a conductive substrate than to use an insulating substrate as a base material. Thus, there is a need for a method of forming a conductor pattern with a high space factor on a conductive substrate.

  An object of the present invention is to provide a method of forming a conductor pattern useful for improving the space factor when a conductive substrate is used, and an electronic component that can realize further miniaturization and thinning.

  The method for forming a conductor pattern according to the present invention includes an insulating lower layer resist and an upper resist made of a different material from the lower resist, having an insulating property, on the conductive substrate, and exposing the conductive substrate. Forming a resist having a portion, forming a central conductor layer on the conductive substrate in the opening of the resist by electroplating using the conductive substrate as a base, and removing the upper resist And a step of forming a surface conductor layer on the exposed surface of the center conductor layer by electroplating using the center conductor layer as a base.

  In such a method for forming a conductor pattern, first, a central conductor layer is formed in the opening of the resist by electroplating using a conductive substrate as a base. Note that the conductive substrate includes a conductive material formed into a substrate shape and a conductive substrate formed on an insulating substrate. The width and interval of the central conductor layer are determined by the width and interval of the opening formed in the resist. After the upper layer resist is removed, a surface conductor layer is formed on the exposed surface of the center conductor layer by electroplating with the center conductor layer as a base. By forming the surface conductor layer, the width of the conductor pattern composed of the center conductor layer and the surface conductor layer can be wider than that of the center conductor layer, and the distance between the conductor patterns can be narrower than the distance between the center conductor layers. Since the lower layer resist is formed, the plating growth from the conductive substrate at the bottom between the central conductor layers can be prevented, so that a short circuit between adjacent conductor patterns can be prevented. The interval between the conductor patterns can be adjusted by controlling the conditions (time, current, etc.) of electroplating the surface conductor layer. Therefore, in the present invention, a conductor pattern having a space factor higher than the space factor determined by the resolution of the resist and lithography can be formed. Alternatively, a conductor pattern with a high space factor can be formed even when the resolution of resist and lithography is low. Further, when the width of the opening of the resist is increased in order to narrow the interval between the conductor patterns, there is a problem that the resist has a high aspect ratio and the resist easily falls down. In the present invention, a conductor pattern having a width wider than the width of the opening can be obtained without increasing the width of the opening of the resist, and problems such as the falling of the resist can be prevented.

  For example, the step of forming the resist includes the step of forming the lower layer resist on the conductive substrate, the step of forming the upper layer resist having the opening on the lower layer resist, and the upper layer resist as a mask. Forming an opening in the lower layer resist by etching. From the viewpoint of mass productivity, wet etching is preferably used for etching the lower layer resist.

  Further, the step of forming the lower layer resist includes a step of forming a metal layer on the conductive substrate by electroplating using the conductive substrate as a base, and an insulating treatment of the metal layer on the conductive substrate. And forming the lower layer resist. Accordingly, a uniform and thin lower layer resist can be formed on the conductive substrate without using a dry process such as vapor deposition, and productivity can be improved.

  Further, after the step of forming the surface conductor layer, the side on which the conductor pattern composed of the center conductor layer and the surface conductor layer is formed is covered with an insulating material on the conductive substrate. It is preferable to have the process of carrying out, and the process of peeling the said electroconductive board | substrate. Thereby, a conductor pattern can be transcribe | transferred to an insulating material. Therefore, the final thickness of the substrate (insulating material) can be reduced while ensuring the thickness of the conductive substrate required in the process from the viewpoint of strength and dimensional stability. As a result, the space factor of the conductor pattern can be further improved. The insulating material may be processed into a sheet shape or liquid.

Alternatively, after the step of forming the surface conductor layer, the two conductive substrates on which the conductor pattern composed of the center conductor layer and the surface conductor layer is formed are opposed to each other, and the adhesive property is maintained. A step of pasting together with an insulating material having
Preferably, the step of peeling the two conductive substrates on both sides of the insulating material. Thereby, the space factor of a conductor pattern can be improved further. The insulating material may be processed into a sheet shape or liquid.

  An electronic component according to the present invention includes an insulating sheet, and a conductor pattern embedded in one surface of the insulating sheet and exposed from the one surface of the insulating sheet, and The conductor pattern includes a center conductor layer, and a surface conductor layer that is interposed between the insulating sheet and the center conductor layer and covers the surface of the center conductor layer.

  In such an electronic component, an electronic component having a conductor pattern transferred to an insulating sheet can be realized. Unlike the electronic component provided with the conductor pattern on the insulating substrate, the thickness of the electronic component can be reduced. Thereby, an electronic component with an improved space factor of the conductor pattern can be realized. In the case of an electronic component having a conductor pattern formed by the above-described method for forming a conductor pattern according to the present invention, there is a step between the central conductor layer and the surface conductor layer on one surface of the insulating sheet. It is characteristic.

  The conductive sheet further includes another conductive pattern formed so as to be embedded in the other surface of the insulating sheet so as to face the conductive pattern and having one surface exposed from the other surface of the insulating sheet. Thereby, it is possible to realize an electronic component in which the space factor of the conductor pattern is further improved as compared with the case where it is transferred onto one surface of the insulating sheet.

  According to the method for forming a conductor pattern of the present invention, the pattern of the center conductor layer is defined by the opening of the first resist, and the formation area of the surface conductor layer formed on the surface of the center conductor layer is controlled by the second resist. Thus, the space factor of the conductor pattern can be improved while effectively using electroplating. By such a method for forming a conductor pattern, the electronic component can be reduced in size and thickness.

  Embodiments of the present invention will be described below with reference to the drawings. In the present embodiment, an example in which a conductor pattern for a coil is formed as the conductor pattern will be described, but the present invention is not limited to this.

(First embodiment)
A method for forming a conductor pattern according to this embodiment will be described with reference to FIGS. 1 to 10 are process diagrams showing a state in which a conductor pattern is formed. Each figure (A) is a sectional view, each figure (B) is a perspective view, and each figure (C) is a plan view. . Each figure (A) is a sectional view taken along line AA in each figure (C), each figure (C) is a sectional view taken along line CC in each figure (A), and each figure (B) is shown in FIG. The main part is shown. FIG. 11 is a plan view showing a state in which a conductor pattern is formed.

  As shown in FIGS. 1A to 1C, an insulating lower layer resist 2 is formed on a conductive substrate 1. The conductive substrate 1 is used as a transfer substrate, and the material is not limited. For example, a stainless plate can be used. The stainless steel plate preferably has a thickness in the range of 0.1 mm to 2 mm, for example, to ensure the strength and dimensional stability of the substrate during the process. The stainless steel plate as the transfer substrate desirably has an appropriate roughness, and the surface roughness is preferably in the range of Rmax = 0.2 to 2 μm. If Rmax is less than 0.2 μm, the adhesion between the resist and conductor pattern and the stainless steel plate becomes insufficient, and it becomes easy to peel off. On the other hand, if Rmax exceeds 2 μm, it affects the variation in the film thickness of the conductor pattern, and when used for high frequency, conductor loss increases, which is not preferable. It is preferable to form a passivated film on the surface of the stainless steel plate by a passivating treatment in order to ensure peelability from the conductor pattern. For example, as the conductive substrate 1, a stainless steel plate (SUS304 tension annealed material) having a thickness of 1 mm and a surface roughness Rmax of 0.5 μm is passivated and cut into a size of 100 mm square. .

  Further, when the adhesion and peelability of the resist and the conductor pattern on the stainless steel plate are insufficient, it is preferable to form a Ni film on the stainless steel plate. In this case, the Ni film can be formed by electroplating with the conductive substrate 1 as a base. The thickness of the Ni film is, for example, about 0.5 μm to 1 μm. Note that when the Ni film is formed by a vapor deposition method such as sputtering, the adhesion to the stainless steel plate is too great, and it becomes difficult to peel the stainless steel substrate later.

  As a method for forming the lower layer resist 2, for example, a metal layer is formed on the conductive substrate 1 by electroplating with the conductive substrate 1 as a base, and the metal layer is insulated to form a lower layer having insulating properties. A resist 2 is formed. Specifically, after forming a copper layer of about 1 μm on the conductive substrate 1 by electroplating using the conductive substrate 1 as a base, the copper layer is treated with a sodium sulfide solution to sulfidize the surface. Thereby, the insulating lower resist 2 made of copper sulfide is formed at a low cost and uniformly by a wet process. When a Ni film is formed on the conductive substrate 1 and Ni sulfide is deposited on the Ni film surface by the treatment, the Ni precipitate is easily removed by a thin acid treatment such as dilute sulfuric acid. it can. Alternatively, the insulating lower resist 2 made of copper oxide or copper iodide may be formed by oxidizing or iodizing the copper layer as an insulating treatment. In the case of the oxidation treatment, for example, an oxidizing agent such as sodium hypochlorite can be used. In the case of the iodide treatment, for example, an alkaline solution of potassium iodide or the like can be used. Alternatively, the lower resist 2 may be formed by depositing silicon oxide or silicon nitride on the conductive substrate 1 by a dry process such as a CVD method instead of using electroplating.

  Next, as shown in FIGS. 2A to 2C, the upper resist 3 having an insulating property and an opening 40 having a desired pattern is formed on the lower resist 2. A material different from the lower resist 2 is used as the upper resist 3 so that the upper resist 3 can be selectively removed later with respect to the lower resist 2.

  In this embodiment, as shown in FIG. 2C, the opening 40 is connected to the coil pattern opening 41, one electrode opening 42 connected to the coil pattern, and the coil pattern. The opening 43 for the other electrode is formed. The opening 42 communicates with the opening 41. Note that the openings 41 to 43 are simply referred to as the openings 40 when it is not necessary to distinguish the openings 41 to 43. The width and interval of the opening portions of the coil pattern are not particularly limited. For example, the width is 100 μm and the interval is 30 μm.

  As a method for forming the upper layer resist 3, for example, a dry film as a photoresist having a thickness of 40 μm to 50 μm is laminated on the lower layer resist 2, and an opening for a desired conductor pattern is formed by photolithography (exposure and development). Forming part. An alkali-soluble resist can be used as the dry film. Note that a photolithography process may be performed after applying and drying a liquid resist solution.

  Next, as shown in FIGS. 3A to 3C, the lower resist 2 exposed in the opening 40 of the upper resist 3 is removed by etching using the upper resist 3 as a mask. As a result, a resist 4 made of a laminate of the lower layer resist 2 and the upper layer resist 3 and having a desired opening 40 is formed on the conductive substrate 1.

When copper sulfide, copper oxide, or copper iodide is used as the lower layer resist 2, inexpensive wet etching can be adopted as the etching. For example, hydrogen peroxide water can be used for wet etching of copper sulfide. For example, dilute sulfuric acid can be used as a wet etching solution when the lower layer resist 2 is copper oxide or copper iodide. When SiO ₂ or SiN is used as the lower resist 2, dry etching is used as the etching.

  Next, as shown in FIGS. 4A to 4C, the central conductor layer 11 is formed on the conductive substrate 1 in the opening 40 of the resist 4 by electroplating using the conductive substrate 1 as a base. . The center conductor layer 11 is preferably made of a metal having a low electric resistance such as Au, Ag, Al, or Cu, but Cu is most preferred from the viewpoint of cost and plating productivity. The thickness of the central conductor layer 11 is not limited, and is, for example, 35 μm to 40 μm.

  In the electroplating of the copper layer, a copper sulfate plating solution can be used. The composition of the copper sulfate plating solution is, for example, copper sulfate pentahydrate 20 g / liter, sulfuric acid 100 g / liter, chlorine 60 mg / liter, and an appropriate amount of brightener is added.

  Next, as shown in FIGS. 5A to 5C, the upper resist 3 is peeled off. At this time, it is necessary to selectively peel the upper layer resist 3 from the lower layer resist 2. For example, the upper resist 3 is peeled off by heating a 5% aqueous sodium hydroxide solution to 50 ° C. and spraying the upper resist 3 at a pressure of 0.15 MPa.

  Next, as shown in FIGS. 6A to 6C, the surface conductor layer 12 is formed on the exposed surface of the center conductor layer 11 by electroplating using the center conductor layer 11 as a base. Thereby, the conductor pattern 10 which consists of the center conductor layer 11 and the surface conductor layer 12 is formed. Since the lower layer resist 2 is formed on the conductive substrate 1 between the central conductor layers 11, the formation of the conductor layer from the bottom between the conductive substrates 1 can be prevented, and a short circuit between adjacent conductor patterns 10 can be prevented. Can be prevented. The material of the surface conductor layer 12 is not particularly limited, and a material different from that of the center conductor layer 11 may be used. However, from the viewpoint of simplifying the manufacturing process, it is preferable to use the same material as that of the center conductor layer 11.

  The growth rate of the surface conductor layer 12 during electroplating may be the same or different in the width direction and the thickness direction, but is anisotropically grown so that the growth rate is increased in the thickness direction. Thus, a conductor pattern having a higher aspect ratio can be obtained.

  After the step of forming the surface conductor layer 12, the conductor pattern 10 is preferably roughened. By this roughening treatment, the adhesive force between the conductor pattern 10 and a resin that coats the conductor pattern 10 later can be enhanced. In the roughening treatment, a blackening treatment with sodium hypochlorite, a treatment with a formic acid-based treatment solution (for example, CZ treatment by MEC), a sulfuric acid / hydrogen peroxide-based treatment (for example, MB treatment by Nihon McDermid) is used. The sulfuric acid / hydrogen peroxide treatment is preferable in terms of reliability because the treatment liquid can be made chlorine-free. In the case of blackening treatment, hydrochloric acid is used in the treatment solution itself, or in the CZ treatment because hydrochloric acid is used for post-treatment, which is not preferable. Here, the upper surface and both side surfaces of the conductor pattern 10 are roughened, but the stainless steel plate is not roughened. Thus, it is preferable to use stainless steel for the conductive substrate 1 because a large number of treatment liquids capable of roughing only the conductor pattern can be selected.

  Next, as shown in FIGS. 7 (A) to (C), the insulating sheet 5 and the conductive substrate 1 are overlapped with the insulating sheet 5 having adhesiveness so that the conductive pattern 10 is opposed to the heating and heating. Press. A prepreg is used as the insulating sheet 5 having adhesiveness. For example, after the conductive substrate 1 on which the conductor pattern 10 is formed is dried in a convection oven at 100 ° C. for 30 minutes, a 50 μm thick epoxy resin prepreg without a core material is placed on the pattern surface, and a Teflon ( Place (registered trademark) sheet and press. Thereby, the conductor pattern 10 whose upper surface and side surfaces are roughened is embedded in the surface of the prepreg. In order to suppress generation | occurrence | production of a void, it is preferable to use a vacuum press for a press. In addition, you may use the prepreg with a core material instead of the prepreg without a core material. Also, instead of or together with the core material, a prepreg mixed with a filler for adjusting the linear expansion coefficient, or a prepreg mixed with a high dielectric constant filler to increase the dielectric constant may be used. . The insulating sheet 5 can also be formed by applying a liquid resin on the conductive substrate 1 and curing it by heating or the like.

  Next, as shown in FIGS. 8A to 8C, the conductive substrate 1 is peeled off. 8 to 11 are illustrated upside down from FIGS. 1 to 7. By peeling off the conductive substrate 1, a substrate is obtained in which the conductive pattern 10 with the upper surface and both side surfaces roughened is embedded in one surface (transfer surface) of the insulating sheet 5. At this time, the conductor pattern 10 is embedded so that one surface of the insulating sheet 5 is substantially smooth. Further, the conductor pattern 10 is exposed from one surface of the insulating sheet 5. When the Ni film adheres to the conductor pattern 10 and the insulating sheet 5 side, the Ni film is removed by a technique that allows selective etching with respect to the conductor pattern 10.

Next, as shown in FIGS. 9A to 9C, the lower layer resist 2 existing on one surface of the insulating sheet 5 is removed. When copper sulfide, copper oxide, or copper iodide is used as the lower layer resist 2, inexpensive wet etching can be adopted as the etching. For example, hydrogen peroxide water can be used for wet etching of copper sulfide. When SiO ₂ or SiN is used as the lower layer resist 2, it is also preferable to use dry etching as the etching. Note that the insulating layer may function without removing the lower layer resist.

  9C, as the conductor pattern 10, the coil pattern 10a, one electrode 10b connected to the coil pattern 10a, and the other electrode 10c connected to the coil pattern are formed. It is formed. In particular, when it is not necessary to distinguish the coil pattern 10a and the electrodes 10b and 10c, they are simply referred to as the conductor pattern 10.

Next, as shown in FIGS. 10A to 10C, the insulating layer 6 is formed on one surface of the insulating sheet 5. As a method for forming the insulating layer 6, for example, a resin is applied on one surface of the insulating sheet 5 except for a contact portion with the conductor pattern 10 and is thermally cured. In the present embodiment, the insulating layer 6 is formed except for the one end 10d of the coil pattern 10a and the electrodes 10b and 10c. After the insulating layer 6 is formed on the entire exposed surface of the conductor pattern 10, a resist is formed on the insulating layer 6, and the insulating layer 6 formed on the contact portion is removed by etching using the resist as a mask. May be. As the insulating layer 6, an inorganic film such as SiO ₂ or SiN may be used in addition to the resin.

  Next, as shown in FIG. 11, the electrode 7 connected to the conductor pattern 10 is formed. This electrode 7 makes necessary connection between the conductor patterns 10. In this example, an electrode 7b connected to one end 10d of the coil pattern 10a and the electrode 10b and an electrode 7c connected to the electrode 10c are formed.

  The electrode 7 is formed using, for example, a conductive paste. Examples of the conductive paste include silver paste, copper paste, and solder paste. Further, it may be a conductive paste that forms an alloy layer by preheating. When such a conductive paste is used, it is preferable that the melting temperature of the alloy is high. The electrode 7 can be formed by screen printing the conductive paste or injecting it with a syringe. Note that after the electrode layer is formed on the entire surface of the insulating layer 6, the pattern of the electrode 7 may be formed by etching using a resist.

  Through the above steps, the electronic component shown in FIG. 12 is formed. In addition, in FIG. 12, the state which saw through the coil is shown. In FIG. 12, a spiral planar coil is shown, but a square coil may be used. Further, the present invention is not limited to the coil conductor pattern 10 and can be applied to any method for forming a conductor pattern constituting an electronic component such as a resistor, a capacitor, or a transistor. In this specification, an electronic component includes all functional elements including a conductor pattern, and includes both passive elements and active elements.

  The conductor pattern 10 formed by the conductor pattern forming method according to the present embodiment has the following structural features. That is, as shown in part C of FIG. 9A, there is a step between the central conductor layer 11 and the surface conductor layer 12 on one surface of the insulating sheet 5.

  In the method for forming a conductor pattern according to this embodiment, the central conductor layer 11 is formed in the opening 40 of the resist 4 by electroplating with the conductive substrate 1 as a base. The width and interval of the central conductor layer 11 are determined by the width and interval of the opening 40 formed in the resist 4. After the upper layer resist 3 is removed, the surface conductor layer 12 is formed on the exposed surface of the center conductor layer 11 by electroplating with the center conductor layer 11 as a base. By forming the surface conductor layer 12, the width of the conductor pattern 10 composed of the center conductor layer 11 and the surface conductor layer 12 can be made wider than the center conductor layer 11. Can narrow. Since the lower layer resist 2 is formed, plating growth from the conductive substrate 1 at the bottom between the central conductor layers 11 can be prevented, so that a short circuit between adjacent conductor patterns 10 can be prevented. The interval between the conductor patterns 10 can be adjusted by controlling the conditions (time, current, etc.) of electroplating the surface conductor layer. Therefore, in this embodiment, it is possible to form the conductor pattern 10 having a space factor higher than the space factor determined by the resist 4 and the resolution of lithography. Alternatively, the conductor pattern 10 having a high space factor can be formed even when the resolution of the resist 4 and lithography is low.

  As described above, according to the method for forming a conductor pattern according to the present embodiment, the space factor of the conductor pattern can be improved while effectively using electroplating. Therefore, it is particularly useful when using a conductive substrate. It will be something. By such a method for forming a conductor pattern, the electronic component can be reduced in size and thickness.

  In addition, since the method for forming a conductor pattern according to the present embodiment uses electroplating for forming the conductor pattern 10 and wet etching can be used for etching, compared to a case where a dry process (vacuum deposition, dry etching, etc.) is used. Productivity can be improved.

  Furthermore, after the conductor pattern 10 is formed on the conductive substrate 1 having a desired thickness, the conductor pattern 10 is transferred to one surface of the thin insulating sheet 5 to further increase the space factor of the conductor pattern 10. The electronic component including the conductor pattern can be thinned.

  Further, when the electronic component is a coil, the width of the coil pattern can be increased or the number of turns of the coil pattern can be increased. Increasing the width of the coil pattern leads to lower resistance of the coil, and increasing the number of turns of the coil pattern leads to improvement of the coil inductance.

(Second Embodiment)
A method for forming a conductor pattern according to the second embodiment will be described with reference to FIGS. 13 to 15 are process cross-sectional views showing a state in which a conductor pattern is formed. In the second embodiment, an example will be described in which the conductor pattern is transferred to both surfaces of the insulating sheet to improve the space factor as compared with the first embodiment.

  As shown in FIG. 13, the insulating sheet 8 and the two conductive substrates 1 are stacked and heated and pressed with the conductive pattern 10 facing the both surfaces of the insulating sheet 8 having adhesiveness. A prepreg can be used as the insulating sheet 8. For example, after two conductive substrates 1 on which the conductor pattern 10 is formed are dried in a convection oven at 100 ° C. for 30 minutes, the two conductive substrates 1 are arranged on both sides of a 50 μm-thick epoxy resin prepreg. And press. Thereby, the conductor pattern 10 whose upper surface and side surfaces are roughened is embedded in the surface of the prepreg. In order to suppress generation | occurrence | production of a void, it is preferable to use a vacuum press for a press. In addition, you may use the prepreg with a core material instead of the prepreg without a core material. Also, instead of or together with the core material, a prepreg mixed with a filler for adjusting the linear expansion coefficient, or a prepreg mixed with a high dielectric constant filler to increase the dielectric constant may be used. . Note that two conductive substrates 1 may be stacked and heated and pressurized with a liquid resin interposed. In this case, the liquid resin is cured by heating to form the insulating sheet 8.

  Next, as shown in FIG. 14, the two conductive substrates 1 on both sides of the insulating sheet 8 are peeled off. By peeling off the conductive substrate 1, a substrate in which the conductor pattern 10 is embedded on both surfaces of the insulating sheet 8 is obtained. At this time, the conductor pattern 10 is embedded so that both surfaces of the insulating sheet 8 are substantially smooth. In addition, the conductor pattern 10 is exposed from both surfaces of the insulating sheet 8. When the Ni film adheres to the conductor pattern 10 and the insulating sheet 8 side, the Ni film is removed by a technique that allows selective etching with respect to the conductor pattern 10.

Next, as shown in FIG. 15, the lower layer resist 2 existing on both surfaces of the insulating sheet 8 is removed. When copper sulfide, copper oxide, or copper iodide is used as the lower layer resist 2, inexpensive wet etching can be adopted as the etching. For example, hydrogen peroxide water can be used for wet etching of copper sulfide. When SiO ₂ or SiN is used as the lower resist 2, dry etching is used as the etching.

  In the subsequent steps, as in the first embodiment, the insulating layer 6 is formed on both surfaces of the adhesive sheet 8, and the electrode 7 for obtaining conduction and necessary electrical connection to the conductor pattern 10 is insulative. Formed on both sides of the sheet 8. The difference from the first embodiment is that the insulating layer 6 and the electrode 7 are formed on both sides of the adhesive sheet 8, respectively. As described above, the electronic component, for example, the coil according to the present embodiment is manufactured.

  According to the method for manufacturing a conductor pattern according to the present embodiment, the space factor of the conductor pattern 10 is further improved compared to the first embodiment by transferring the conductor pattern 10 onto both surfaces of one adhesive sheet 8. Can be made.

The present invention is not limited to the description of the above embodiment.
For example, the electronic component according to the present embodiment may include a plurality of functional elements such as coils and resistors. In addition, the materials and numerical values given in the present embodiment are examples, and the present invention is not limited to these.
In addition, various modifications can be made without departing from the scope of the present invention.

  According to the present invention, an electronic component that is reduced in size and thickness can be obtained. Therefore, the electronic component can be widely and effectively used particularly in a device that requires reduction in size and performance, such as a portable device including the electronic component. be able to. Examples of the electronic component of the present invention include a planar coil, a transformer using the planar coil, and a common mode filter. Further, the present invention can be applied to electronic parts such as a printed wiring board.

It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 1st Embodiment. It is a perspective view which shows the conductor pattern which concerns on 1st Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 2nd Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 2nd Embodiment. It is process drawing which shows the state which forms the conductor pattern which concerns on 2nd Embodiment.

Explanation of symbols

  DESCRIPTION OF SYMBOLS 1 ... Conductive substrate, 2 ... Lower layer resist, 3 ... Upper layer resist, 4 ... Resist, 5 ... Insulating sheet, 6 ... Insulating layer, 7 ... Electrode, 8 ... Insulating sheet, 10 ... Conductor pattern, 10a ... Coil pattern DESCRIPTION OF SYMBOLS 10b, 10c ... Electrode, 11 ... Center conductor layer, 12 ... Surface conductor layer, 40 ... Opening part.

Claims (7)

Forming a resist having an opening on the conductive substrate, including a lower resist having an insulating property, and an upper resist made of a material different from the lower resist having an insulating property, and exposing the conductive substrate;
Forming a central conductor layer on the conductive substrate in the opening of the resist by electroplating on the conductive substrate; and
Removing the upper layer resist;
Forming a surface conductor layer on the exposed surface of the center conductor layer by electroplating with the center conductor layer as a base; and
A method of forming a conductor pattern having The step of forming the resist includes
Forming the lower layer resist on the conductive substrate;
Forming the upper layer resist having the opening on the lower layer resist;
Forming an opening in the lower resist by etching using the upper resist as a mask;
The method for forming a conductor pattern according to claim 1, comprising: The step of forming the lower resist includes
Forming a metal layer on the conductive substrate by electroplating with the conductive substrate as a base; and
Insulating the metal layer on the conductive substrate to form the lower layer resist;
The method for forming a conductor pattern according to claim 2, comprising: After the step of forming the surface conductor layer,
Covering the conductive substrate on the conductive substrate, on which the conductor pattern composed of the central conductor layer and the surface conductor layer is formed, and an insulating material having adhesiveness;
Peeling the conductive substrate;
The method for forming a conductor pattern according to claim 1, comprising: After the step of forming the surface conductor layer,
The two conductive substrates on which the conductor pattern composed of the center conductor layer and the surface conductor layer is formed are bonded together with the conductor patterns facing each other and an insulating material interposed therebetween. Process,
Peeling the two conductive substrates on both sides of the insulating material;
The method for forming a conductor pattern according to claim 1, comprising: Insulation,
A conductive pattern embedded in one surface of the insulating material and exposed from the one surface of the insulating material,
The conductor pattern is
A central conductor layer;
A surface conductor layer interposed between the insulating material and the central conductor layer and covering a surface of the central conductor layer;
Having electronic components. And further having another conductor pattern formed to be embedded in the other surface of the insulating material so as to face the conductor pattern, and one surface exposed from the other surface of the insulating material.
The electronic component according to claim 6.

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