JP2008141167A - 導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法 - Google Patents

導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法 Download PDF

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JP2008141167A
JP2008141167A JP2007251150A JP2007251150A JP2008141167A JP 2008141167 A JP2008141167 A JP 2008141167A JP 2007251150 A JP2007251150 A JP 2007251150A JP 2007251150 A JP2007251150 A JP 2007251150A JP 2008141167 A JP2008141167 A JP 2008141167A
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layer
conductive layer
silicon
substrate
bonded
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JP2008141167A5 (enExample
Inventor
Tomoyuki Aoki
智幸 青木
Takuya Tsurume
卓也 鶴目
Hiromi Yamada
大幹 山田
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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JP2011165803A (ja) * 2010-02-08 2011-08-25 Fujifilm Corp 半導体素子用基板およびその製造方法ならびに半導体装置
JP2011187510A (ja) * 2010-03-04 2011-09-22 Tokyo Univ Of Science 金属微細構造体及びその製造方法並びに樹脂成形物の製造方法
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JP5506172B2 (ja) * 2007-10-10 2014-05-28 株式会社半導体エネルギー研究所 半導体基板の作製方法
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JP2010087500A (ja) * 2008-09-05 2010-04-15 Tokyo Univ Of Science 転写構造体の製造方法及びそれに用いる母型
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KR101549063B1 (ko) 2008-09-05 2015-09-01 도쿄 유니버시티 오브 사이언스 에듀케이셔널 파운데이션 애드미니스트레이티브 오거니제이션 전사구조체의 제조방법 및 이것에 이용하는 모형
JP2011165803A (ja) * 2010-02-08 2011-08-25 Fujifilm Corp 半導体素子用基板およびその製造方法ならびに半導体装置
JP2011187510A (ja) * 2010-03-04 2011-09-22 Tokyo Univ Of Science 金属微細構造体及びその製造方法並びに樹脂成形物の製造方法
JP2016096209A (ja) * 2014-11-13 2016-05-26 株式会社フジクラ 配線基板の製造方法
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