JP2008141167A - 導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法 - Google Patents

導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法 Download PDF

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Publication number
JP2008141167A
JP2008141167A JP2007251150A JP2007251150A JP2008141167A JP 2008141167 A JP2008141167 A JP 2008141167A JP 2007251150 A JP2007251150 A JP 2007251150A JP 2007251150 A JP2007251150 A JP 2007251150A JP 2008141167 A JP2008141167 A JP 2008141167A
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Prior art keywords
layer
conductive layer
silicon
substrate
bonded
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JP2007251150A
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Japanese (ja)
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JP2008141167A5 (enExample
Inventor
Tomoyuki Aoki
智幸 青木
Takuya Tsurume
卓也 鶴目
Hiromi Yamada
大幹 山田
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Semiconductor Energy Laboratory Co Ltd
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Semiconductor Energy Laboratory Co Ltd
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Priority to JP2007251150A priority Critical patent/JP2008141167A/ja
Publication of JP2008141167A publication Critical patent/JP2008141167A/ja
Publication of JP2008141167A5 publication Critical patent/JP2008141167A5/ja
Withdrawn legal-status Critical Current

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
    • H05K3/20—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern
    • H05K3/207—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern by affixing prefabricated conductor pattern using a prefabricated paste pattern, ink pattern or powder pattern
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
    • G06K19/07754—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/688—Flexible insulating substrates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/0198—Manufacture or treatment batch processes
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0393—Flexible materials
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0203—Fillers and particles
    • H05K2201/0206—Materials
    • H05K2201/0239—Coupling agent for particles
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/01—Tools for processing; Objects used during processing
    • H05K2203/0147—Carriers and holders
    • H05K2203/016—Temporary inorganic, non-metallic carrier, e.g. for processing or transferring
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/05—Patterning and lithography; Masks; Details of resist
    • H05K2203/0502—Patterning and lithography
    • H05K2203/0531—Decalcomania, i.e. transfer of a pattern detached from its carrier before affixing the pattern to the substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/38—Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/386—Improvement of the adhesion between the insulating substrate and the metal by the use of an organic polymeric bonding layer, e.g. adhesive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/019—Manufacture or treatment of bond pads
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/325—Die-attach connectors having a filler embedded in a matrix
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/352—Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/30—Die-attach connectors
    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/922—Bond pads being integral with underlying chip-level interconnections
    • H10W72/9223—Bond pads being integral with underlying chip-level interconnections with redistribution layers [RDL]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/921—Structures or relative sizes of bond pads
    • H10W72/923—Bond pads having multiple stacked layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/9415—Dispositions of bond pads relative to the surface, e.g. recessed, protruding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/941—Dispositions of bond pads
    • H10W72/942—Dispositions of bond pads relative to underlying supporting features, e.g. bond pads, RDLs or vias
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Theoretical Computer Science (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Thin Film Transistor (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Wire Bonding (AREA)
JP2007251150A 2006-09-29 2007-09-27 導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法 Withdrawn JP2008141167A (ja)

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JP2007251150A JP2008141167A (ja) 2006-09-29 2007-09-27 導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法

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JP2006266264 2006-09-29
JP2007251150A JP2008141167A (ja) 2006-09-29 2007-09-27 導電層及び導電層を有する基板の形成方法、並びに半導体装置の作製方法

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JP2008141167A true JP2008141167A (ja) 2008-06-19
JP2008141167A5 JP2008141167A5 (enExample) 2010-10-28

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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010027076A1 (ja) * 2008-09-05 2010-03-11 学校法人東京理科大学 転写構造体の製造方法及びそれに用いる母型
JP2011165803A (ja) * 2010-02-08 2011-08-25 Fujifilm Corp 半導体素子用基板およびその製造方法ならびに半導体装置
JP2011187510A (ja) * 2010-03-04 2011-09-22 Tokyo Univ Of Science 金属微細構造体及びその製造方法並びに樹脂成形物の製造方法
JP2016096209A (ja) * 2014-11-13 2016-05-26 株式会社フジクラ 配線基板の製造方法
US10101865B2 (en) 2015-01-30 2018-10-16 Fujikura Ltd. Wiring body, wiring board, and touch sensor

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WO2007055142A1 (en) 2005-11-11 2007-05-18 Semiconductor Energy Laboratory Co., Ltd. Layer having functionality, method for forming flexible substrate having the same, and method for manufacturing semiconductor device
TWI424499B (zh) * 2006-06-30 2014-01-21 半導體能源研究所股份有限公司 製造半導體裝置的方法
JP5506172B2 (ja) * 2007-10-10 2014-05-28 株式会社半導体エネルギー研究所 半導体基板の作製方法
US20090193676A1 (en) * 2008-01-31 2009-08-06 Guo Shengguang Shoe Drying Apparatus
WO2010070393A1 (en) * 2008-12-17 2010-06-24 Fci Method of manufacture of ic contact-less communication devices
KR101852190B1 (ko) * 2011-06-28 2018-04-25 엘지디스플레이 주식회사 플렉서블 표시장치의 제조방법
GB2500380A (en) * 2012-03-18 2013-09-25 Effect Photonics B V Arrangement and method of making electrical connections
KR20140019699A (ko) * 2012-08-07 2014-02-17 삼성디스플레이 주식회사 플렉시블 유기 발광 표시 장치 및 그 제조방법
US10816868B2 (en) 2013-09-23 2020-10-27 E Ink California, Llc Active molecule delivery system comprising microcells
JP6285558B2 (ja) * 2013-09-23 2018-02-28 イー・インク・カリフォルニア・リミテッド・ライアビリティ・カンパニーＥ Ｉｎｋ Ｃａｌｉｆｏｒｎｉａ，Ｌｌｃ 予備パターン化像を有するディスプレイパネル
DE102016212129B4 (de) * 2016-07-04 2022-05-19 Schweizer Electronic Ag Hochfrequenz-Sende-/Empfangselement und Verfahren zur Herstellung eines Hochfrequenz-Sende-/Empfangselementes
WO2019057322A1 (de) * 2017-09-21 2019-03-28 Giesecke+Devrient Currency Technology Gmbh Verfahren zur herstellung von pigmenten mit vorgegebener innen- und/oder aussenkontour unter verwendung einer rissbildenden schicht, sowie pigmente
WO2021117310A1 (ja) * 2019-12-09 2021-06-17 ソニーセミコンダクタソリューションズ株式会社 半導体装置およびその製造方法
CN118824609B (zh) * 2024-08-13 2026-01-27 新铂科技(东莞)有限公司 一种高结合力柔性导电膜及其制备方法

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JPH04240792A (ja) * 1991-01-24 1992-08-28 Matsushita Electric Ind Co Ltd 回路基板の製造方法
JP2005086040A (ja) * 2003-09-09 2005-03-31 Sony Chem Corp 電子部品の実装方法
JP2006080440A (ja) * 2004-09-13 2006-03-23 Casio Micronics Co Ltd 回路基板及び半導体装置
JP2006114577A (ja) * 2004-10-13 2006-04-27 Mitsui Chemicals Inc 回路基板およびその製造方法

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JP2003136628A (ja) 2001-11-01 2003-05-14 Toray Ind Inc 金属酸化物積層フイルム、金属酸化物積層体およびこれらの製造方法
US6866949B2 (en) 2002-03-08 2005-03-15 Dai Nippon Printing Co., Ltd. Substrate film, gas barrier film, and display using the same
JP2004310502A (ja) 2003-04-08 2004-11-04 Matsushita Electric Ind Co Ltd 非接触型ｉｃカード
EP1528594B1 (en) * 2003-10-28 2019-05-29 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
US7282380B2 (en) * 2004-03-25 2007-10-16 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing semiconductor device
WO2007055142A1 (en) 2005-11-11 2007-05-18 Semiconductor Energy Laboratory Co., Ltd. Layer having functionality, method for forming flexible substrate having the same, and method for manufacturing semiconductor device

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JPH04240792A (ja) * 1991-01-24 1992-08-28 Matsushita Electric Ind Co Ltd 回路基板の製造方法
JP2005086040A (ja) * 2003-09-09 2005-03-31 Sony Chem Corp 電子部品の実装方法
JP2006080440A (ja) * 2004-09-13 2006-03-23 Casio Micronics Co Ltd 回路基板及び半導体装置
JP2006114577A (ja) * 2004-10-13 2006-04-27 Mitsui Chemicals Inc 回路基板およびその製造方法

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010027076A1 (ja) * 2008-09-05 2010-03-11 学校法人東京理科大学 転写構造体の製造方法及びそれに用いる母型
JP2010087500A (ja) * 2008-09-05 2010-04-15 Tokyo Univ Of Science 転写構造体の製造方法及びそれに用いる母型
US8865049B2 (en) 2008-09-05 2014-10-21 Tokyo University Of Science Educational Foundation Administrative Org. Method for producing transfer structure and matrix for use therein
KR101549063B1 (ko) 2008-09-05 2015-09-01 도쿄 유니버시티 오브 사이언스 에듀케이셔널 파운데이션 애드미니스트레이티브 오거니제이션 전사구조체의 제조방법 및 이것에 이용하는 모형
JP2011165803A (ja) * 2010-02-08 2011-08-25 Fujifilm Corp 半導体素子用基板およびその製造方法ならびに半導体装置
JP2011187510A (ja) * 2010-03-04 2011-09-22 Tokyo Univ Of Science 金属微細構造体及びその製造方法並びに樹脂成形物の製造方法
JP2016096209A (ja) * 2014-11-13 2016-05-26 株式会社フジクラ 配線基板の製造方法
US10101865B2 (en) 2015-01-30 2018-10-16 Fujikura Ltd. Wiring body, wiring board, and touch sensor

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US20080096366A1 (en) 2008-04-24

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