JP2008135696A - Electronic component housing package, electronic apparatus, and optical semiconductor apparatus - Google Patents

Electronic component housing package, electronic apparatus, and optical semiconductor apparatus Download PDF

Info

Publication number
JP2008135696A
JP2008135696A JP2007166468A JP2007166468A JP2008135696A JP 2008135696 A JP2008135696 A JP 2008135696A JP 2007166468 A JP2007166468 A JP 2007166468A JP 2007166468 A JP2007166468 A JP 2007166468A JP 2008135696 A JP2008135696 A JP 2008135696A
Authority
JP
Japan
Prior art keywords
electronic component
electrode pads
wiring board
base
storage package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2007166468A
Other languages
Japanese (ja)
Other versions
JP4823155B2 (en
Inventor
Toshihiko Kitamura
俊彦 北村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Kyocera Corp
Original Assignee
Kyocera Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Kyocera Corp filed Critical Kyocera Corp
Priority to JP2007166468A priority Critical patent/JP4823155B2/en
Publication of JP2008135696A publication Critical patent/JP2008135696A/en
Application granted granted Critical
Publication of JP4823155B2 publication Critical patent/JP4823155B2/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched

Landscapes

  • Light Receiving Elements (AREA)
  • Semiconductor Lasers (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To provide an electronic component housing package and an electronic apparatus capable of being small integrated and having high reliability of electrical connection between an electronic component and an exterior. <P>SOLUTION: An electronic component housing package has a flat metallic base 1 in which a penetration opening 1a penetrating between upper and lower main surfaces is formed, and a wiring substrate 5 which is jointed with the upper main surface of the base 1 so as to cover the penetration opening 1a and which has a plurality of second electrode pads 7a provided in a lower surface with connecting with a plurality of first electrode pads 6a provided on an upper surface. The wiring substrate 5 has a convex part 5b in an outer periphery of the lower surface joined to the base 1, and a conductor 7b for junction with the base 1 is formed in a lower surface of the convex part 5b. This leads to that the wiring substrate 5 can be miniaturized, and reliability of electrical connection between an electronic component 2 and an exterior becomes high. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

本発明は、高周波半導体素子または光半導体素子等の電子部品を収納するための電子部品収納用パッケージおよびこれを用いた電子装置または光半導体装置に関する。   The present invention relates to an electronic component storage package for storing an electronic component such as a high-frequency semiconductor element or an optical semiconductor element, and an electronic device or an optical semiconductor device using the same.

従来の光通信等の分野において高い周波数で作動する光半導体レーザ(LD),フォトダイオード(PD)等の光半導体素子で成る電子部品を気密封止して収納した光半導体装置の例を図6に断面図で示す。同図において、101は基体、102は電子部品、103は金属製の蓋体、104は透光性部材、105は配線基板、112は光ファイバであり、これら基体101および配線基板105で電子部品収納用パッケージが基本的に構成される。また、この電子部品収納用パッケージに電子部品102を搭載し、蓋体103を接合することにより光半導体装置となる。   FIG. 6 shows an example of an optical semiconductor device in which electronic parts composed of optical semiconductor elements such as an optical semiconductor laser (LD) and a photodiode (PD) operating at a high frequency are hermetically sealed in a field such as conventional optical communication. Is shown in cross-sectional view. In the figure, 101 is a base, 102 is an electronic component, 103 is a metal lid, 104 is a translucent member, 105 is a wiring board, and 112 is an optical fiber. A storage package is basically constructed. In addition, an electronic component 102 is mounted on the electronic component storage package, and the lid 103 is joined to form an optical semiconductor device.

この光半導体装置は、平板状の金属製の基体101と、上端面103aの中央部に貫通孔103bが形成されているとともに下端103cが開かれた筒状であり、基体101の上側主面の外周部に下端103cが接合された金属製の蓋体103と、貫通孔103bの開口の周囲に接合された透光性部材104と、基体101の上下主面間を貫通するように形成された貫通穴101aを覆うようにして基体101の上側主面に接合された配線基板105と、配線基板105の上面に載置された電子部品102とを具備している。   This optical semiconductor device has a plate-like metal base 101 and a cylindrical shape in which a through hole 103b is formed at the center of the upper end surface 103a and the lower end 103c is opened. A metal lid 103 having a lower end 103c bonded to the outer periphery, a translucent member 104 bonded around the opening of the through hole 103b, and the upper and lower main surfaces of the base body 101 are formed so as to penetrate. A wiring board 105 joined to the upper main surface of the base 101 so as to cover the through hole 101 a and an electronic component 102 placed on the upper surface of the wiring board 105 are provided.

配線基板105は、複数の絶縁層が積層されて成る絶縁基板の上面に配設された複数の第1の電極パッド106aおよび絶縁基板の下面に配設されて第1の電極パッド106aにそれぞれ内部導体108を介して電気的に接続された複数の第2の電極パッド107aを有している。そして、配線基板105の下面外周部に設けられた接合用導体107bと基体101とが銀(Ag)ろう等を用いたろう材によって貫通穴103の開口周囲にろう付けされている。また、複数の第2の電極パッド107aのそれぞれにはAgろう等のろう材によって外部接続端子部材110が接合されている(例えば、特許文献1参照)。
特開2004−221095号公報
The wiring substrate 105 includes a plurality of first electrode pads 106a disposed on the upper surface of the insulating substrate formed by laminating a plurality of insulating layers, and a first electrode pad 106a disposed on the lower surface of the insulating substrate. A plurality of second electrode pads 107a are electrically connected through the conductor. The bonding conductor 107b and the base body 101 provided on the outer periphery of the lower surface of the wiring board 105 are brazed around the opening of the through hole 103 with a brazing material using silver (Ag) brazing or the like. Further, an external connection terminal member 110 is joined to each of the plurality of second electrode pads 107a by a brazing material such as Ag brazing (see, for example, Patent Document 1).
JP 2004-221095 A

近年、上記従来の電子部品収納用パッケージおよび光半導体装置は小型集積化される傾向にあり、それに伴い、配線基板105も面積の小さいものとなる傾向がある。しかしながら、複数の第2の電極パッド107aの大きさを維持しつつ配線基板105の外形を縮小し、配線基板105を面積の小さいものにしようとすると、第2の電極パッド107aと接合用導体107bとの距離が非常に近接したものとなり、第2の電極パッド107aに外部接続端子部材110を接合するためのろう材と基体101に配線基板105の接合用導体107bを接合するためのろう材とがろう付け時に接触してしまい、第2の電極パッド107aと接合用導体107bとが電気的に短絡してしまう場合があった。   In recent years, the conventional electronic component storage package and the optical semiconductor device tend to be miniaturized and integrated, and accordingly, the wiring board 105 also tends to have a small area. However, if the outer shape of the wiring board 105 is reduced while maintaining the size of the plurality of second electrode pads 107a to make the wiring board 105 have a small area, the second electrode pads 107a and the bonding conductor 107b are used. And a brazing material for joining the external connection terminal member 110 to the second electrode pad 107a and a brazing material for joining the joining conductor 107b of the wiring board 105 to the base 101. In some cases, the second electrode pad 107a and the bonding conductor 107b are electrically short-circuited when they are brazed.

従って、本発明は上記問題点に鑑み完成されたものであり、その目的は小型集積化が可能で、電子部品と外部との電気的接続の信頼性が高い電子部品収納用パッケージおよび電子装置または光半導体装置を提供することにある。   Accordingly, the present invention has been completed in view of the above-described problems, and the object thereof is an electronic component storage package and an electronic device that can be miniaturized and have high reliability in electrical connection between the electronic component and the outside. The object is to provide an optical semiconductor device.

本発明の電子部品収納用パッケージは、上下主面間を貫通する貫通穴が形成された平板状の金属製の基体と、前記貫通穴を覆うように前記基体の下側主面に接合され、上面に配設された複数の第1の電極パッドに接続されて他の表面に配設された複数の第2の電極パッドを有する配線基板とを具備している電子部品収納用パッケージであって、前記配線基板は、前記基体に接合される上面外周部に凸部を有し、該凸部の上面に前記基体との接合用導体が形成されていることを特徴とする。   The electronic component storing package of the present invention is joined to a flat metal base having a through hole formed between upper and lower main surfaces, and a lower main surface of the base so as to cover the through hole, An electronic component storage package comprising: a wiring substrate having a plurality of second electrode pads connected to a plurality of first electrode pads disposed on an upper surface and disposed on another surface; The wiring board has a convex portion on the outer periphery of the upper surface joined to the base, and a conductor for joining to the base is formed on an upper surface of the convex portion.

また、本発明の電子部品収納用パッケージは、上下主面間を貫通する貫通穴が形成された平板状の金属製の基体と、前記貫通穴を覆うように前記基体の上側主面に接合され、上面に配設された複数の第1の電極パッドに接続されて下面に配設された複数の第2の電極パッドを有する配線基板とを具備している電子部品収納用パッケージであって、前記配線基板は、前記基体に接合される下面外周部に凸部を有し、該凸部の下面に前記基体との接合用導体が形成されていることを特徴とする。   The electronic component storage package according to the present invention is joined to a flat metal base having a through hole formed between upper and lower main surfaces and an upper main surface of the base so as to cover the through hole. An electronic component storage package comprising: a wiring substrate having a plurality of second electrode pads connected to the plurality of first electrode pads disposed on the upper surface and disposed on the lower surface; The wiring board has a convex portion on an outer peripheral portion of a lower surface joined to the base, and a conductor for joining with the base is formed on a lower surface of the convex portion.

本発明の電子部品収納用パッケージは、好ましくは、前記第2の電極パッドの少なくとも一つには、高周波信号が接続されることを特徴とする。   The electronic component storage package according to the present invention is preferably characterized in that a high frequency signal is connected to at least one of the second electrode pads.

本発明の電子部品収納用パッケージは、好ましくは、前記第2の電極パッドに、線材で成る外部接続端子部材がそれぞれ接合されていることを特徴とする。   The electronic component storage package of the present invention is preferably characterized in that an external connection terminal member made of a wire is joined to the second electrode pad.

本発明の電子部品収納用パッケージは、好ましくは、前記第2の電極パッドに、金属ボールまたは半田バンプで成る外部接続端子部材がそれぞれ接合されていることを特徴とする。   The electronic component storage package according to the present invention is preferably characterized in that external connection terminal members made of metal balls or solder bumps are joined to the second electrode pads, respectively.

本発明の電子部品収納用パッケージは、好ましくは、前記配線基板の表面の、隣り合う前記第1の電極パッド同士の間および隣り合う前記複数の第2の電極パッド同士の間の少なくとも一方に、前記第1の電極パッド同士の間または前記第2の電極パッド同士の間を横切るように溝が設けられていることを特徴とする。   The electronic component storage package of the present invention is preferably provided on at least one of the surfaces of the wiring board between the adjacent first electrode pads and between the adjacent second electrode pads. A groove is provided so as to cross between the first electrode pads or between the second electrode pads.

本発明の電子装置は、上記本発明の電子部品収納用パッケージと、前記配線基板の上面に載置された電子部品と、上端面が閉じているとともに下端が開かれた筒状とされており、前記基体の上側主面の外周部に前記下端が接合された蓋体とを具備していることを特徴とする。   An electronic device according to the present invention has an electronic component storage package according to the present invention, an electronic component placed on the upper surface of the wiring board, and a cylindrical shape in which an upper end surface is closed and a lower end is opened. And a lid body having the lower end joined to the outer peripheral portion of the upper main surface of the base body.

本発明の光半導体装置は、上記本発明の電子部品収納用パッケージと、上端面に貫通孔が形成されているとともに下端が開かれた筒状とされており、前記基体の上側主面の外周部に前記下端が接合された金属製の蓋体と、前記貫通孔の開口の周囲に接合された透光性部材と、該透光性部材に受光部または発光部を対向させて前記配線基板の上面に載置された光半導体素子とを具備していることを特徴とする。   An optical semiconductor device according to the present invention includes the electronic component storage package according to the present invention, and a cylindrical shape having a through hole formed in the upper end surface and an open lower end, and an outer periphery of the upper main surface of the base body. A metal lid having the lower end joined to a part, a translucent member joined around the opening of the through-hole, and the wiring board with a light-receiving part or a light-emitting part facing the translucent member And an optical semiconductor element mounted on the upper surface of the substrate.

本発明の電子部品収納用パッケージは、上下主面間を貫通する貫通穴が形成された平板状の金属製の基体と、貫通穴を覆うように基体の下側主面に接合され、上面に配設された複数の第1の電極パッドに接続されて他の表面に配設された複数の第2の電極パッドを有する配線基板とを具備し、配線基板は、基体に接合される上面外周部に凸部を有し、凸部の上面に基体との接合用導体が形成されていることから、第1の電極パッドと凸部の上面に形成された接合用導体とが同一平面に配置されることがない。その結果、電子部品収納用パッケージが小型集積化され、配線基板が小型化されても、凸部によって第1の電極パッドと接合用導体との絶縁距離を確保でき、基体に接合用導体を接合するためのろう材が第1の電極パッドに接触してしまい、第1の電極パッドと接合用導体とが電気的に短絡してしまうのを防止することができる。   The electronic component storage package according to the present invention is joined to a flat metal base having a through hole formed between the upper and lower main surfaces, and a lower main surface of the base so as to cover the through hole, A wiring board having a plurality of second electrode pads connected to the plurality of first electrode pads and disposed on the other surface, the wiring board having an upper surface outer periphery bonded to the base body The first electrode pad and the bonding conductor formed on the upper surface of the convex portion are arranged on the same plane because the convex portion is formed on the convex portion and the bonding conductor is formed on the upper surface of the convex portion. It will not be done. As a result, even if the electronic component storage package is miniaturized and the wiring board is miniaturized, the insulating distance between the first electrode pad and the bonding conductor can be secured by the convex portion, and the bonding conductor is bonded to the base. Therefore, it is possible to prevent the brazing material to be in contact with the first electrode pad and electrically short-circuit the first electrode pad and the bonding conductor.

また、本発明の電子部品収納用パッケージは、上下主面間を貫通する貫通穴が形成された平板状の金属製の基体と、貫通穴を覆うように基体の上側主面に接合され、上面に配設された複数の第1の電極パッドに接続されて下面に配設された複数の第2の電極パッドを有する配線基板とを具備し、配線基板は、基体に接合される下面外周部に凸部を有し、凸部の下面に基体との接合用導体が形成されていることから、第2の電極パッドと凸部の下面に形成された接合用導体とが同一平面に配置されることがない。その結果、電子部品収納用パッケージが小型集積化され、配線基板が小型化されても、凸部によって第2の電極パッドと接合用導体との絶縁距離を確保でき、第2の電極パッドに外部接続端子部材を接合するためのろう材と基体に接合用導体を接合するためのろう材とが接触してしまい、第2の電極パッドと接合用導体とが電気的に短絡してしまうのを防止することができ、第2の電極パッドに電気信号を確実に伝送させることができる。   The electronic component storage package of the present invention is joined to a flat metal base having a through hole penetrating between the upper and lower main surfaces, and an upper main surface of the base so as to cover the through hole. And a wiring board having a plurality of second electrode pads connected to the plurality of first electrode pads disposed on the lower surface and having a plurality of second electrode pads disposed on the lower surface. The second electrode pad and the bonding conductor formed on the lower surface of the convex portion are arranged on the same plane. There is nothing to do. As a result, even if the electronic component storage package is miniaturized and the wiring board is miniaturized, the insulating distance between the second electrode pad and the bonding conductor can be secured by the convex portion, and the second electrode pad can be externally connected. The brazing material for joining the connection terminal member and the brazing material for joining the joining conductor to the base are in contact with each other, and the second electrode pad and the joining conductor are electrically short-circuited. This can prevent the electric signal from being transmitted to the second electrode pad.

本発明の電子部品収納用パッケージにおいて、好ましくは、第2の電極パッドの少なくとも一つには、高周波信号が接続されることにより、第2の電極パッドと外部電気回路基板との接続距離が凸部を設けた分長くなって、誘導成分(インダクタンス)が大きくなり、第2の電極パッドと外部接続端子部材との接合部における第2の電極パッドおよび外部接続端子部材と接地導体(例えば、接合用導体)との間に生じる容量成分の増大を打ち消す作用を為す。その結果、第2の電極パッドと外部電気回路基板との間におけるインピーダンス値の不整合が生ずるのを緩和でき、外部接続端子部材を伝送する高周波信号に反射損失等の伝送損失が発生するのを防止できる。よって、高周波信号に対しても電子部品を正常かつ安定に作動させることのできる電子部品収納用パッケージとすることができる。   In the electronic component storage package of the present invention, it is preferable that a connection distance between the second electrode pad and the external electric circuit board is convex when a high frequency signal is connected to at least one of the second electrode pads. The inductive component (inductance) becomes larger by providing the portion, and the second electrode pad and the external connection terminal member and the ground conductor (for example, the junction) between the second electrode pad and the external connection terminal member are increased. It acts to counteract the increase in capacitance component that occurs between it and the conductor. As a result, the impedance value mismatch between the second electrode pad and the external electric circuit board can be mitigated, and transmission loss such as reflection loss occurs in the high-frequency signal transmitted through the external connection terminal member. Can be prevented. Therefore, it is possible to provide an electronic component storage package that can operate the electronic component normally and stably even for a high-frequency signal.

本発明の電子部品収納用パッケージは、好ましくは、第2の電極パッドに、線材で成る外部接続端子部材がそれぞれ接合されていることから、第2の電極パッドと外部電気回路とを外部接続端子部材によって接続し、電子部品収納用パッケージ内部に収容される電子部品を作動させることができる。   In the electronic component storage package according to the present invention, preferably, since the external connection terminal member made of a wire is joined to the second electrode pad, the second electrode pad and the external electric circuit are connected to the external connection terminal. The electronic components that are connected by the members and accommodated in the electronic component storage package can be operated.

本発明の電子部品収納用パッケージは、好ましくは、前記第2の電極パッドに、金属ボールまたは半田バンプで成る外部接続端子部材がそれぞれ接合されていることから、第2の電極パッドと外部電気回路とを外部接続端子部材によって接続し、電子部品収納用パッケージ内部に収容される電子部品を作動させることができる。また、外部接続端子部材が金属ボールまたは半田バンプで成ることによって、電子部品収納用パッケージと外部電気回路との接続長を短くして接続することが容易である。接続長が短いことによって電気信号の損失を少なくすることができる。   In the electronic component storage package according to the present invention, preferably, since the external connection terminal member made of a metal ball or a solder bump is joined to the second electrode pad, the second electrode pad and the external electric circuit. Are connected by the external connection terminal member, and the electronic component housed in the electronic component housing package can be operated. Further, since the external connection terminal member is made of a metal ball or a solder bump, it is easy to connect the electronic component storage package and the external electric circuit with a short connection length. Since the connection length is short, the loss of electrical signals can be reduced.

本発明の電子部品収納用パッケージは、好ましくは、配線基板の表面の、隣り合う第1の電極パッド同士の間および隣り合う第2の電極パッド同士の間の少なくとも一方に、第1の電極パッド同士の間または第2の電極パッド同士の間を横切るように溝が設けられていることから、第1の電極パッド同士の間または第2の電極パッド同士の間に生じる容量成分を減らすことができる。その結果、第1の電極パッドまたは第2の電極パッドを伝送する電気信号のインピーダンス値の低下を抑え、電気信号を効率良く伝送することができる。   The electronic component storage package according to the present invention is preferably configured such that the first electrode pad is provided on at least one of the surfaces of the wiring board between the adjacent first electrode pads and between the adjacent second electrode pads. Since the groove is provided so as to cross between each other or between the second electrode pads, the capacitance component generated between the first electrode pads or between the second electrode pads can be reduced. it can. As a result, a decrease in the impedance value of the electric signal transmitted through the first electrode pad or the second electrode pad can be suppressed, and the electric signal can be transmitted efficiently.

本発明の電子装置は、上記本発明の電子部品収納用パッケージと、配線基板の上面に載置された電子部品と、上端面が閉じているとともに下端が開かれた筒状とされており、基体の上側主面の外周部に下端が接合された蓋体とを具備していることにより、上記本発明の電子部品収納用パッケージを用いた小型集積化が可能で、かつ電子部品の動作信頼性が高いものとなる。   The electronic device of the present invention has the electronic component storage package of the present invention, an electronic component placed on the upper surface of the wiring board, and a cylindrical shape in which the upper end surface is closed and the lower end is opened, By including a lid whose lower end is joined to the outer peripheral portion of the upper main surface of the substrate, the electronic component storage package of the present invention can be miniaturized and the operation reliability of the electronic component can be achieved. It becomes a thing with high property.

本発明の光半導体装置は、上記本発明の電子部品収納用パッケージと、上端面に貫通孔が形成されているとともに下端が開かれた筒状とされており、前記基体の上側主面の外周部に前記下端が接合された金属製の蓋体と、前記貫通孔の開口の周囲に接合された透光性部材と、透光性部材に受光部または発光部を対向させて配線基板の上面に載置された光半導体素子とを具備していることにより、上記本発明の光半導体素子収納用パッケージを用いた小型集積化が可能で、かつ光半導体素子の動作信頼性が高いものとなる。   An optical semiconductor device according to the present invention includes the electronic component storage package according to the present invention, and a cylindrical shape having a through hole formed in the upper end surface and an open lower end, and an outer periphery of the upper main surface of the base body. A metal lid having the lower end joined to the part, a translucent member joined around the opening of the through hole, and an upper surface of the wiring board with the light receiving part or the light emitting part facing the translucent member And the optical semiconductor element mounted on the optical semiconductor element can be miniaturized using the optical semiconductor element storage package of the present invention, and the optical semiconductor element has high operational reliability. .

本発明の電子部品収納用パッケージならびにこれを用いた電子装置および光半導体装置について、LD,PD等の光半導体素子を気密封止して収納した電子部品収納用パッケージおよび光半導体装置を例にして以下に詳細に説明する。   The electronic component storage package and the electronic device and optical semiconductor device using the electronic component storage package of the present invention are exemplified by an electronic component storage package and an optical semiconductor device in which optical semiconductor elements such as LD and PD are hermetically sealed. This will be described in detail below.

図1(a)は本発明の電子部品収納用パッケージおよび光半導体装置の実施の形態の一例を示す正面から見た断面図、図1(b)は図1(a)の電子部品収納用パッケージの基体部の上面図であり、図2(a)は本発明の電子部品収納用パッケージおよび光半導体装置の実施の形態の他の例を示す正面から見た断面図、図2(b)は図2(a)の電子部品収納用パッケージの下面図である。図3(a),図3(b)はそれぞれ本発明の電子部品収納用パッケージおよび光半導体装置の実施の形態のさらに他の例を示す正面から見た断面図および下面図である。また、図4(a),図4(b)はそれぞれ図1(a),図2(a)の電子部品収納用パッケージおよび光半導体装置の実施の形態の他の例を示す正面から見た断面図である。図5(a),図5(b)はそれぞれ本発明の電子部品収納用パッケージの配線基板の他の例を示す下面図である。図5(c)は本発明の電子部品収納用パッケージの配線基板の他の例を示す上面図である。なお、図1(b),図2(b),図3(b),図5(a),図5(b),図5(c)において、導体層が形成されている部分をクロスハッチングで示している。従って、これらクロスハッチングは断面を示すものではない。   1A is a cross-sectional view seen from the front showing an example of an embodiment of an electronic component storage package and an optical semiconductor device according to the present invention, and FIG. 1B is an electronic component storage package of FIG. 2A is a cross-sectional view seen from the front showing another example of the electronic component storage package and the optical semiconductor device according to the present invention, and FIG. FIG. 3 is a bottom view of the electronic component storage package of FIG. FIGS. 3A and 3B are a cross-sectional view and a bottom view, respectively, seen from the front showing still another example of the electronic component storage package and the optical semiconductor device according to the present invention. 4 (a) and 4 (b) are viewed from the front showing other examples of embodiments of the electronic component storage package and the optical semiconductor device of FIGS. 1 (a) and 2 (a), respectively. It is sectional drawing. FIG. 5A and FIG. 5B are bottom views showing other examples of the wiring board of the electronic component storage package of the present invention. FIG. 5C is a top view showing another example of the wiring board of the electronic component storage package of the present invention. In FIG. 1B, FIG. 2B, FIG. 3B, FIG. 5A, FIG. 5B, and FIG. 5C, the portion where the conductor layer is formed is cross-hatched. Is shown. Therefore, these cross hatching does not show a cross section.

これらの図において、1は基体、2は電子部品(光半導体素子)、4は透光性部材、5は配線基板、12は光ファイバ、3は金属製の蓋体を示す。これら基体1および配線基板5で電子部品収納用パッケージが基本的に構成され、電子部品収納用パッケージに光半導体素子で成る電子部品2を搭載し、蓋体3を接合することにより光半導体装置となる。   In these drawings, 1 is a base, 2 is an electronic component (optical semiconductor element), 4 is a translucent member, 5 is a wiring board, 12 is an optical fiber, and 3 is a metal lid. The base 1 and the wiring board 5 basically constitute an electronic component storage package. The electronic component 2 made of an optical semiconductor element is mounted on the electronic component storage package, and the lid 3 is joined to the optical semiconductor device. Become.

本発明の電子部品収納用パッケージは、上下主面間を貫通する貫通穴1aが形成された平板状の金属製の基体1と、貫通穴1aを覆って基体1の下側主面に接合され、複数の絶縁層が積層されて成る絶縁基板の上面に配設された複数の第1の電極パッド6aおよび絶縁基板の下面または側面に配設されて第1の電極パッド6aにそれぞれ内部導体8を介して電気的に接続された複数の第2の電極パッド7aを有する配線基板5とを具備し、配線基板5は、基体1に接合される上面外周部に、上側に突出した凸部5bを有し、凸部5bの上面に基体1との接合用導体7bが形成されている。そして、凸部5bで囲まれた凹部5aの底面に第1の電極パッド6aが配置される。   The electronic component storing package of the present invention is joined to a flat metal base 1 having a through hole 1a penetrating between upper and lower main surfaces, and a lower main surface of the base 1 covering the through hole 1a. The plurality of first electrode pads 6a disposed on the upper surface of the insulating substrate formed by laminating a plurality of insulating layers and the inner conductor 8 disposed on the lower surface or side surface of the insulating substrate and disposed on the first electrode pad 6a, respectively. And a wiring board 5 having a plurality of second electrode pads 7a electrically connected to each other through the wiring board 5. The wiring board 5 has a convex part 5b protruding upward on the outer peripheral part of the upper surface joined to the base body 1. And a conductor 7b for bonding to the base body 1 is formed on the upper surface of the convex portion 5b. And the 1st electrode pad 6a is arrange | positioned at the bottom face of the recessed part 5a enclosed by the convex part 5b.

また、本発明の電子部品収納用パッケージは、図2に示すように、上下主面間を貫通する貫通穴1aが形成された平板状の金属製の基体1と、貫通穴1aを覆って基体1の上側主面に接合され、複数の絶縁層が積層されて成る絶縁基板の上面に配設された複数の第1の電極パッド6aおよび絶縁基板の下面に配設されて第1の電極パッド6aにそれぞれ内部導体8を介して電気的に接続された複数の第2の電極パッド7aを有する配線基板5とを具備し、配線基板5は、基体1に接合される下面外周部に下側に突出した凸部5bを有し、凸部5bの下面に基体1との接合用導体7bが形成されている。   In addition, as shown in FIG. 2, the electronic component storage package of the present invention has a flat metal base 1 in which a through hole 1a passing through the upper and lower main surfaces is formed, and a base covering the through hole 1a. A plurality of first electrode pads 6a disposed on an upper surface of an insulating substrate formed by laminating a plurality of insulating layers, and a first electrode pad disposed on a lower surface of the insulating substrate. 6a, and a wiring board 5 having a plurality of second electrode pads 7a electrically connected to each other through an internal conductor 8. And a conductor 7b for bonding to the base 1 is formed on the lower surface of the protrusion 5b.

第2の電極パッド7aのそれぞれには、線材で成る外部接続端子部材10または金属ボールで成る外部接続端子部材10が接合される。外部接続端子部材10を接合するため、第2の電極パッド7aは、通常、第1の電極パッド6aよりも大きな面積で形成される。   An external connection terminal member 10 made of a wire material or an external connection terminal member 10 made of a metal ball is joined to each of the second electrode pads 7a. In order to join the external connection terminal member 10, the second electrode pad 7a is usually formed with a larger area than the first electrode pad 6a.

なお、図1〜図4に示される電子部品収納用パッケージに光半導体素子で成る電子部品2を搭載する本発明の光半導体装置においては、蓋体3の上端面3aの中央部に貫通孔3bが形成されており、貫通孔3bの開口の周囲に透光性部材4が接合されている。透光性部材4が設けられることにより、透光性部材4を介して電子部品2に光信号を入出力させることができる。そして、透光性部材4に電子部品2の受光部または発光部を対向させて、配線基板5の上面に電子部品2を載置し、基体1の上側主面の外周部に、筒状の蓋体3の開かれた下端3cを接合することにより、図1〜図4に示される光半導体装置となる。   In the optical semiconductor device of the present invention in which the electronic component 2 made of an optical semiconductor element is mounted on the electronic component storage package shown in FIGS. 1 to 4, the through hole 3 b is formed at the center of the upper end surface 3 a of the lid 3. Is formed, and the translucent member 4 is joined around the opening of the through hole 3b. By providing the translucent member 4, an optical signal can be input to and output from the electronic component 2 through the translucent member 4. Then, the light receiving portion or the light emitting portion of the electronic component 2 is opposed to the translucent member 4, the electronic component 2 is placed on the upper surface of the wiring substrate 5, and a cylindrical shape is formed on the outer peripheral portion of the upper main surface of the substrate 1. By joining the open lower end 3c of the lid 3, the optical semiconductor device shown in FIGS.

一方、本発明の電子装置は、光信号と電気信号との信号変換機能を有する光半導体素子を除く電子部品、例えば高周波増幅用の半導体素子等で成る電子部品を搭載するものであって、装置内外で光信号を導通させる透光性部材4および光ファイバ12等を有さないものである。このため、蓋体3は上端面3aの中央部に貫通孔3bが形成されていない閉じた上端面3aを有し、下端3cが開かれた筒状とされており、下端3cが基体1の上側主面外周部に接合される。その他の部位は、本発明の光半導体装置と共通している。以下、光半導体装置を例に説明する。   On the other hand, an electronic device according to the present invention is equipped with an electronic component excluding an optical semiconductor element having a signal conversion function between an optical signal and an electric signal, for example, an electronic component composed of a semiconductor element for high frequency amplification. It does not have the translucent member 4 and the optical fiber 12 that conduct the optical signal inside and outside. Therefore, the lid 3 has a closed upper end surface 3a in which the through hole 3b is not formed at the center of the upper end surface 3a, has a cylindrical shape with the lower end 3c being opened, and the lower end 3c is the base 1 Joined to the outer periphery of the upper main surface. Other parts are common to the optical semiconductor device of the present invention. Hereinafter, an optical semiconductor device will be described as an example.

以下、図1〜図4に示す電子部品収納用パッケージおよび光半導体装置の実施の形態について説明する。以下の実施の形態の例においては、内部導体8が内層導体層8b同士を層間接続する貫通導体8aと配線基板5の内層配線として形成された内層導体層8bとから成る場合について説明するが、内部導体8は貫通導体8aのみから成っていてもよい。この場合、配線導体5は単層の配線基板5であってもよい。なお、内層導体層8bは、上下のセラミックグリーンシートにおける貫通導体8a同士を確実に電気的に接続させるとともに、内層に配線を引きまわすためのものである。   Hereinafter, embodiments of the electronic component storage package and the optical semiconductor device shown in FIGS. 1 to 4 will be described. In the example of the following embodiment, a case will be described in which the inner conductor 8 is composed of a through conductor 8a that interconnects the inner conductor layers 8b and an inner conductor layer 8b formed as an inner wiring of the wiring board 5. The inner conductor 8 may consist of only the through conductor 8a. In this case, the wiring conductor 5 may be a single-layer wiring board 5. The inner conductor layer 8b is used to reliably connect the through conductors 8a in the upper and lower ceramic green sheets and to route wiring to the inner layer.

本発明の電子部品収納用パッケージおよび光半導体装置における基体1は、平面視形状が円板状、長方形状、多角形状等の平板状であり、鉄(Fe)−ニッケル(Ni)−コバルト(Co)合金やFe−Ni合金、銅(Cu)−タングステン(W)合金等の金属から成り、そのインゴットに圧延加工や打ち抜き加工等の従来周知の金属加工法を施すことによって所定形状に製作される。この基体1には、基体1の上下主面間を貫通する円形状、多角形状等の貫通穴1aが設けられている。そして、この貫通穴1aには、配線基板5が貫通穴1aを覆うようにして基体1の貫通穴1aの周囲に銀(Ag)ろう等のろう材によって気密に接合される。基体1にろう材を介して接合するために、配線基板5の上面外周部または下面外周部の凸部5b上面または下面に接合用導体7bが形成されている。   The base 1 in the electronic component storage package and the optical semiconductor device of the present invention has a flat plate shape such as a disk shape, a rectangular shape, a polygonal shape, etc. in plan view, and iron (Fe) -nickel (Ni) -cobalt (Co ) It is made of a metal such as an alloy, Fe-Ni alloy, copper (Cu) -tungsten (W) alloy, etc., and is manufactured into a predetermined shape by subjecting the ingot to a conventionally known metal processing method such as rolling or punching. . The base body 1 is provided with a through hole 1a having a circular shape, a polygonal shape or the like that penetrates between the upper and lower main surfaces of the base body 1. The wiring board 5 is airtightly joined to the through hole 1a by a brazing material such as silver (Ag) brazing around the through hole 1a of the base 1 so as to cover the through hole 1a. In order to join the base body 1 with a brazing material, a bonding conductor 7b is formed on the upper surface or the lower surface of the convex portion 5b of the upper surface outer peripheral portion or the lower surface outer peripheral portion of the wiring board 5.

配線基板5はアルミナ(Al:酸化アルミニウム)質焼結体,窒化アルミニウム(AlN)質焼結体,ムライト(3Al・2SiO)質焼結体等の誘電体から成り、以下のようにして作製される。例えば、Al質セラミックスから成る場合、先ずAl、酸化珪素(SiO)、酸化マグネシウム(MgO)および酸化カルシウム(CaO)等の原料粉末に適当な有機バインダー、可塑剤、溶剤等を添加混合して泥漿状と成す。これを従来周知のドクターブレード法やカレンダーロール法等のテープ成形技術により複数のセラミックグリーンシートを得る。次に、このセラミックグリーンシートに、Wやモリブデン(Mo)等の高融点金属粉末に適当な有機バインダー、可塑剤、溶剤等を添加混合して得た金属ペーストを、スクリーン印刷法等の厚膜形成技術により印刷塗布して、第1の電極パッド6a,第2の電極パッド7a,接合用導体7b,内層導体層8bとなるメタライズ層を所定パターンに形成する。また、金型等によって打ち抜き加工することによって、各セラミックグリーンシートの所望の位置に貫通導体8aとなる貫通孔を形成し、この貫通孔にWやMo等の高融点金属粉末に適当な有機バインダー、可塑剤、溶剤等を添加混合して得た金属ペーストを充填する。また、凸部5bとなるセラミックグリーンシートは凹部5aの側壁となる打ち抜きを形成したものを積層する。その後、セラミックグリーンシートを複数枚積層し、円板状、四角板状、多角形板状等の所定形状に裁断し、これを還元雰囲気中、約1600℃の温度で焼成することにより製作される。 The wiring substrate 5 is made of a dielectric such as an alumina (Al 2 O 3 : aluminum oxide) sintered body, an aluminum nitride (AlN) sintered body, a mullite (3Al 2 O 3 · 2SiO 2 ) sintered body, It is produced as follows. For example, in the case of comprising Al 2 O 3 ceramics, first, organic binders, plasticizers and solvents suitable for raw material powders such as Al 2 O 3 , silicon oxide (SiO 2 ), magnesium oxide (MgO) and calcium oxide (CaO). Etc. are added and mixed to form a slurry. From this, a plurality of ceramic green sheets are obtained by a tape forming technique such as a conventionally known doctor blade method or calendar roll method. Next, a metal paste obtained by adding an appropriate organic binder, plasticizer, solvent, etc. to a high melting point metal powder such as W or molybdenum (Mo) to the ceramic green sheet is mixed with a thick film such as a screen printing method. A metallized layer to be the first electrode pad 6a, the second electrode pad 7a, the bonding conductor 7b, and the inner conductor layer 8b is formed in a predetermined pattern by printing and coating using a forming technique. Further, by punching with a mold or the like, a through hole to be a through conductor 8a is formed at a desired position of each ceramic green sheet, and an organic binder suitable for refractory metal powders such as W and Mo is formed in the through hole. Then, a metal paste obtained by adding and mixing a plasticizer, a solvent and the like is filled. Moreover, the ceramic green sheet used as the convex part 5b laminates what formed the punching used as the side wall of the concave part 5a. Thereafter, a plurality of ceramic green sheets are laminated, cut into a predetermined shape such as a disk shape, a square plate shape, or a polygonal plate shape, and then fired at a temperature of about 1600 ° C. in a reducing atmosphere. .

本発明の電子部品収納用パッケージにおいて、図1に示すように、接合用導体7bは配線基板5の上側主面に形成され、第2の電極パッド7aは配線基板5の下側主面に形成されており、配線基板5の上側主面に基体1が接合され、配線基板5の下側主面に外部接続端子部材10が接合されることから、配線基板5が小型集積化されても、第2の電極パッド7aと接合用導体7bとの距離を開けることができる。その結果、第2の電極パッド7aに外部接続端子部材10を接合するためのろう材と接合用導体7bに基体1を接合するためのろう材との接触が防止され、第2の電極パッド7aと接合用導体7bとが電気的に短絡してしまうのを防止することができ、第2の電極パッド7aに電気信号を確実に伝送させることができるようになる。   In the electronic component storage package of the present invention, as shown in FIG. 1, the bonding conductor 7 b is formed on the upper main surface of the wiring substrate 5, and the second electrode pad 7 a is formed on the lower main surface of the wiring substrate 5. Since the base body 1 is bonded to the upper main surface of the wiring board 5 and the external connection terminal member 10 is bonded to the lower main surface of the wiring board 5, even if the wiring board 5 is miniaturized, The distance between the second electrode pad 7a and the bonding conductor 7b can be increased. As a result, contact between the brazing material for joining the external connection terminal member 10 to the second electrode pad 7a and the brazing material for joining the substrate 1 to the joining conductor 7b is prevented, and the second electrode pad 7a. And the bonding conductor 7b can be prevented from being electrically short-circuited, and an electric signal can be reliably transmitted to the second electrode pad 7a.

また、基体1に接合される部位が上側に突出した断面四角形状の凸部5bとされ、凸部5bの上面に基体1との接合用導体7bが形成されている。すなわち、配線基板5の上側の中央部は凸部5bによって取り囲まれて成る凹部5aとされ、この凹部5aの底面には複数個の第1の電極パッド6aが配設され、第1の電極パッド6aと接合用導体7bとの間に凸部5bによって段差が形成される。その結果、配線基板5が小型集積化して、第1の電極パッド6aと接合用導体7bとの平面視距離が非常に近接したものとなっても、接合用導体7bに基体1を接合するためのろう材が第1の電極パッド6aに流れ込むのを防止し、第1の電極パッド6aと接合用導体7bとが電気的に短絡してしまうのを防止することができ、第1の電極パッド6aに電気信号を確実に伝送させることができるようになる。よって、電子部品収納用パッケージの小型集積化が可能となる。   Further, a portion to be bonded to the base body 1 is a convex portion 5b having a quadrangular cross section protruding upward, and a bonding conductor 7b for bonding to the base body 1 is formed on the upper surface of the convex portion 5b. That is, the central portion on the upper side of the wiring board 5 is a recess 5a surrounded by the protrusion 5b, and a plurality of first electrode pads 6a are disposed on the bottom surface of the recess 5a. A step is formed by the protrusion 5b between 6a and the bonding conductor 7b. As a result, the wiring substrate 5 is miniaturized and integrated, and the base 1 is bonded to the bonding conductor 7b even when the first electrode pad 6a and the bonding conductor 7b are very close to each other in plan view. The brazing filler metal can be prevented from flowing into the first electrode pad 6a, and the first electrode pad 6a and the bonding conductor 7b can be prevented from being electrically short-circuited. The electric signal can be reliably transmitted to 6a. Therefore, the electronic component storage package can be miniaturized and integrated.

本発明の電子部品収納用パッケージは、または図2,図3に示すように、配線基板5は、基体1に接合される部位が下側に突出した断面四角形状の凸部5bとされ、凸部5bの下面に基体1との接合用導体7bが形成されている。すなわち、配線基板5の下側の中央部は凸部5bによって取り囲まれて成る凹部5aとされ、この凹部5aの底面には複数個の第2の電極パッド7aが配設され、第2の電極パッド7aと接合用導体7bとの間に凸部5bによって段差が形成される。その結果、配線基板5が小型集積化して、第2の電極パッド7aと接合用導体7bとの距離が非常に近接したものとなっても、第2の電極パッド7aに外部接続端子部材10を接合するためのろう材と接合用導体7bを基体1に接合するためのろう材との接触が防止され、第2の電極パッド7aと接合用導体7bとが電気的に短絡してしまうのを防止することができ、第2の電極パッド7aに電気信号を確実に伝送させることができるようになる。よって、電子部品収納用パッケージの小型集積化が可能となる。   In the electronic component storage package of the present invention, or as shown in FIGS. 2 and 3, the wiring board 5 is formed as a convex portion 5 b having a quadrangular cross section in which a portion joined to the base body 1 projects downward. A conductor 7b for bonding to the base 1 is formed on the lower surface of the portion 5b. That is, the lower central portion of the wiring substrate 5 is a concave portion 5a surrounded by the convex portion 5b, and a plurality of second electrode pads 7a are disposed on the bottom surface of the concave portion 5a. A step is formed by the convex portion 5b between the pad 7a and the bonding conductor 7b. As a result, even if the wiring substrate 5 is miniaturized and the distance between the second electrode pad 7a and the bonding conductor 7b is very close, the external connection terminal member 10 is attached to the second electrode pad 7a. Contact between the brazing material for bonding and the brazing material for bonding the bonding conductor 7b to the base 1 is prevented, and the second electrode pad 7a and the bonding conductor 7b are electrically short-circuited. As a result, electrical signals can be reliably transmitted to the second electrode pads 7a. Therefore, the electronic component storage package can be miniaturized and integrated.

また、基体1に配線基板5がろう付けされる際に、基体1と配線基板5とが熱膨張した状態で接合され、その後常温に冷却されると配線基板5と基体1との熱膨張差による応力が配線基板5に残留することとなる。このような残留応力が配線基板5に作用したり、基体1の外周部に蓋体3を接合する際に基体1の外周部に周方向の熱応力が作用して、その熱応力が配線基板5に伝わったとしても、本発明の電子部品収納用パッケージは図1に示すように配線基板5は基体1に接合される部位が上側に突出した凸部5bとされている、または図2,図3に示すように配線基板5は基体1に接合される部位が下側に突出した凸部5bとされていることから、配線基板5の基体1との接合部が凸部5bによって補強されて、配線基板5の基体1との接合部の強度が向上する。すなわち、凸部5bによって配線基板5の基体1との接合部の厚みが厚くなる分だけ破損し難くなる。   Further, when the wiring board 5 is brazed to the base body 1, the base body 1 and the wiring board 5 are joined in a thermally expanded state, and then cooled to room temperature, the thermal expansion difference between the wiring board 5 and the base body 1. Stress on the wiring board 5 remains. Such residual stress acts on the wiring board 5, or when the lid 3 is joined to the outer peripheral portion of the base body 1, circumferential thermal stress acts on the outer peripheral portion of the base body 1, and the thermal stress is applied to the wiring board. 1, in the electronic component storage package of the present invention, as shown in FIG. 1, the wiring board 5 has a convex portion 5 b that protrudes upward from the portion bonded to the base 1, or FIG. As shown in FIG. 3, the wiring board 5 is formed with a convex portion 5b protruding downward from a portion joined to the base body 1, so that the joint portion of the wiring board 5 with the base body 1 is reinforced by the convex portion 5b. Thus, the strength of the joint portion between the wiring board 5 and the base body 1 is improved. That is, the protrusion 5b is less likely to be damaged by the increase in the thickness of the joint between the wiring board 5 and the base body 1.

また、凸部5bは配線基板5に実装される電子部品に、配線基板5と基体1とのロウ接合周辺部における残留応力が作用するのを緩和する機能がある。すなわち、凸部5bは配線基板5と基体1との継手として機能しており、凸部5bによって残留応力が集中するロウ接合部から電子部品が離されることにより、電子部品に応力が作用するのを緩和する。このように配線基板5が破損し難く、電子部品に加わる応力を緩和する機能によって、電子装置の内部の気密信頼性を向上でき、第1の電極パッド6aと第2の電極パッド7aとの電気的接続の信頼性を向上させ、内部に収納される電子部品2を正常かつ安定に作動させることができる。   Further, the convex portion 5 b has a function of relaxing the residual stress in the peripheral portion of the solder joint between the wiring substrate 5 and the substrate 1 acting on the electronic component mounted on the wiring substrate 5. That is, the convex portion 5b functions as a joint between the wiring board 5 and the base 1, and the stress acts on the electronic component by separating the electronic component from the solder joint where the residual stress is concentrated by the convex portion 5b. To ease. Thus, the wiring board 5 is not easily damaged, and the function of relaxing the stress applied to the electronic component can improve the hermetic reliability inside the electronic device. The electrical connection between the first electrode pad 6a and the second electrode pad 7a can be improved. The reliability of the general connection can be improved, and the electronic component 2 housed therein can be operated normally and stably.

近時の小型集積化した電子部品収納用パッケージにおいては配線基板5が小型薄型化してきており、残留応力によって配線基板5が破損し易くなっているので、配線基板5の基体1が接合される外周部が上側または下側に突出した凸部5bとなっている構成は、近時の小型集積化した電子部品収納用パッケージの破損防止において有効である。   In recent compact and integrated electronic component storage packages, the wiring board 5 has been reduced in size and thickness, and the wiring board 5 is easily damaged by residual stress. Therefore, the base 1 of the wiring board 5 is joined. The configuration in which the outer peripheral portion is a convex portion 5b protruding upward or downward is effective in preventing breakage of a recently-integrated electronic component storage package.

以上のように、配線基板5がクラック等によって破損し難くなり、その結果、電子部品収納用パッケージの内部の気密信頼性を良好に保持できるとともに、第1の電極パッド6aと第2の電極パッド7aとの電気的接続の信頼性を良好に保持して、内部に収納される電子部品2を正常かつ安定に作動させることができる。   As described above, the wiring board 5 is less likely to be damaged by cracks and the like. As a result, the airtight reliability inside the electronic component storage package can be satisfactorily maintained, and the first electrode pad 6a and the second electrode pad can be maintained. It is possible to maintain the reliability of the electrical connection with 7a satisfactorily and operate the electronic component 2 housed therein normally and stably.

配線基板5の下面に配設された複数個の第2の電極パッド7aには、図1〜図3に示すように、それぞれ外部接続端子部材10が、Agろう等のろう材によって接続される。外部接続端子部材10は、Fe−Ni−Co合金,Fe−Ni合金等から成り、円柱状,角柱状等の線材で成る。好ましくは、外部接続端子部材10は、第2の電極パッド7aとの接合部(上端)に、釘の頭部のように上面が平たい円形に成形された鍔部が設けられているのがよく、外部接続端子部材10を電極パッド7aに強固に接合できる。また、第2の電極パッド7aは外部接続端子部材10の頭部より大きい円形状等に形成される。   As shown in FIGS. 1 to 3, external connection terminal members 10 are respectively connected to a plurality of second electrode pads 7 a disposed on the lower surface of the wiring board 5 by a brazing material such as Ag brazing. . The external connection terminal member 10 is made of an Fe—Ni—Co alloy, Fe—Ni alloy, or the like, and is made of a wire material such as a columnar shape or a prismatic shape. Preferably, the external connection terminal member 10 is provided with a flange portion having a flat upper surface like the head of a nail at the joint portion (upper end) with the second electrode pad 7a. The external connection terminal member 10 can be firmly joined to the electrode pad 7a. Further, the second electrode pad 7 a is formed in a circular shape or the like larger than the head of the external connection terminal member 10.

このような外部接続端子部材10は、図1〜3に示すように、基体1の下面より下方に突出するような長さとされる。そして、例えば、外部接続端子部材10の先端を外部電気回路基板等を挿通させ、その根元を外部電気回路基板の電極に接続した後、余分な部分が切断される。なお、図2〜3において、外部接続端子部材10の長さを基体1の下面より大きく下方に突出しない長さにしてもよい。そして、外部電気回路基板の表面に設けられた電極に、表面実装と同じようにして半田付けしてもよい。   As shown in FIGS. 1 to 3, the external connection terminal member 10 has a length that protrudes downward from the lower surface of the base 1. Then, for example, after the external electrical circuit board or the like is inserted through the tip of the external connection terminal member 10 and the root is connected to the electrode of the external electrical circuit board, the excess portion is cut off. 2 to 3, the length of the external connection terminal member 10 may be set to a length that does not protrude downward from the lower surface of the base 1. Then, the electrodes provided on the surface of the external electric circuit board may be soldered in the same manner as surface mounting.

また、外部接続端子部材10は、図4(a),(b)に示すように、金属ボール10aまたは半田バンプ10aであってもよい。この場合、外部接続端子部材10は、銅(Cu),金(Au),錫(Sn)−鉛(Pb)合金,Au−Sn合金から成り、CuやAuから成る金属ボール10aは、Agろう等のろう材やSn−Pb合金,Au−Sn合金を介して第2の電極パッド7aに接合される。金属ボール10aには必要に応じてAuメッキ等が施される。Sn−Pb合金,Au−Sn合金から成る半田バンプで成る場合は、これらSn−Pb合金,Au−Sn合金から成る半田ボールが第2の電極パッド7aに溶着される。   Further, as shown in FIGS. 4A and 4B, the external connection terminal member 10 may be a metal ball 10a or a solder bump 10a. In this case, the external connection terminal member 10 is made of copper (Cu), gold (Au), tin (Sn) -lead (Pb) alloy, Au-Sn alloy, and the metal ball 10a made of Cu or Au is made of Ag solder. It joins to the 2nd electrode pad 7a via brazing filler metals, Sn-Pb alloy, and Au-Sn alloy. The metal ball 10a is subjected to Au plating or the like as necessary. In the case of solder bumps made of Sn—Pb alloy or Au—Sn alloy, the solder balls made of Sn—Pb alloy or Au—Sn alloy are welded to the second electrode pad 7a.

外部接続端子部材10に金属ボール10aまたは半田バンプ10aを用いることによって、電子部品収納用パッケージを外部電気回路に表面実装させることが可能となる。その結果、電子部品収納用パッケージの外部電気回路への実装作業を容易なものとすることができるとともに、外部接続用に金属ボール10aを用いることによって、電子部品収納用パッケージと外部電気回路との接続部の長さを短くすることができ、高周波信号が伝送する伝送線路長さを最小限に抑えて、接続部において伝送損失が生じるのを最小限に抑えることができる。また、電子部品2の高出力化により、電子部品2から発生する熱量が増大しても、電子部品2から発生する熱を外部接続用の金属ボール10aを介して外部電気回路基板に熱放散させやすくすることができる。これによって、電子部品2の温度上昇を防止して、電子部品2を正常かつ安定に作動させることができる。   By using the metal balls 10a or the solder bumps 10a for the external connection terminal member 10, the electronic component storage package can be surface-mounted on an external electric circuit. As a result, the mounting operation of the electronic component storage package to the external electric circuit can be facilitated, and by using the metal ball 10a for external connection, the electronic component storage package and the external electric circuit can be connected. The length of the connecting portion can be shortened, the length of the transmission line through which the high-frequency signal is transmitted can be minimized, and transmission loss can be minimized in the connecting portion. Further, even if the amount of heat generated from the electronic component 2 increases due to the high output of the electronic component 2, the heat generated from the electronic component 2 is dissipated to the external electric circuit board via the external connection metal balls 10a. It can be made easier. Thereby, the temperature rise of the electronic component 2 can be prevented, and the electronic component 2 can be operated normally and stably.

図2,図3に示される配線基板5が基体1の上側主面に接合され、配線基板5の下面外周部に下側に突出した凸部5bを有している構成において、複数の外部接続端子部材10および第2の電極パッド7aには高周波信号が接続され、外部接続端子部材10が高周波線路として機能するものが含まれていてもよい。電子部品収納用パッケージを外部電気回路基板に実装する際、基体1の下面を外部電気回路基板(図示せず)の上面に当接するようにして実装し、外部接続端子部材10を外部電気回路基板の電極に接続した際に、外部接続端子部材10と第2の電極パッド7aとの接続部から外部接続端子部材10と外部電気回路基板との接続部までの距離が凸部5bの突出高さ分長くなって、外部接続端子部材10における誘導成分(インダクタンス)を生じさせることができる。   2 and 3, the wiring board 5 is bonded to the upper main surface of the base 1, and a plurality of external connections are provided in the configuration in which the outer peripheral portion of the lower surface of the wiring board 5 has a protruding portion 5b protruding downward. A high frequency signal is connected to the terminal member 10 and the second electrode pad 7a, and the external connection terminal member 10 may function as a high frequency line. When the electronic component storage package is mounted on the external electric circuit board, the lower surface of the base 1 is mounted so as to contact the upper surface of the external electric circuit board (not shown), and the external connection terminal member 10 is mounted on the external electric circuit board. The distance from the connection portion between the external connection terminal member 10 and the second electrode pad 7a to the connection portion between the external connection terminal member 10 and the external electric circuit board is the protruding height of the convex portion 5b. Thus, an inductive component (inductance) in the external connection terminal member 10 can be generated.

一方、第2の電極パッド7aと外部接続端子部材10との接合部における第2の電極パッド7aおよび外部接続端子部材10と接地導体(例えば、接合用導体7b)との間には容量成分が生じるが、この容量成分を上記外部接続端子部材10の誘導成分によって打ち消すようにすることができる。その結果、第2の電極パッド7aと外部接続端子部材10との接合部におけるインピーダンス値を所定の値とすることができ、外部接続端子部材10を伝送する高周波信号に反射損失等の伝送損失が発生するのを少なくできる。よって、高周波信号に対しても電子部品2を正常かつ安定に作動させることのできる電子部品収納用パッケージとすることができる。   On the other hand, there is a capacitance component between the second electrode pad 7a and the external connection terminal member 10 and the ground conductor (for example, the bonding conductor 7b) at the joint between the second electrode pad 7a and the external connection terminal member 10. However, the capacitance component can be canceled by the induction component of the external connection terminal member 10. As a result, the impedance value at the joint between the second electrode pad 7a and the external connection terminal member 10 can be set to a predetermined value, and the high-frequency signal transmitted through the external connection terminal member 10 has a transmission loss such as a reflection loss. It is possible to reduce the occurrence. Therefore, it is possible to provide an electronic component storage package that can operate the electronic component 2 normally and stably with respect to a high-frequency signal.

図2においては、第2の電極パッド7aが3個2列で配列されているが、例えば、第2の電極パッド7aの3個のうち中央が高周波信号線路で、両側が接地導体線路である線路構造で配列されているのがよい。このように3個一組の線路配列とすることにより、接地(Ground)−信号(Signal)−接地(Ground)のいわゆるG−S−G構造となり、高周波信号線路の伝送特性が向上する。   In FIG. 2, three second electrode pads 7a are arranged in two rows. For example, among the three second electrode pads 7a, the center is a high-frequency signal line, and both sides are ground conductor lines. It is good to arrange in the track structure. Thus, by setting the line arrangement as a set of three, a so-called GSG structure of ground (signal) -signal (ground) -ground (ground) is obtained, and transmission characteristics of the high-frequency signal line are improved.

また好ましくは、図5(c)に示すように隣り合う第1の電極パッド6a同士の間、または図5(a),図5(b)に示すように隣り合う第2の電極パッド7a同士の間、またはこれら第1の電極パッド6a同士の間および第2の電極パッド7a同士の間の両方の配線基板5の表面に、第1の電極パッド6a同士または第2の電極パッド7a同士の間を交差するように横切る溝5cが設けられているのがよい。この溝5cにより、複数の第1の電極パッド6a同士の間または複数の第2の電極パッド7a同士の間の配線基板5表面の誘電体が取り除かれることとなる。従って、複数の第1の電極パッド6a同士の間または複数の第2の電極パッド7a同士の間に生じる容量成分を減らすことができる。例えば、誘電体がAl質焼結体である場合の誘電率は9、AlN質焼結体である場合の誘電率は10、3Al・2SiO質焼結体である場合の誘電率は6.4であり、これらが溝5cによって誘電率1の空気に置換される。 Further, preferably, between the adjacent first electrode pads 6a as shown in FIG. 5 (c), or between the adjacent second electrode pads 7a as shown in FIGS. 5 (a) and 5 (b). Between the first electrode pads 6a or between the first electrode pads 6a and between the second electrode pads 7a, between the first electrode pads 6a or between the second electrode pads 7a. It is preferable that a groove 5c is provided so as to cross each other. The groove 5c removes the dielectric on the surface of the wiring substrate 5 between the plurality of first electrode pads 6a or between the plurality of second electrode pads 7a. Accordingly, it is possible to reduce the capacitance component generated between the plurality of first electrode pads 6a or between the plurality of second electrode pads 7a. For example, if the dielectric constant when the dielectric is Al 2 O 3 quality sintered dielectric constant when it is 9, AlN sintered body is 10,3Al 2 O 3 · 2SiO 2 Quality sintered body Has a dielectric constant of 6.4, and these are replaced with air having a dielectric constant of 1 by the groove 5c.

その結果、複数の第1の電極パッド6aまたは複数の第2の電極パッド7aを伝送する電気信号に対するインピーダンス値の低下を少なくすることができ、インピーダンス・ミスマッチを小さくすることができる。特に、近時の小型化した電子部品収納用パッケージにおいては、複数の第1の電極パッド6a同士の間または複数の第2の電極パッド7a同士の間の距離が近接しており、容量成分を低減させる必要性は増大している。   As a result, it is possible to reduce a decrease in impedance value with respect to an electric signal transmitted through the plurality of first electrode pads 6a or the plurality of second electrode pads 7a, and to reduce impedance mismatch. In particular, in recent miniaturized electronic component storage packages, the distances between the plurality of first electrode pads 6a or between the plurality of second electrode pads 7a are close to each other, and the capacitance component is reduced. The need for reduction is increasing.

なお、溝5cの平面視形状は、図5(a),図5(b)に示す長円形であったり、図5(c)に示す円形を連続的に複数個配置した形状であったりする。その他、長方形,楕円形等としてもよく、種々の形状とすることができる。   The planar view shape of the groove 5c may be an oval shape shown in FIGS. 5A and 5B, or a shape in which a plurality of circular shapes shown in FIG. 5C are continuously arranged. . In addition, the shape may be a rectangle, an ellipse, or the like, and may have various shapes.

なお、図5(a),図5(b)に示すように、複数の第2の電極パッド7a同士の間の配線基板5に溝5cを設ける方が、第1の電極パッド6a同士の間に溝5cを設ける場合より効果的である。一般に第1の電極パッド6aよりも電極パッドの大きさが大きい第2の電極パッド7a同士の間に溝5cを設ける方が実効誘電率を下げ、複数の第2の電極パッド7a同士の間に生じる容量成分を減らす効果が大きくなる。一般に、第2の電極パッド7aは外部接続端子部材10が接合される場合があり、外部接続端子部材10との接合面積を確保する上で第2の電極パッド7aの面積は第1の電極パッド6aの面積よりも大きく形成される。そのため、複数の第2の電極パッド7a同士の間に生じる容量成分の方が第1の電極パッド6a同士の間に生じる容量成分より大きくなる。従って、複数の第2の電極パッド7a同士の間に溝5cを設ける方が容量成分の抑制効果が大きい。   As shown in FIGS. 5A and 5B, the groove 5c is provided between the first electrode pads 6a in the wiring substrate 5 between the plurality of second electrode pads 7a. It is more effective than the case where the groove 5c is provided. Generally, providing the groove 5c between the second electrode pads 7a having a larger electrode pad size than the first electrode pad 6a lowers the effective dielectric constant, so that the gap between the plurality of second electrode pads 7a is reduced. The effect of reducing the generated capacitance component is increased. In general, the second electrode pad 7a may be bonded to the external connection terminal member 10, and the area of the second electrode pad 7a is the first electrode pad in order to secure a bonding area with the external connection terminal member 10. It is formed larger than the area of 6a. For this reason, the capacitance component generated between the plurality of second electrode pads 7a is larger than the capacitance component generated between the first electrode pads 6a. Therefore, it is more effective to suppress the capacitance component if the groove 5c is provided between the plurality of second electrode pads 7a.

図5(a)では、第2の電極パッド7aが縦3個横2列に配列されている。例えば、第2の電極パッド7aの縦3個に配置された第2の電極パッド7aのうち中央に高周波信号線路が接続され、その上下両側に接地導体線路が接続される線路構成のものが横2列に配列されているG−S−G線路構成を示している。そして、GとSとなる第2の電極パッド7a間にそれぞれ溝5cが設けられている。この構成により、G−S間で発生する容量成分を低減させることができ、高周波信号線路となる第2の電極パッド7aを通過する高周波信号のインピーダンス値を大きく低下させることがない。   In FIG. 5A, the second electrode pads 7a are arranged in three vertical rows and two horizontal rows. For example, a line configuration in which a high frequency signal line is connected to the center of the second electrode pads 7a arranged in three vertical positions of the second electrode pads 7a and a ground conductor line is connected to the upper and lower sides thereof is horizontal. A GSG line configuration arranged in two rows is shown. And the groove | channel 5c is provided between the 2nd electrode pads 7a used as G and S, respectively. With this configuration, the capacitance component generated between GS can be reduced, and the impedance value of the high-frequency signal passing through the second electrode pad 7a serving as the high-frequency signal line is not greatly reduced.

図5(b)では、第2の電極パッド7aが縦4個横2列に配列されている。例えば、第2の電極パッド7aの縦4個に配置された第2の電極パッド7aのうち中央に配置された2個に高周波信号線路が接続され、その上下両側に接地導体線路が接続される。このように4個一組の線路構成とすることにより、接地(Ground)−信号(Signal)−信号(Signal)−接地(Ground)のいわゆるG−S−S−G線路構成とでき、2本の高周波信号線路に差動信号を伝送させることができる。この構成においては、図5(b)に示すように、2個の高周波信号線路となる第2の電極パッド7a間に溝5cを1箇所設けるだけでも、容量成分の低下の効果が大きい。一般に差動信号は互いに逆位相(+と−)の信号を1組として伝送させるが、その際、G−S間の容量成分による影響に比べると、互いに逆位相の信号が伝送するS−S間の容量成分による影響は大きくなる。また、第2の電極パッド7a間に溝5cを1箇所だけ設ける場合、製造工程を少なくして製造効率を向上することも可能となる。   In FIG. 5B, the second electrode pads 7a are arranged in four vertical rows and two horizontal rows. For example, a high-frequency signal line is connected to two of the second electrode pads 7a arranged vertically in the second electrode pad 7a, and two ground pads are connected to the upper and lower sides thereof. . In this way, by forming a set of four lines, a so-called GSSG line configuration of ground (Signal) -signal (Signal) -signal (Signal) -ground (Ground) can be obtained. A differential signal can be transmitted to the high-frequency signal line. In this configuration, as shown in FIG. 5B, the effect of lowering the capacitance component is great even if only one groove 5c is provided between the second electrode pads 7a serving as two high-frequency signal lines. In general, differential signals are transmitted as a set of signals having opposite phases (+ and −) as a set. At this time, SS signals in which signals having phases opposite to each other are transmitted compared to the influence of the capacitive component between GS. The influence of the capacitance component in between increases. In addition, when only one groove 5c is provided between the second electrode pads 7a, it is possible to reduce manufacturing steps and improve manufacturing efficiency.

好ましくは、図3に示すように、配線基板5の上面の、第1の電極パッド6aの周囲に所定間隔をもって第1の同一面導体層6bを形成し、また配線基板5の凹部5aの底面には第2の電極パッド7aの周囲に所定間隔をもって第2の同一面接地導体層7cを形成するのがよい。この構成により、配線基板5の上下面において第1の同一面導体層6bおよび第2の同一面接地導体層7cによってシールド効果(電磁遮蔽効果)が得られ、高周波信号がノイズ等の影響により正常に入出力できなくなるのを防止するとともに、配線基板5の上下面での高周波信号の放射による損失を防止する。第1の同一面導体層6bおよび第2の同一面接地導体層7cは、配線基板5の電極等形成部以外の上面および凹部5a底面を覆うようにほぼ全面に形成し、基体1と接続するとよい。   Preferably, as shown in FIG. 3, the first coplanar conductor layer 6 b is formed on the upper surface of the wiring substrate 5 around the first electrode pad 6 a with a predetermined interval, and the bottom surface of the recess 5 a of the wiring substrate 5. In this case, the second coplanar ground conductor layer 7c is preferably formed around the second electrode pad 7a with a predetermined interval. With this configuration, the first coplanar conductor layer 6b and the second coplanar ground conductor layer 7c provide a shielding effect (electromagnetic shielding effect) on the upper and lower surfaces of the wiring board 5, and high-frequency signals are normal due to the influence of noise and the like. In addition, it is possible to prevent loss due to radiation of high-frequency signals on the upper and lower surfaces of the wiring board 5. When the first coplanar conductor layer 6b and the second coplanar ground conductor layer 7c are formed on almost the entire surface so as to cover the upper surface of the wiring board 5 other than the electrode forming portion and the bottom surface of the concave portion 5a, Good.

蓋体3は、Fe−Ni−Co合金等の金属のインゴットに圧延加工や打ち抜き加工、絞り加工等の従来周知の金属加工法を施すことによって、上端面が閉じており、下端が開かれた有底筒状の形状に製作される。この有底筒状の蓋体3は、横断面が円形状、多角形状の筒状部と筒状部横断面と同形状の上端面3aが個々に製作され、それらをろう付け、半田付け、溶接等によって接合したものであってもよい。   The lid 3 has a top end surface closed and a bottom end opened by applying a conventionally known metal processing method such as rolling, punching, drawing, etc. to a metal ingot such as an Fe—Ni—Co alloy. It is manufactured in a bottomed cylindrical shape. The bottomed cylindrical lid 3 has a circular cross section, a polygonal cylindrical portion, and an upper end surface 3a having the same shape as the cross section of the cylindrical portion, which are individually manufactured, brazed, soldered, It may be joined by welding or the like.

そして、図1,図2に示される電子部品2としてLD,PD等の光半導体素子2を気密封止して収納した光半導体素子収納用パッケージにおいては、光半導体素子2と光ファイバ12との間での光信号の入出力を可能なものとするため、蓋体3の上端面3aには、平面視において円形または多角形の貫通孔3bが設けられ、貫通孔3bを塞ぐように貫通孔3bの上端面3a側開口の周囲に、透光性部材4がガラス接合や半田付け等により気密に接合される。透光性部材4は、ガラスやサファイア等から成る円板状,レンズ状,球状または半球状等のものであり、球状の場合周縁部で、円板状やレンズ状の場合一主面の外周部で、半球状の場合平面部の外周部で蓋体3に接合される。電子部品2が集積回路素子(IC),電界効果型トランジスタ(FET),コンデンサ等の光半導体素子以外のものである場合は、電子部品2に光信号を入出力する必要が無いので、蓋体3の上端面3aの貫通孔3bと透光性部材4は不要である。   In the optical semiconductor element housing package in which the optical semiconductor element 2 such as LD or PD is hermetically sealed and accommodated as the electronic component 2 shown in FIGS. 1 and 2, the optical semiconductor element 2 and the optical fiber 12 In order to be able to input and output optical signals between them, the upper end surface 3a of the lid 3 is provided with a circular or polygonal through hole 3b in plan view, and the through hole is formed so as to close the through hole 3b. The translucent member 4 is airtightly joined to the periphery of the upper end surface 3a side opening of 3b by glass joining or soldering. The translucent member 4 has a disk shape, a lens shape, a spherical shape, a hemispherical shape, or the like made of glass, sapphire, or the like. In the case of a hemispherical part, it is joined to the lid 3 at the outer peripheral part of the flat part. When the electronic component 2 is other than an optical semiconductor device such as an integrated circuit element (IC), a field effect transistor (FET), or a capacitor, it is not necessary to input / output an optical signal to / from the electronic component 2, so the lid 3 and the translucent member 4 are unnecessary.

そして、蓋体3の下端3cは、図1〜図4に示されるように鍔部とされ、鍔部の外周端は、基体1の外周端とほぼ同じ外径となるように形成される。そして、蓋体3を基体1の上側主面に載置し、蓋体3の下端3c(鍔部)と基体1の上側主面の外周部とがシーム溶接法等によって接合される。この接合方法によって、基体1と蓋体3の下端3cとは気密に封止される。   The lower end 3 c of the lid 3 is a flange as shown in FIGS. 1 to 4, and the outer peripheral end of the flange is formed to have the same outer diameter as the outer peripheral end of the base 1. Then, the lid 3 is placed on the upper main surface of the base body 1, and the lower end 3c (the flange) of the lid body 3 and the outer peripheral portion of the upper main surface of the base body 1 are joined by a seam welding method or the like. By this joining method, the base 1 and the lower end 3c of the lid 3 are hermetically sealed.

また、光ファイバ12は、電子部品2が光半導体素子である場合に、光半導体素子2と外部との光信号の授受を行なうために設けられるものであり、Fe−Ni−Co合金等の金属から成る円筒状の固定部材13の上端面に固定され、固定部材13の下端面が蓋体3の外周面にレーザ溶接法等の溶接によって接合されることによって光ファイバ12が固定部材13を介して透光性部材4の上方に固定され、製品としての光半導体装置となる。これにより、光ファイバ12を介して内部に収容する光半導体素子2と外部との光信号の授受が可能となる。電子部品2が光半導体素子以外のものである場合には、電子部品2に光信号を入出力させる必要が無いので、光ファイバ12および固定部材13を固定する必要はない。   The optical fiber 12 is provided to exchange optical signals between the optical semiconductor element 2 and the outside when the electronic component 2 is an optical semiconductor element, and is made of a metal such as an Fe—Ni—Co alloy. Is fixed to the upper end surface of the cylindrical fixing member 13, and the lower end surface of the fixing member 13 is joined to the outer peripheral surface of the lid 3 by welding such as laser welding, so that the optical fiber 12 is interposed via the fixing member 13. Then, it is fixed above the translucent member 4 and becomes an optical semiconductor device as a product. As a result, optical signals can be exchanged between the optical semiconductor element 2 accommodated inside and the outside via the optical fiber 12. When the electronic component 2 is other than an optical semiconductor element, it is not necessary to input / output an optical signal to / from the electronic component 2, and therefore it is not necessary to fix the optical fiber 12 and the fixing member 13.

なお、電子装置の一例としての光半導体装置は、電子部品2の電極を配線基板5を介して外部電気回路に電気的に接続し、外部電気回路から供給される電気信号によって光半導体素子2にレーザ光等の光を励起させ、この光を透光性部材4、光ファイバ12の順に透過させ、光ファイバ12を介して外部に伝送することによって、高速光通信等に使用される光半導体装置として機能する。または、光ファイバ12を介して外部から伝えられ、透光性部材4を透過して電子部品2としての受光素子に伝達された光信号を、電気信号として配線基板5を介して外部電気回路に出力する。   The optical semiconductor device as an example of the electronic device electrically connects the electrode of the electronic component 2 to an external electric circuit via the wiring substrate 5 and connects to the optical semiconductor element 2 by an electric signal supplied from the external electric circuit. An optical semiconductor device used for high-speed optical communication or the like by exciting light such as laser light, transmitting the light in the order of the translucent member 4 and the optical fiber 12, and transmitting the light to the outside through the optical fiber 12. Function as. Alternatively, an optical signal transmitted from the outside via the optical fiber 12 and transmitted to the light receiving element as the electronic component 2 through the translucent member 4 is transmitted as an electric signal to the external electric circuit via the wiring board 5. Output.

なお、本発明は上記実施の形態の例に限定されるものではなく、本発明の要旨を逸脱しない範囲内であれば種々の変更を施すことは何等差し支えない。例えば、外部接続端子部材10はCuやAu等の低抵抗のものから成っていてもよい。この構成により、外部接続端子部材10を伝送する信号に生ずる抵抗損失が大きくなるのを有効に防止することができる。   It should be noted that the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the present invention. For example, the external connection terminal member 10 may be made of a low resistance material such as Cu or Au. With this configuration, it is possible to effectively prevent an increase in resistance loss that occurs in a signal transmitted through the external connection terminal member 10.

また、上記実施の形態の説明において上下左右という用語は、単に図面上の位置関係を説明するために用いたものであり、実際の使用時における位置関係を意味するものではない。   In the description of the above embodiment, the terms “upper, lower, left and right” are merely used to describe the positional relationship in the drawings, and do not mean the positional relationship in actual use.

(a)は本発明の電子部品収納用パッケージおよび電子装置の実施の形態の一例示す断面図、(b)は(a)に示す電子部品収納用パッケージの上面図である。(A) is sectional drawing which shows an example of embodiment of the electronic component storage package and electronic device of this invention, (b) is a top view of the electronic component storage package shown to (a). (a)は本発明の電子部品収納用パッケージおよび電子装置の実施の形態の他の例を示す断面図、(b)は(a)の下面図である。(A) is sectional drawing which shows the other example of embodiment of the electronic component storage package and electronic device of this invention, (b) is a bottom view of (a). (a)は本発明の電子部品収納用パッケージおよび電子装置の実施の形態の他の例を示す断面図、(b)は(a)の下面図である。(A) is sectional drawing which shows the other example of embodiment of the electronic component storage package and electronic device of this invention, (b) is a bottom view of (a). (a)は本発明の電子部品収納用パッケージおよび電子装置の実施の形態の他の例を示す断面図、(b)は(a)の下面図である。(A) is sectional drawing which shows the other example of embodiment of the electronic component storage package and electronic device of this invention, (b) is a bottom view of (a). (a),(b)はそれぞれ本発明の電子部品収納用パッケージに用いられる配線基板の実施の形態の他の例を示す下面図である。(c)は本発明の電子部品収納用パッケージに用いられる配線基板の実施の形態の他の例を示す上面図である。(A), (b) is a bottom view which shows the other example of embodiment of the wiring board used for the electronic component storage package of this invention, respectively. (C) is a top view which shows the other example of embodiment of the wiring board used for the electronic component storage package of this invention. 従来の電子部品収納用パッケージおよび電子装置の例を示す断面図である。It is sectional drawing which shows the example of the conventional package for electronic component accommodation, and an electronic apparatus.

符号の説明Explanation of symbols

1:基体
1a:貫通穴
2:電子部品
3:蓋体
3a:上端面
3b:貫通孔
3c:下端
4:透光性部材
5:配線基板
5b:凸部
5c:溝
6a:第1の電極パッド
7a:第2の電極パッド
8:内部導体
10:外部接続端子部材
1: Substrate 1a: Through hole 2: Electronic component 3: Lid 3a: Upper end surface 3b: Through hole 3c: Lower end 4: Translucent member 5: Wiring substrate 5b: Convex portion 5c: Groove 6a: First electrode pad 7a: second electrode pad 8: internal conductor 10: external connection terminal member

Claims (8)

上下主面間を貫通する貫通穴が形成された平板状の金属製の基体と、前記貫通穴を覆うように前記基体の下側主面に接合され、上面に配設された複数の第1の電極パッドに接続されて他の表面に配設された複数の第2の電極パッドを有する配線基板とを具備している電子部品収納用パッケージであって、前記配線基板は、前記基体に接合される上面外周部に凸部を有し、該凸部の上面に前記基体との接合用導体が形成されていることを特徴とする電子部品収納用パッケージ。 A flat metal base having a through-hole penetrating between the upper and lower main surfaces, and a plurality of first members joined to the lower main surface of the base so as to cover the through-hole and disposed on the upper surface And a wiring board having a plurality of second electrode pads connected to the other electrode pads, the wiring board being bonded to the base body. A package for storing electronic parts, characterized in that a convex portion is formed on an outer peripheral portion of the upper surface, and a conductor for bonding to the base is formed on an upper surface of the convex portion. 上下主面間を貫通する貫通穴が形成された平板状の金属製の基体と、前記貫通穴を覆うように前記基体の上側主面に接合され、上面に配設された複数の第1の電極パッドに接続されて下面に配設された複数の第2の電極パッドを有する配線基板とを具備している電子部品収納用パッケージであって、前記配線基板は、前記基体に接合される下面外周部に凸部を有し、該凸部の下面に前記基体との接合用導体が形成されていることを特徴とする電子部品収納用パッケージ。 A flat metal base having a through-hole penetrating between the upper and lower main surfaces, and a plurality of first bases bonded to the upper main surface of the base so as to cover the through-hole and disposed on the upper surface And a wiring board having a plurality of second electrode pads connected to the electrode pad and disposed on the lower surface, wherein the wiring board is bonded to the base. A package for storing electronic components, characterized in that a convex portion is provided on an outer peripheral portion, and a conductor for joining to the base is formed on a lower surface of the convex portion. 前記第2の電極パッドの少なくとも一つには、高周波信号が接続されることを特徴とする請求項2記載の電子部品収納用パッケージ。 3. The electronic component storage package according to claim 2, wherein a high frequency signal is connected to at least one of the second electrode pads. 前記第2の電極パッドに、線材で成る外部接続端子部材がそれぞれ接合されていることを特徴とする請求項1乃至請求項3のいずれかに記載の電子部品収納用パッケージ。 4. The electronic component storage package according to claim 1, wherein an external connection terminal member made of a wire is joined to each of the second electrode pads. 5. 前記第2の電極パッドに、金属ボールまたは半田バンプで成る外部接続端子部材がそれぞれ接合されていることを特徴とする請求項1乃至請求項3のいずれかに記載の電子部品収納用パッケージ。 4. The electronic component storage package according to claim 1, wherein external connection terminal members made of metal balls or solder bumps are joined to the second electrode pads. 5. 前記配線基板の表面の、隣り合う前記第1の電極パッド同士の間および隣り合う前記第2の電極パッド同士の間の少なくとも一方に、前記第1の電極パッド同士の間または前記第2の電極パッド同士の間を横切るように溝が設けられていることを特徴とする請求項1乃至請求項5のいずれかに記載の電子部品収納用パッケージ。 At least one of the surfaces of the wiring board between the adjacent first electrode pads and between the adjacent second electrode pads is between the first electrode pads or the second electrode. 6. The electronic component storage package according to claim 1, wherein a groove is provided so as to cross between the pads. 請求項1乃至請求項6のいずれかに記載の電子部品収納用パッケージと、前記配線基板の上面に載置された電子部品と、上端面が閉じているとともに下端が開かれた筒状とされており、前記基体の上側主面の外周部に前記下端が接合された蓋体とを具備していることを特徴とする電子装置。 The electronic component storage package according to any one of claims 1 to 6, an electronic component placed on an upper surface of the wiring board, and a cylindrical shape having an upper end surface closed and a lower end opened. An electronic device comprising: a lid body having the lower end joined to an outer peripheral portion of the upper main surface of the base body. 請求項1乃至請求項7のいずれかに記載の電子部品収納用パッケージと、上端面の中央部に貫通孔が形成されているとともに下端が開かれた筒状とされており、前記基体の上側主面の外周部に前記下端が接合された金属製の蓋体と、前記貫通孔の開口の周囲に接合された透光性部材と、該透光性部材に受光部または発光部を対向させて前記配線基板の上面に載置された光半導体素子とを具備していることを特徴とする光半導体装置。 The electronic component storage package according to any one of claims 1 to 7, and a cylindrical shape in which a through hole is formed in a central portion of an upper end surface and a lower end is opened, and the upper side of the base body A metal lid having the lower end joined to the outer peripheral part of the main surface, a translucent member joined around the opening of the through hole, and a light receiving part or a light emitting part facing the translucent member And an optical semiconductor element mounted on the upper surface of the wiring board.
JP2007166468A 2006-10-27 2007-06-25 Electronic component storage package, electronic device, and optical semiconductor device Expired - Fee Related JP4823155B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2007166468A JP4823155B2 (en) 2006-10-27 2007-06-25 Electronic component storage package, electronic device, and optical semiconductor device

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2006292382 2006-10-27
JP2006292382 2006-10-27
JP2007166468A JP4823155B2 (en) 2006-10-27 2007-06-25 Electronic component storage package, electronic device, and optical semiconductor device

Publications (2)

Publication Number Publication Date
JP2008135696A true JP2008135696A (en) 2008-06-12
JP4823155B2 JP4823155B2 (en) 2011-11-24

Family

ID=39560297

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007166468A Expired - Fee Related JP4823155B2 (en) 2006-10-27 2007-06-25 Electronic component storage package, electronic device, and optical semiconductor device

Country Status (1)

Country Link
JP (1) JP4823155B2 (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009078384A1 (en) * 2007-12-18 2009-06-25 Nec Corporation Can type optical module
JP2011204788A (en) * 2010-03-24 2011-10-13 Sumitomo Electric Ind Ltd Optical module
JP2012019158A (en) * 2010-07-09 2012-01-26 Furukawa Electric Co Ltd:The Surface emitting laer element and surface emitting laer array element
JP2016006865A (en) * 2014-05-28 2016-01-14 京セラ株式会社 Substrate for optical device, package for optical device, optical device and projector
EP3125299A4 (en) * 2014-07-17 2017-05-17 Wuhan Telecommunication Devices Co., Ltd. High-frequency photoelectric detector encapsulation base encapsulated by adopting multi-layer ceramic tin
JP2019021759A (en) * 2017-07-17 2019-02-07 日本特殊陶業株式会社 Light-emitting element mounting package and manufacturing method thereof
JP2019186380A (en) * 2018-04-10 2019-10-24 日本ルメンタム株式会社 Optical module
CN112585743A (en) * 2018-12-26 2021-03-30 京瓷株式会社 Wiring substrate, package for housing electronic component, and electronic device
JP7454439B2 (en) 2020-04-23 2024-03-22 スタンレー電気株式会社 semiconductor light emitting device

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004221095A (en) * 2002-01-30 2004-08-05 Kyocera Corp Optical semiconductor device
JP2004349567A (en) * 2003-05-23 2004-12-09 Kyocera Corp Package for housing semiconductor element and semiconductor device
JP2005159277A (en) * 2003-10-30 2005-06-16 Kyocera Corp Package for housing optical semiconductor device and optical semiconductor apparatus
JP2005217098A (en) * 2004-01-29 2005-08-11 Kyocera Corp Photo-semiconductor device
JP2006245090A (en) * 2005-03-01 2006-09-14 Konica Minolta Holdings Inc Package for semiconductor and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004221095A (en) * 2002-01-30 2004-08-05 Kyocera Corp Optical semiconductor device
JP2004349567A (en) * 2003-05-23 2004-12-09 Kyocera Corp Package for housing semiconductor element and semiconductor device
JP2005159277A (en) * 2003-10-30 2005-06-16 Kyocera Corp Package for housing optical semiconductor device and optical semiconductor apparatus
JP2005217098A (en) * 2004-01-29 2005-08-11 Kyocera Corp Photo-semiconductor device
JP2006245090A (en) * 2005-03-01 2006-09-14 Konica Minolta Holdings Inc Package for semiconductor and manufacturing method thereof

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2009078384A1 (en) * 2007-12-18 2009-06-25 Nec Corporation Can type optical module
JP2011204788A (en) * 2010-03-24 2011-10-13 Sumitomo Electric Ind Ltd Optical module
JP2012019158A (en) * 2010-07-09 2012-01-26 Furukawa Electric Co Ltd:The Surface emitting laer element and surface emitting laer array element
JP2016006865A (en) * 2014-05-28 2016-01-14 京セラ株式会社 Substrate for optical device, package for optical device, optical device and projector
EP3125299A4 (en) * 2014-07-17 2017-05-17 Wuhan Telecommunication Devices Co., Ltd. High-frequency photoelectric detector encapsulation base encapsulated by adopting multi-layer ceramic tin
JP2017516319A (en) * 2014-07-17 2017-06-15 武漢電信器件有限公司 High frequency photoelectric detector package base using multilayer ceramic tank type package
JP2019021759A (en) * 2017-07-17 2019-02-07 日本特殊陶業株式会社 Light-emitting element mounting package and manufacturing method thereof
JP2019186380A (en) * 2018-04-10 2019-10-24 日本ルメンタム株式会社 Optical module
JP7063695B2 (en) 2018-04-10 2022-05-09 日本ルメンタム株式会社 Optical module
CN112585743A (en) * 2018-12-26 2021-03-30 京瓷株式会社 Wiring substrate, package for housing electronic component, and electronic device
CN112585743B (en) * 2018-12-26 2023-10-13 京瓷株式会社 Wiring substrate, electronic component housing package, and electronic device
JP7454439B2 (en) 2020-04-23 2024-03-22 スタンレー電気株式会社 semiconductor light emitting device

Also Published As

Publication number Publication date
JP4823155B2 (en) 2011-11-24

Similar Documents

Publication Publication Date Title
JP4823155B2 (en) Electronic component storage package, electronic device, and optical semiconductor device
WO2015129731A1 (en) Electronic-component-containing package and electronic device
JP4822820B2 (en) Semiconductor element storage package and semiconductor device
JP4903470B2 (en) Optical semiconductor element storage package and optical semiconductor device
JP6274358B1 (en) Semiconductor device
JP4511376B2 (en) Connection terminal and electronic component storage package and electronic device using the same
JP2006270082A (en) Wiring board and electronic device using it
JP4903738B2 (en) Electronic component storage package and electronic device
JP2005159277A (en) Package for housing optical semiconductor device and optical semiconductor apparatus
JP2009283898A (en) Electronic part container, package for storing electronic part using the same and electronic device
JP3981645B2 (en) I / O terminal and semiconductor element storage package and semiconductor device
JP5873167B2 (en) Semiconductor element storage package and semiconductor device
JP2004356391A (en) Package for encasing semiconductor element and semiconductor device
JP5709427B2 (en) Device storage package and semiconductor device including the same
JP5235612B2 (en) Package and electronic device
JP4373831B2 (en) Electronic component storage package and electronic device
JP4139165B2 (en) Input / output terminal for semiconductor element storage package, semiconductor element storage package, and semiconductor device
JP2006128267A (en) I/o terminal, package for storing electronic component using same, and electronic device
JP3914764B2 (en) Optical semiconductor device
JP2003046180A (en) Input-output terminal, package for housing optical semiconductor element, and optical semiconductor device
JP2002314190A (en) Package for storing optical semiconductor element and optical semiconductor device
JP5528484B2 (en) Input / output terminal and optical semiconductor element storage package, and optical semiconductor device
JP2007150276A (en) Package for housing optical semiconductor element, and optical semiconductor device
JP2004221505A (en) Package for storing optical semiconductor element and optical semiconductor device
JP2004296456A (en) Package for housing optical semiconductor element, and optical semiconductor device

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20091215

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110729

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20110809

A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20110906

R150 Certificate of patent or registration of utility model

Free format text: JAPANESE INTERMEDIATE CODE: R150

FPAY Renewal fee payment (event date is renewal date of database)

Free format text: PAYMENT UNTIL: 20140916

Year of fee payment: 3

LAPS Cancellation because of no payment of annual fees