JP2008077768A - 半導体記憶装置 - Google Patents
半導体記憶装置 Download PDFInfo
- Publication number
- JP2008077768A JP2008077768A JP2006256180A JP2006256180A JP2008077768A JP 2008077768 A JP2008077768 A JP 2008077768A JP 2006256180 A JP2006256180 A JP 2006256180A JP 2006256180 A JP2006256180 A JP 2006256180A JP 2008077768 A JP2008077768 A JP 2008077768A
- Authority
- JP
- Japan
- Prior art keywords
- write
- read
- memory device
- semiconductor memory
- cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
- G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
- G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
- G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
- G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
- G11C11/413—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing, timing or power reduction
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
- G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Static Random-Access Memory (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006256180A JP2008077768A (ja) | 2006-09-21 | 2006-09-21 | 半導体記憶装置 |
| US11/898,543 US7583543B2 (en) | 2006-09-21 | 2007-09-13 | Semiconductor memory device including write selectors |
| CNA2007101535780A CN101149970A (zh) | 2006-09-21 | 2007-09-21 | 半导体存储器件 |
| US12/535,212 US7974126B2 (en) | 2006-09-21 | 2009-08-04 | Semiconductor memory device including write selectors |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006256180A JP2008077768A (ja) | 2006-09-21 | 2006-09-21 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008077768A true JP2008077768A (ja) | 2008-04-03 |
| JP2008077768A5 JP2008077768A5 (enExample) | 2009-09-17 |
Family
ID=39224767
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006256180A Pending JP2008077768A (ja) | 2006-09-21 | 2006-09-21 | 半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US7583543B2 (enExample) |
| JP (1) | JP2008077768A (enExample) |
| CN (1) | CN101149970A (enExample) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008198242A (ja) * | 2007-02-08 | 2008-08-28 | Toshiba Corp | 半導体記憶装置 |
| CN101727972B (zh) * | 2008-10-13 | 2012-10-10 | 联发科技股份有限公司 | 静态随机存取存储器装置及其存取方法 |
Families Citing this family (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008077768A (ja) * | 2006-09-21 | 2008-04-03 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| US7864600B2 (en) * | 2008-06-19 | 2011-01-04 | Texas Instruments Incorporated | Memory cell employing reduced voltage |
| US8619477B2 (en) * | 2010-07-20 | 2013-12-31 | Taiwan Semiconductor Manufacturing Company, Ltd. | Two-port SRAM write tracking scheme |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005275382A (ja) * | 2004-02-25 | 2005-10-06 | Hitachi Displays Ltd | 表示装置 |
| WO2008032549A1 (fr) * | 2006-09-13 | 2008-03-20 | Nec Corporation | Dispositif de stockage semiconducteur |
| JP2008198242A (ja) * | 2007-02-08 | 2008-08-28 | Toshiba Corp | 半導体記憶装置 |
Family Cites Families (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3698929B2 (ja) | 1999-09-22 | 2005-09-21 | 日本電気株式会社 | 半導体記憶装置 |
| KR100419992B1 (ko) * | 2002-01-12 | 2004-02-26 | 삼성전자주식회사 | 유니-트랜지스터 랜덤 액세스 메모리 장치 및 그것의읽기, 쓰기 그리고 리프레쉬 방법 |
| JP4005535B2 (ja) * | 2003-07-02 | 2007-11-07 | 松下電器産業株式会社 | 半導体記憶装置 |
| JP2005056452A (ja) * | 2003-08-04 | 2005-03-03 | Hitachi Ltd | メモリ及び半導体装置 |
| JP2008077768A (ja) * | 2006-09-21 | 2008-04-03 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
-
2006
- 2006-09-21 JP JP2006256180A patent/JP2008077768A/ja active Pending
-
2007
- 2007-09-13 US US11/898,543 patent/US7583543B2/en not_active Expired - Fee Related
- 2007-09-21 CN CNA2007101535780A patent/CN101149970A/zh active Pending
-
2009
- 2009-08-04 US US12/535,212 patent/US7974126B2/en not_active Expired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005275382A (ja) * | 2004-02-25 | 2005-10-06 | Hitachi Displays Ltd | 表示装置 |
| WO2008032549A1 (fr) * | 2006-09-13 | 2008-03-20 | Nec Corporation | Dispositif de stockage semiconducteur |
| JP2008198242A (ja) * | 2007-02-08 | 2008-08-28 | Toshiba Corp | 半導体記憶装置 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2008198242A (ja) * | 2007-02-08 | 2008-08-28 | Toshiba Corp | 半導体記憶装置 |
| CN101727972B (zh) * | 2008-10-13 | 2012-10-10 | 联发科技股份有限公司 | 静态随机存取存储器装置及其存取方法 |
Also Published As
| Publication number | Publication date |
|---|---|
| US20080074932A1 (en) | 2008-03-27 |
| US7583543B2 (en) | 2009-09-01 |
| US7974126B2 (en) | 2011-07-05 |
| CN101149970A (zh) | 2008-03-26 |
| US20090290438A1 (en) | 2009-11-26 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090730 |
|
| A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20090730 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20111115 |
|
| A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20120306 |