JP2008041934A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 67
- 238000004519 manufacturing process Methods 0.000 title claims description 54
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims abstract description 65
- 229910052710 silicon Inorganic materials 0.000 claims abstract description 65
- 239000010703 silicon Substances 0.000 claims abstract description 65
- 239000000758 substrate Substances 0.000 claims abstract description 48
- 238000005121 nitriding Methods 0.000 claims abstract description 35
- 238000000151 deposition Methods 0.000 claims abstract description 16
- 150000004767 nitrides Chemical class 0.000 claims abstract description 12
- 238000000034 method Methods 0.000 claims description 68
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 17
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 14
- QJGQUHMNIGDVPM-UHFFFAOYSA-N nitrogen group Chemical group [N] QJGQUHMNIGDVPM-UHFFFAOYSA-N 0.000 claims description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 12
- 230000001590 oxidative effect Effects 0.000 claims description 3
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 abstract description 148
- 229910052757 nitrogen Inorganic materials 0.000 abstract description 74
- 230000015572 biosynthetic process Effects 0.000 abstract description 10
- 230000001546 nitrifying effect Effects 0.000 abstract 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 44
- 238000000231 atomic layer deposition Methods 0.000 description 14
- 230000000052 comparative effect Effects 0.000 description 14
- 238000009792 diffusion process Methods 0.000 description 10
- 230000008021 deposition Effects 0.000 description 7
- 239000012535 impurity Substances 0.000 description 7
- 238000005229 chemical vapour deposition Methods 0.000 description 5
- 230000003647 oxidation Effects 0.000 description 3
- 238000007254 oxidation reaction Methods 0.000 description 3
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- 238000009825 accumulation Methods 0.000 description 1
- QVGXLLKOCUKJST-UHFFFAOYSA-N atomic oxygen Chemical compound [O] QVGXLLKOCUKJST-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 230000003247 decreasing effect Effects 0.000 description 1
- 230000000779 depleting effect Effects 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 239000007789 gas Substances 0.000 description 1
- 238000011065 in-situ storage Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 239000002184 metal Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000001301 oxygen Substances 0.000 description 1
- 229910052760 oxygen Inorganic materials 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 239000002243 precursor Substances 0.000 description 1
- 229920006395 saturated elastomer Polymers 0.000 description 1
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Abstract
【解決手段】ゲート絶縁膜12を形成するステップは、シリコン基板11上にSiO2層21を形成する酸化膜形成ステップと、SiO2層の表面部分21aを窒化する窒化ステップと、シリコン単原子層を堆積するステップと、シリコン単原子層を窒化するステップとを順次に含み、表面部分を窒化したSiO2層21の表面にSiN層22を形成する窒化膜形成ステップとを有する。
【選択図】図3
Description
前記窒素含有ゲート絶縁膜を形成するステップが、
半導体基板上にシリコン酸化膜を形成する酸化膜形成ステップと、
前記シリコン酸化膜の表面部分を窒化する窒化ステップと、
シリコン単原子層を堆積するステップと、該シリコン単原子層を窒化するステップとを順次に含み、前記表面部分を窒化したシリコン酸化膜の表面にシリコン窒化膜を形成する窒化膜形成ステップと、
を有することを特徴とする。
第1実施形態の製造方法を用いて実施例1の半導体装置を製造した。実施例1の半導体装置の製造に際しては、ステップS11のSiO2層形成処理の回数を5回、ステップS13のSiN層形成処理の回数を20回とした。ゲート絶縁膜12中の窒素濃度プロファイルを図4に示す。SiO2層形成処理の回数に比してSiN層形成処理の回数を充分に多くしたので、SiO2層21に対するSiN層22の厚みが充分に大きくなっている。従って、ゲート絶縁膜12の誘電率が大幅に高まり、従来の半導体装置に比して消費電力を大幅に低減できる。ゲート絶縁膜12のシリコン基板11との界面付近の窒素濃度は充分に抑えられている。
第2実施形態の製造方法を用いて実施例2の半導体装置を製造した。実施例2の半導体装置の製造に際しては、ステップS11〜S13のフローを5サイクル行った。また、1サイクル目のフローで、SiO2層形成処理の回数を5回、SiN層形成処理の回数を1回とし、2サイクル目のフローからSiO2層形成処理の回数を1つずつ減らし、5サイクル目のフローで、SiO2層形成処理の回数を1回、SiN層形成処理の回数を1回とした。
第2実施形態の製造方法を用いて実施例3の半導体装置を製造した。実施例3の半導体装置の製造に際しては、ステップS11〜S13のフローを6サイクル行った。また、1サイクル目のフローで、SiO2層形成処理の回数を5回、SiN層形成処理の回数を1回とし、2〜4サイクル目のフローで、SiO2層形成処理の回数を1回、SiN層形成処理の回数を1回とし、6サイクル目のフローで、SiO2層形成処理の回数を1回、SiN層形成処理の回数を10回とした。
第3実施形態の製造方法を用いて実施例4の半導体装置を製造した。実施例4の半導体装置の製造に際しては、ステップS11〜S13のフローを1サイクル行った後、ステップS14を行った。ステップS11〜S13のフローでは、SiO2層形成処理の回数を5回、SiN層形成処理の回数を15回とした。ステップS14では、SiO2層形成処理の回数を5回とした。ゲート絶縁膜12中の窒素濃度プロファイルを図9に示す。ゲート絶縁膜12の厚み方向の中央付近の窒素濃度が高く、シリコン基板11との界面付近、及び、ゲート電極13との界面付近の窒素濃度が低くなっている。
図10は、上記実施形態の比較例1に係る半導体装置を製造する製造方法について、ゲート絶縁膜を形成する手順を示すフローチャートである。本比較例の半導体装置の製造に際しては、シリコン基板11上にCVD法を用いてSiO2膜を10nmの厚みに成膜した後(ステップS101)、形成したSiO2膜のプラズマ窒化を行い(ステップS102)、窒素を含むゲート絶縁膜12を形成する。
図13は、上記実施形態の比較例2に係る半導体装置を製造する製造方法について、ゲート絶縁膜を形成する手順を示すフローチャートである。本比較例の半導体装置の製造に際しては、図10のフローチャートにおいて、ステップS102に後続し、シリコン基板11との界面付近の不純物準位の低減を目的として、ステップS103の酸化処理を行う。
12:ゲート絶縁膜
13:ゲート電極
21:SiO2層
21a:SiO2層の表面部分
22:SiN層
Claims (8)
- 窒素含有ゲート絶縁膜を有する半導体装置の製造方法であって、
前記窒素含有ゲート絶縁膜を形成するステップが、
半導体基板上にシリコン酸化膜を形成する酸化膜形成ステップと、
前記シリコン酸化膜の表面部分を窒化する窒化ステップと、
シリコン単原子層を堆積するステップと、該シリコン単原子層を窒化するステップとを順次に含み、前記表面部分を窒化したシリコン酸化膜の表面にシリコン窒化膜を形成する窒化膜形成ステップと、
を有することを特徴とする半導体装置の製造方法。 - 前記酸化膜形成ステップは、シリコン単原子層を堆積するステップと、該シリコン単原子層を酸化するステップとを順次に含む、請求項1に記載の半導体装置の製造方法。
- 前記窒化ステップを、500℃未満の基板温度でプラズマ窒化法により行う、請求項2に記載の半導体装置の製造方法。
- 前記窒素含有ゲート絶縁膜の厚みが10nm以下である、請求項1〜3の何れか一に記載の半導体装置の製造方法。
- 前記シリコン窒化膜の主成分がSi3N4である、請求項1〜4の何れか一に記載の半導体装置の製造方法。
- 前記窒化膜形成ステップが、前記シリコン単原子層を堆積するステップと、前記シリコン単原子層を窒化するステップとを交互に複数回含む、請求項1〜5の何れか一に記載の半導体装置の製造方法。
- 前記窒素含有ゲート絶縁膜を形成するステップが、前記酸化膜形成ステップ、窒化ステップ及び窒化膜形成ステップを含む処理を繰り返し有する、請求項1〜6の何れか一に記載の半導体装置の製造方法。
- 前記窒素含有ゲート絶縁膜を形成するステップが、前記窒化膜形成ステップに後続し、前記シリコン窒化膜上にシリコン酸化膜を形成するステップを更に有する、請求項1〜6の何れか一に記載の半導体装置の製造方法。
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US20170103885A1 (en) | 2014-06-25 | 2017-04-13 | Hitachi Kokusai Electric Inc. | Method for manufacturing semiconductor device, substrate-processing apparatus, and recording medium |
US9741555B2 (en) | 2015-01-14 | 2017-08-22 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium |
KR101829281B1 (ko) * | 2011-06-29 | 2018-02-20 | 삼성전자주식회사 | 인-시츄 공정을 이용한 산화막/질화막/산화막(ono) 구조의 절연막 형성 방법 |
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US7910497B2 (en) * | 2007-07-30 | 2011-03-22 | Applied Materials, Inc. | Method of forming dielectric layers on a substrate and apparatus therefor |
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JP2002203961A (ja) | 2000-12-28 | 2002-07-19 | Sony Corp | ゲート絶縁膜の形成方法 |
JP4074774B2 (ja) | 2002-04-19 | 2008-04-09 | 独立行政法人科学技術振興機構 | 力センサ及び力検出装置並びに力検出方法 |
JP4204840B2 (ja) | 2002-10-08 | 2009-01-07 | 株式会社日立国際電気 | 基板処埋装置 |
US7144825B2 (en) * | 2003-10-16 | 2006-12-05 | Freescale Semiconductor, Inc. | Multi-layer dielectric containing diffusion barrier material |
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JP2006135229A (ja) | 2004-11-09 | 2006-05-25 | Elpida Memory Inc | 絶縁膜の成膜方法及びその絶縁膜を備えた半導体装置 |
JP2006156626A (ja) | 2004-11-29 | 2006-06-15 | Renesas Technology Corp | 不揮発性半導体記憶装置およびその製造方法 |
JP4983025B2 (ja) | 2006-01-17 | 2012-07-25 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
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KR101829281B1 (ko) * | 2011-06-29 | 2018-02-20 | 삼성전자주식회사 | 인-시츄 공정을 이용한 산화막/질화막/산화막(ono) 구조의 절연막 형성 방법 |
US20170103885A1 (en) | 2014-06-25 | 2017-04-13 | Hitachi Kokusai Electric Inc. | Method for manufacturing semiconductor device, substrate-processing apparatus, and recording medium |
US10163625B2 (en) | 2014-06-25 | 2018-12-25 | Hitachi Kokusai Electric Inc. | Method for manufacturing semiconductor device, substrate-processing apparatus, and recording medium |
US10229829B2 (en) | 2014-06-25 | 2019-03-12 | Kokusai Electric Corporation | Method for manufacturing semiconductor device, substrate-processing apparatus, and recording medium |
US10497561B2 (en) | 2014-06-25 | 2019-12-03 | Kokusai Electric Corporation | Method for manufacturing semiconductor device, substrate-processing apparatus, and recording medium |
US9741555B2 (en) | 2015-01-14 | 2017-08-22 | Hitachi Kokusai Electric Inc. | Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium |
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