|
US7124221B1
(en)
|
1999-10-19 |
2006-10-17 |
Rambus Inc. |
Low latency multi-level communication interface
|
|
US7135899B1
(en)
*
|
2003-06-27 |
2006-11-14 |
Cypress Semiconductor Corp. |
System and method for reducing skew in complementary signals that can be used to synchronously clock a double data rate output
|
|
US7792196B2
(en)
*
|
2004-12-28 |
2010-09-07 |
Intel Corporation |
Single conductor bidirectional communication link
|
|
US20070009267A1
(en)
*
|
2005-06-22 |
2007-01-11 |
Crews Darren S |
Driving a laser using an electrical link driver
|
|
US7279950B2
(en)
*
|
2005-09-27 |
2007-10-09 |
International Business Machines Corporation |
Method and system for high frequency clock signal gating
|
|
US20070086354A1
(en)
*
|
2005-10-17 |
2007-04-19 |
Erickson Bruce A |
Method and apparatus for performing a bit error rate test, and for configuring the receiving or transmitting end of a communication link
|
|
US8570881B2
(en)
*
|
2006-03-28 |
2013-10-29 |
Advanced Micro Devices, Inc. |
Transmitter voltage and receiver time margining
|
|
US7817727B2
(en)
*
|
2006-03-28 |
2010-10-19 |
GlobalFoundries, Inc. |
Hybrid output driver for high-speed communications interfaces
|
|
US7986727B2
(en)
*
|
2006-03-28 |
2011-07-26 |
Globalfoundries Inc. |
In-band method to configure equalization levels
|
|
US7822127B1
(en)
*
|
2006-05-15 |
2010-10-26 |
Super Micro Computer, Inc. |
Method and apparatus for minimizing signal loss in transit
|
|
US8565105B2
(en)
*
|
2008-09-29 |
2013-10-22 |
Broadcom Corporation |
Method and system for ethernet switching, conversion, and PHY optimization based on link length in audio/video systems
|
|
US20100115306A1
(en)
*
|
2008-11-05 |
2010-05-06 |
Wael William Diab |
Method and system for control of energy efficiency and associated policies in a physical layer device
|
|
US7738486B2
(en)
*
|
2007-02-28 |
2010-06-15 |
Finisar Corporation |
Multi-mode integrated circuit for use in optoelectronic devices
|
|
CN101669305B
(zh)
*
|
2007-02-28 |
2013-01-23 |
菲尼萨公司 |
在光电器件中使用的多模式集成电路
|
|
US8218567B2
(en)
*
|
2007-03-12 |
2012-07-10 |
Broadcom Corporation |
Method and system for reducing transceiver power via a variable signal constellation
|
|
US7962670B2
(en)
*
|
2007-06-06 |
2011-06-14 |
Lantiq Deutschland Gmbh |
Pin multiplexing
|
|
KR100915814B1
(ko)
*
|
2007-09-07 |
2009-09-07 |
주식회사 하이닉스반도체 |
반도체 메모리 장치의 데이터 출력 드라이버 제어회로
|
|
US20090097401A1
(en)
|
2007-10-12 |
2009-04-16 |
Wael William Diab |
Method and system for configurable data rate thresholds for energy efficient ethernet
|
|
US8588254B2
(en)
*
|
2007-12-17 |
2013-11-19 |
Broadcom Corporation |
Method and system for energy efficient signaling for 100mbps Ethernet using a subset technique
|
|
US8284799B2
(en)
*
|
2007-12-17 |
2012-10-09 |
Broadcom Corporation |
Method and system for supporting a variable and energy efficient data rate using a duty cycling technique and multiple power states on an Ethernet link
|
|
US8098661B2
(en)
*
|
2008-04-04 |
2012-01-17 |
Doron Handelman |
Methods and apparatus for enabling communication between network elements that operate at different bit rates
|
|
US9277487B2
(en)
*
|
2008-08-01 |
2016-03-01 |
Qualcomm Incorporated |
Cell detection with interference cancellation
|
|
US7898991B2
(en)
*
|
2008-10-16 |
2011-03-01 |
Finisar Corporation |
Serializer/deserializer test modes
|
|
US8149643B2
(en)
*
|
2008-10-23 |
2012-04-03 |
Cypress Semiconductor Corporation |
Memory device and method
|
|
US8982753B2
(en)
*
|
2008-11-05 |
2015-03-17 |
Broadcom Corporation |
Method and system for low latency state transitions for energy efficiency
|
|
US8373357B2
(en)
*
|
2009-01-26 |
2013-02-12 |
Microchip Technology Incorporated |
Modulator module in an integrated circuit device
|
|
US8358508B2
(en)
|
2009-03-19 |
2013-01-22 |
Panduit Corp. |
Active patch panel
|
|
US8230240B2
(en)
*
|
2009-04-08 |
2012-07-24 |
Broadcom Corporation |
Method and system for energy efficient networking over a serial communication channel based on forward error correction support
|
|
WO2010146699A1
(ja)
*
|
2009-06-19 |
2010-12-23 |
株式会社日立製作所 |
電子計算機、電子計算機の信号補正方法
|
|
PE20130251A1
(es)
|
2009-09-14 |
2013-03-09 |
Directv Group Inc |
Metodo y sistema para distribuir contenido
|
|
US9137485B2
(en)
|
2010-01-21 |
2015-09-15 |
Cadence Design Systems, Inc. |
Home network architecture for delivering high-speed data services
|
|
US8973062B2
(en)
*
|
2010-01-21 |
2015-03-03 |
Cadence Design Systems, Inc. |
Multimode physical layer module for supporting delivery of high-speed data services in home multimedia networks
|
|
US8594262B2
(en)
*
|
2010-06-17 |
2013-11-26 |
Transwitch Corporation |
Apparatus and method thereof for clock and data recovery of N-PAM encoded signals using a conventional 2-PAM CDR circuit
|
|
US8208578B2
(en)
*
|
2010-06-21 |
2012-06-26 |
North Carolina State University |
Systems, methods, and computer readable media for fractional pre-emphasis of multi-mode interconnect
|
|
US8452189B2
(en)
|
2011-01-19 |
2013-05-28 |
Avago Technologies General Ip (Singapore) Pte. Ltd. |
Source-multiplexed pulse amplitude modulation (PAM) optical data communication system and method
|
|
US8760188B2
(en)
*
|
2011-06-30 |
2014-06-24 |
Silicon Image, Inc. |
Configurable multi-dimensional driver and receiver
|
|
US9071243B2
(en)
|
2011-06-30 |
2015-06-30 |
Silicon Image, Inc. |
Single ended configurable multi-mode driver
|
|
US8873963B2
(en)
|
2012-07-25 |
2014-10-28 |
Doron Handelman |
Apparatus and methods for generating and receiving optical signals at substantially 100Gb/s and beyond
|
|
US8885766B2
(en)
|
2012-09-11 |
2014-11-11 |
Inphi Corporation |
Optical communication interface utilizing N-dimensional double square quadrature amplitude modulation
|
|
CN104521228B
(zh)
|
2012-09-21 |
2017-12-19 |
松下知识产权经营株式会社 |
发送装置、接收装置、传输系统以及传输方法
|
|
US8873606B2
(en)
*
|
2012-11-07 |
2014-10-28 |
Broadcom Corporation |
Transceiver including a high latency communication channel and a low latency communication channel
|
|
US8964818B2
(en)
*
|
2012-11-30 |
2015-02-24 |
Broadcom Corporation |
Use of multi-level modulation signaling for short reach data communications
|
|
US9054955B2
(en)
|
2012-12-30 |
2015-06-09 |
Doron Handelman |
Apparatus and methods for enabling recovery from failures in optical networks
|
|
CN105122688B
(zh)
*
|
2013-03-08 |
2017-06-30 |
颖飞公司 |
使用正交调幅的光学通信接口
|
|
US9049075B2
(en)
*
|
2013-08-21 |
2015-06-02 |
Avago Technologies General Ip (Singapore) Pte. Ltd. |
Adaptive modal PAM2/PAM4 in-phase (I) quadrature (Q) phase detector for a receiver
|
|
US8989300B1
(en)
|
2013-09-06 |
2015-03-24 |
Avago Technologies General Ip (Singapore) Pte. Ltd. |
Multi-level coding and distortion compensation
|
|
US9184841B2
(en)
|
2013-09-06 |
2015-11-10 |
Avago Technologies General Ip (Singapore) Pte. Ltd. |
Multi-level decoder with skew correction
|
|
US9344187B2
(en)
|
2013-09-17 |
2016-05-17 |
Doron Handelman |
Apparatus and methods for enabling recovery in optical networks
|
|
US9246598B2
(en)
*
|
2014-02-06 |
2016-01-26 |
Avago Technologies General Ip (Singapore) Pte. Ltd. |
Efficient pulse amplitude modulation integrated circuit architecture and partition
|
|
US20150256363A1
(en)
*
|
2014-03-04 |
2015-09-10 |
Lsi Corporation |
Integrated PAM4/NRZ N-Way Parallel Digital Unrolled Decision Feedback Equalizer (DFE)
|
|
TWI555404B
(zh)
*
|
2014-03-28 |
2016-10-21 |
晨星半導體股份有限公司 |
多通道串列連線信號接收系統
|
|
US9519604B2
(en)
|
2014-04-11 |
2016-12-13 |
Qualcomm Incorporated |
Systems and methods for frequency control on a bus through superposition
|
|
US9674025B2
(en)
|
2014-07-01 |
2017-06-06 |
International Business Machines Corporation |
4-level pulse amplitude modulation transmitter architectures utilizing quadrature clock phases
|
|
US9252997B1
(en)
|
2014-07-10 |
2016-02-02 |
Qualcomm Incorporated |
Data link power reduction technique using bipolar pulse amplitude modulation
|
|
US9331188B2
(en)
|
2014-09-11 |
2016-05-03 |
Avago Technologies General Ip (Singapore) Pte. Ltd. |
Short-circuit protection circuits, system, and method
|
|
US9660847B2
(en)
*
|
2014-11-26 |
2017-05-23 |
Rambus Inc. |
Equalized multi-signaling mode driver
|
|
US9621332B2
(en)
|
2015-04-13 |
2017-04-11 |
Qualcomm Incorporated |
Clock and data recovery for pulse based multi-wire link
|
|
CN106921436B
(zh)
*
|
2015-12-26 |
2019-11-05 |
华为技术有限公司 |
用于对多种速率的数据进行处理的方法及装置
|
|
US11507529B2
(en)
|
2016-03-28 |
2022-11-22 |
Marvell Asia Pte, Ltd. |
Multi-chip module with configurable multi-mode serial link interfaces
|
|
US10572416B1
(en)
|
2016-03-28 |
2020-02-25 |
Aquantia Corporation |
Efficient signaling scheme for high-speed ultra short reach interfaces
|
|
US11088876B1
(en)
|
2016-03-28 |
2021-08-10 |
Marvell Asia Pte, Ltd. |
Multi-chip module with configurable multi-mode serial link interfaces
|
|
US10778404B1
(en)
|
2016-04-01 |
2020-09-15 |
Marvell Asia Pte., LTD |
Dual-duplex link with asymmetric data rate selectivity
|
|
US9699009B1
(en)
*
|
2016-06-30 |
2017-07-04 |
International Business Machines Corporation |
Dual-mode non-return-to-zero (NRZ)/ four-level pulse amplitude modulation (PAM4) receiver with digitally enhanced NRZ sensitivity
|
|
US9954576B2
(en)
|
2016-09-23 |
2018-04-24 |
Dell Products, Lp |
System and method for PAM-4 transmitter bit equalization for improved channel performance
|
|
US9825730B1
(en)
*
|
2016-09-26 |
2017-11-21 |
Dell Products, Lp |
System and method for optimizing link performance with lanes operating at different speeds
|
|
US9935682B1
(en)
|
2016-12-22 |
2018-04-03 |
Dell Products, Lp |
System and method for PAM-4 transmitter bit equalization for improved channel performance
|
|
US10212010B2
(en)
*
|
2017-07-13 |
2019-02-19 |
Zte Corporation |
Unequally spaced pulse amplitude modulation scheme
|
|
US10277435B2
(en)
|
2017-08-07 |
2019-04-30 |
Micron Technology, Inc. |
Method to vertically align multi-level cells
|
|
US10425260B2
(en)
|
2017-08-07 |
2019-09-24 |
Micron Technology, Inc. |
Multi-level signaling in memory with wide system interface
|
|
US10403337B2
(en)
|
2017-08-07 |
2019-09-03 |
Micron Technology, Inc. |
Output driver for multi-level signaling
|
|
US10277441B2
(en)
|
2017-08-07 |
2019-04-30 |
Micron Technology, Inc. |
Uniformity between levels of a multi-level signal
|
|
US10530617B2
(en)
|
2017-08-07 |
2020-01-07 |
Micron Technology, Inc. |
Programmable channel equalization for multi-level signaling
|
|
US10447512B2
(en)
|
2017-08-07 |
2019-10-15 |
Micron Technology, Inc. |
Channel equalization for multi-level signaling
|
|
US10725913B2
(en)
|
2017-10-02 |
2020-07-28 |
Micron Technology, Inc. |
Variable modulation scheme for memory device access or operation
|
|
US10355893B2
(en)
|
2017-10-02 |
2019-07-16 |
Micron Technology, Inc. |
Multiplexing distinct signals on a single pin of a memory device
|
|
US10446198B2
(en)
|
2017-10-02 |
2019-10-15 |
Micron Technology, Inc. |
Multiple concurrent modulation schemes in a memory system
|
|
US11403241B2
(en)
*
|
2017-10-02 |
2022-08-02 |
Micron Technology, Inc. |
Communicating data with stacked memory dies
|
|
US10490245B2
(en)
|
2017-10-02 |
2019-11-26 |
Micron Technology, Inc. |
Memory system that supports dual-mode modulation
|
|
US10128842B1
(en)
*
|
2018-03-23 |
2018-11-13 |
Micron Technology, Inc. |
Output impedance calibration for signaling
|
|
US10657094B2
(en)
*
|
2018-03-29 |
2020-05-19 |
Nvidia Corp. |
Relaxed 433 encoding to reduce coupling and power noise on PAM-4 data buses
|
|
US11159153B2
(en)
|
2018-03-29 |
2021-10-26 |
Nvidia Corp. |
Data bus inversion (DBI) on pulse amplitude modulation (PAM) and reducing coupling and power noise on PAM-4 I/O
|
|
US10599606B2
(en)
|
2018-03-29 |
2020-03-24 |
Nvidia Corp. |
424 encoding schemes to reduce coupling and power noise on PAM-4 data buses
|
|
US11966348B2
(en)
|
2019-01-28 |
2024-04-23 |
Nvidia Corp. |
Reducing coupling and power noise on PAM-4 I/O interface
|
|
DE102018205264B3
(de)
*
|
2018-04-09 |
2019-10-10 |
Continental Automotive Gmbh |
Verfahren zum Betreiben eines Ethernet-Bordnetzes eines Kraftfahrzeugs, Steuereinheit und Ethernet-Bordnetz
|
|
US10623200B2
(en)
|
2018-07-20 |
2020-04-14 |
Nvidia Corp. |
Bus-invert coding with restricted hamming distance for multi-byte interfaces
|
|
US10998011B2
(en)
*
|
2018-08-21 |
2021-05-04 |
Micron Technology, Inc. |
Drive strength calibration for multi-level signaling
|
|
US11113212B2
(en)
*
|
2018-10-23 |
2021-09-07 |
Micron Technology, Inc. |
Multi-level receiver with termination-off mode
|
|
US11194726B2
(en)
*
|
2019-02-25 |
2021-12-07 |
Micron Technology, Inc. |
Stacked memory dice for combined access operations
|
|
US11609865B2
(en)
*
|
2019-04-17 |
2023-03-21 |
Micron Technology, Inc. |
Method and apparatus for signal path biasing in a memory system
|
|
US10904998B2
(en)
|
2019-05-01 |
2021-01-26 |
Dell Products, L.P. |
System and method for via optimization in a printed circuit board
|
|
US10581652B1
(en)
|
2019-05-01 |
2020-03-03 |
Dell Products, Lp |
System and method for PAM-4 transmitter bit equalization for improved channel performance beyond 32 Gbps
|
|
CN110401486B
(zh)
*
|
2019-08-07 |
2022-06-24 |
青岛海信宽带多媒体技术有限公司 |
一种光模块及光发射控制方法
|
|
KR102780227B1
(ko)
|
2020-08-11 |
2025-03-14 |
삼성전자주식회사 |
메모리 시스템, 이의 구동 방법 및 이를 이용한 스토리지 장치
|
|
KR102824213B1
(ko)
|
2020-08-21 |
2025-06-26 |
삼성전자주식회사 |
메모리 장치, 그것을 제어하는 제어기, 그것을 포함하는 메모리 시스템 및 그것의 동작 방법
|
|
KR102909764B1
(ko)
*
|
2020-10-16 |
2026-01-09 |
삼성전자주식회사 |
테스트용 멀티 레벨 신호 생성 장치 및 이를 포함하는 메모리 장치
|
|
CN114697261A
(zh)
*
|
2020-12-30 |
2022-07-01 |
华为技术有限公司 |
基带数据传输的方法和系统
|
|
US12347508B2
(en)
|
2021-02-12 |
2025-07-01 |
Nvidia Corp. |
Error detection pin encoding scheme to avoid maximum transitions and further improve signal integrity on high speed graphic memory interfaces
|
|
US11632275B2
(en)
*
|
2021-04-28 |
2023-04-18 |
Nvidia Corp. |
CMOS signaling front end for extra short reach links
|
|
US12155923B2
(en)
|
2021-07-09 |
2024-11-26 |
Semiconductor Components Industries, Llc |
Communications channel with multi-level signal transmission
|
|
US12002541B2
(en)
*
|
2021-12-08 |
2024-06-04 |
Advanced Micro Devices, Inc. |
Read clock toggle at configurable PAM levels
|
|
US12394467B2
(en)
|
2021-12-08 |
2025-08-19 |
Advanced Micro Devices, Inc. |
Read clock start and stop for synchronous memories
|
|
US12132590B2
(en)
|
2022-03-18 |
2024-10-29 |
Nvidia, Corp. |
Hardware-efficient PAM-3 encoder and decoder
|
|
US12135607B2
(en)
|
2022-03-18 |
2024-11-05 |
Nvidia Corp. |
Hardware-efficient PAM-3 encoder and decoder
|
|
KR102766773B1
(ko)
*
|
2022-06-23 |
2025-02-13 |
고려대학교산학협력단 |
패턴 기반의 클럭 및 데이터 복원 회로를 이용하는 pam-4 수신기
|
|
US12015413B2
(en)
|
2022-09-15 |
2024-06-18 |
Apple Inc. |
Coding for pulse amplitude modulation with an odd number of output levels
|