JP2007507896A5 - - Google Patents

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Publication number
JP2007507896A5
JP2007507896A5 JP2006533987A JP2006533987A JP2007507896A5 JP 2007507896 A5 JP2007507896 A5 JP 2007507896A5 JP 2006533987 A JP2006533987 A JP 2006533987A JP 2006533987 A JP2006533987 A JP 2006533987A JP 2007507896 A5 JP2007507896 A5 JP 2007507896A5
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JP
Japan
Prior art keywords
layers
lattice constant
thickness
forming
layer
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Application number
JP2006533987A
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English (en)
Japanese (ja)
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JP4901476B2 (ja
JP2007507896A (ja
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Priority claimed from US10/677,844 external-priority patent/US6831350B1/en
Application filed filed Critical
Publication of JP2007507896A publication Critical patent/JP2007507896A/ja
Publication of JP2007507896A5 publication Critical patent/JP2007507896A5/ja
Application granted granted Critical
Publication of JP4901476B2 publication Critical patent/JP4901476B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2006533987A 2003-10-02 2004-09-27 格子定数の異なる材料を用いる半導体構造及び同構造の形成方法 Expired - Fee Related JP4901476B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/677,844 US6831350B1 (en) 2003-10-02 2003-10-02 Semiconductor structure with different lattice constant materials and method for forming the same
US10/677,844 2003-10-02
PCT/US2004/031516 WO2005034230A1 (en) 2003-10-02 2004-09-27 Semiconductor structure with different lattice constant materials and method for forming the same

Publications (3)

Publication Number Publication Date
JP2007507896A JP2007507896A (ja) 2007-03-29
JP2007507896A5 true JP2007507896A5 (https=) 2007-11-15
JP4901476B2 JP4901476B2 (ja) 2012-03-21

Family

ID=33490980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006533987A Expired - Fee Related JP4901476B2 (ja) 2003-10-02 2004-09-27 格子定数の異なる材料を用いる半導体構造及び同構造の形成方法

Country Status (6)

Country Link
US (1) US6831350B1 (https=)
JP (1) JP4901476B2 (https=)
KR (1) KR101115091B1 (https=)
CN (1) CN100487876C (https=)
TW (1) TWI356491B (https=)
WO (1) WO2005034230A1 (https=)

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US9818884B2 (en) 2014-03-28 2017-11-14 Intel Corporation Strain compensation in transistors
US10170549B2 (en) 2014-10-21 2019-01-01 Samsung Electronics Co., Ltd. Strained stacked nanosheet FETs and/or quantum well stacked nanosheet
US9735010B1 (en) 2016-05-27 2017-08-15 International Business Machines Corporation Fabrication of semiconductor fin structures
US10249492B2 (en) 2016-05-27 2019-04-02 International Business Machines Corporation Fabrication of compound semiconductor structures
CN108807279B (zh) * 2018-06-25 2021-01-22 中国科学院微电子研究所 半导体结构与其制作方法
TWI698912B (zh) * 2018-09-03 2020-07-11 環球晶圓股份有限公司 磊晶基板及其製造方法
US12588258B2 (en) * 2023-08-03 2026-03-24 Taiwan Semiconductor Manufacturing Co., Ltd. Stacked transistor isolation features and methods of forming the same

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