WO2013070369A3 - Patterned layer design for group iii nitride layer growth - Google Patents

Patterned layer design for group iii nitride layer growth Download PDF

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Publication number
WO2013070369A3
WO2013070369A3 PCT/US2012/059468 US2012059468W WO2013070369A3 WO 2013070369 A3 WO2013070369 A3 WO 2013070369A3 US 2012059468 W US2012059468 W US 2012059468W WO 2013070369 A3 WO2013070369 A3 WO 2013070369A3
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WO
WIPO (PCT)
Prior art keywords
layer
group iii
iii nitride
microns
approximately
Prior art date
Application number
PCT/US2012/059468
Other languages
French (fr)
Other versions
WO2013070369A2 (en
Inventor
Rakesh Jain
Wenhong SUN
Jinwei Yang
Maxim S. Shatalov
Alexander Dobrinsky
Michael Shur
Rimigijus GASKA
Original Assignee
Sensor Electronic Technology, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US13/647,885 external-priority patent/US9397260B2/en
Application filed by Sensor Electronic Technology, Inc. filed Critical Sensor Electronic Technology, Inc.
Priority to TW101137532A priority Critical patent/TWI491072B/en
Publication of WO2013070369A2 publication Critical patent/WO2013070369A2/en
Publication of WO2013070369A3 publication Critical patent/WO2013070369A3/en

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    • H—ELECTRICITY
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    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0062—Processes for devices with an active region comprising only III-V compounds
    • H01L33/0066—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound
    • H01L33/007—Processes for devices with an active region comprising only III-V compounds with a substrate not being a III-V compound comprising nitride compounds
    • H—ELECTRICITY
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02439—Materials
    • H01L21/02455—Group 13/15 materials
    • H01L21/02458—Nitrides
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
    • H01L21/02494—Structure
    • H01L21/02496—Layer structure
    • H01L21/02505—Layer structure consisting of more than two layers
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
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    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/107—Substrate region of field-effect devices
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    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
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    • H01L29/107—Substrate region of field-effect devices
    • H01L29/1075—Substrate region of field-effect devices of field-effect transistors
    • H01L29/1079—Substrate region of field-effect devices of field-effect transistors with insulated gate
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    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/778—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • H01L29/7786—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
    • H01L29/7787—Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT with wide bandgap charge-carrier supplying layer, e.g. direct single heterostructure MODFET
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    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/12—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a stress relaxation structure, e.g. buffer layer
    • H—ELECTRICITY
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    • H01L33/02—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers

Abstract

A method of fabricating a device using a layer with a patterned surface for improving the growth of semiconductor layers, such as group III nitride-based semiconductor layers with a high concentration of aluminum, and the resulting device having such a layer with a patterned surface, are provided. The patterned surface can include a substantially flat top surface and a plurality of stress reducing regions, such as openings. The substantially flat top surface can have a root mean square roughness less than approximately 0.5 nanometers, and the stress reducing regions can have a characteristic size between approximately 0.1 microns and approximately five microns and a depth of at least 0.2 microns. A layer of group-Ill nitride material can be grown on the first layer and have a thickness at least twice the characteristic size of the stress reducing regions.
PCT/US2012/059468 2011-10-10 2012-10-10 Patterned layer design for group iii nitride layer growth WO2013070369A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW101137532A TWI491072B (en) 2011-10-10 2012-10-11 Patterned layer design for group iii nitride layer growth

Applications Claiming Priority (8)

Application Number Priority Date Filing Date Title
US201161545261P 2011-10-10 2011-10-10
US61/545,261 2011-10-10
US201161556160P 2011-11-04 2011-11-04
US61/556,160 2011-11-04
US13/647,902 2012-10-09
US13/647,885 US9397260B2 (en) 2011-10-10 2012-10-09 Patterned layer design for group III nitride layer growth
US13/647,885 2012-10-09
US13/647,902 US9105792B2 (en) 2011-10-10 2012-10-09 Patterned layer design for group III nitride layer growth

Publications (2)

Publication Number Publication Date
WO2013070369A2 WO2013070369A2 (en) 2013-05-16
WO2013070369A3 true WO2013070369A3 (en) 2013-08-08

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PCT/US2012/059468 WO2013070369A2 (en) 2011-10-10 2012-10-10 Patterned layer design for group iii nitride layer growth

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TW (1) TWI491072B (en)
WO (1) WO2013070369A2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104603959B (en) * 2013-08-21 2017-07-04 夏普株式会社 Nitride semiconductor luminescent element
US9530643B2 (en) * 2015-03-12 2016-12-27 International Business Machines Corporation Selective epitaxy using epitaxy-prevention layers
TWI577630B (en) * 2016-04-08 2017-04-11 Crystalwise Tech Inc A substrate for an ultraviolet light emitting diode, and a method for manufacturing the same

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006278477A (en) * 2005-03-28 2006-10-12 Kyocera Corp Substrate for semiconductor growth, epitaxial substrate and semiconductor device using it, and method of manufacturing epitaxial substrate
JP2008211250A (en) * 1999-03-17 2008-09-11 Mitsubishi Chemicals Corp Semiconductor base and its manufacturing method
US20100032647A1 (en) * 2008-06-06 2010-02-11 University Of South Carolina Utlraviolet light emitting devices and methods of fabrication
JP2010219269A (en) * 2009-03-17 2010-09-30 Toshiba Corp Semiconductor element, semiconductor device, semiconductor wafer, and method of growing semiconductor crystal
KR101020473B1 (en) * 2008-11-26 2011-03-08 한국광기술원 Light Emitting Device and Method For Fabricating The Same

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4651207B2 (en) * 2001-02-26 2011-03-16 京セラ株式会社 Semiconductor substrate and manufacturing method thereof

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008211250A (en) * 1999-03-17 2008-09-11 Mitsubishi Chemicals Corp Semiconductor base and its manufacturing method
JP2006278477A (en) * 2005-03-28 2006-10-12 Kyocera Corp Substrate for semiconductor growth, epitaxial substrate and semiconductor device using it, and method of manufacturing epitaxial substrate
US20100032647A1 (en) * 2008-06-06 2010-02-11 University Of South Carolina Utlraviolet light emitting devices and methods of fabrication
KR101020473B1 (en) * 2008-11-26 2011-03-08 한국광기술원 Light Emitting Device and Method For Fabricating The Same
JP2010219269A (en) * 2009-03-17 2010-09-30 Toshiba Corp Semiconductor element, semiconductor device, semiconductor wafer, and method of growing semiconductor crystal

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TW201322486A (en) 2013-06-01
TWI491072B (en) 2015-07-01
WO2013070369A2 (en) 2013-05-16

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