JP2007129228A - パワー半導体モジュールの位置決め装置及びパワー半導体モジュールの表面処理方法 - Google Patents
パワー半導体モジュールの位置決め装置及びパワー半導体モジュールの表面処理方法 Download PDFInfo
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- JP2007129228A JP2007129228A JP2006297737A JP2006297737A JP2007129228A JP 2007129228 A JP2007129228 A JP 2007129228A JP 2006297737 A JP2006297737 A JP 2006297737A JP 2006297737 A JP2006297737 A JP 2006297737A JP 2007129228 A JP2007129228 A JP 2007129228A
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- Prior art keywords
- power semiconductor
- positioning
- main surface
- semiconductor module
- molded body
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 68
- 238000000034 method Methods 0.000 title claims abstract description 21
- 238000004381 surface treatment Methods 0.000 title description 4
- 239000000463 material Substances 0.000 claims abstract description 7
- 238000000576 coating method Methods 0.000 claims abstract description 5
- 239000011248 coating agent Substances 0.000 claims abstract description 3
- 239000000758 substrate Substances 0.000 claims description 17
- 210000001331 nose Anatomy 0.000 claims description 12
- 239000005022 packaging material Substances 0.000 claims description 8
- 238000007650 screen-printing Methods 0.000 claims description 5
- 238000007639 printing Methods 0.000 claims description 3
- 239000000853 adhesive Substances 0.000 claims description 2
- 230000001070 adhesive effect Effects 0.000 claims description 2
- 238000001816 cooling Methods 0.000 description 4
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 238000009434 installation Methods 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 235000011837 pasties Nutrition 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67333—Trays for chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/02—Containers; Seals
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
【解決手段】装置としては、各穴(12)がストッパ手段(20)を有し、それにより各々のパワー半導体モジュール(40)の主面が位置決め成形体(10)の第1主面(14)に対して面平行で一直線に並んで位置決めされ、更に穴(12)が、第2主面(16)から出発し、第1主面(14)の方向で少なくとも一区画(18)において円錐形状をもって形成されていること。方法としては、パワー半導体モジュール(40)が、前記の装置内に配置されて固定されていて、適切な方法によりパワー半導体モジュール(40)の第1主面が全面的に又は部分的に材料(60)でコーティングされること。
【選択図】図2
Description
12 穴
14 第1主面
16 第2主面
18 一区画
20 ストッパ手段/ロックノーズ
22 ロック面
24 ピン
40 パワー半導体モジュール
42 ハウジング
44 端子要素
46 基板
48 ストッパエッジ
50 運搬包装材/部分ボディ
60 島状部
Claims (9)
- 互いに離間されている複数のパワー半導体モジュール(40)を受容して位置決めするための装置であって、位置決め成形体(10)を備え、この位置決め成形体(10)が、平らな第1主面(14)と、パワー半導体モジュール(40)を受容するための複数の穴(12)とを有する、前記装置において、
各穴(12)がストッパ手段(20)を有し、それにより各々のパワー半導体モジュール(40)の主面が位置決め成形体(10)の第1主面(14)に対して面平行で一直線に並んで位置決めされ、更に穴(12)が、第2主面(16)から出発し、第1主面(14)の方向で少なくとも一区画(18)において円錐形状をもって形成されていることを特徴とする装置。 - 複数のパワー半導体モジュール(40)を同時に表面処理するための方法において、これらのパワー半導体モジュール(40)が、請求項1に従う装置内に配置されて固定されていて、適切な方法によりパワー半導体モジュール(40)の第1主面が全面的に又は部分的に材料(60)でコーティングされることを特徴とする方法。
- 位置決め成形体(10)が、パワー半導体モジュール(40)が配置されている包装材の部分ボディ(50)に対して配置されていることを特徴とする、請求項1に記載の装置。
- ストッパ手段(20)が、位置決め成形体(10)の第1主面(14)を越えることなく穴(12)の内部に配置されている少なくとも2つのノーズとして形成されていて、割り当てられたパワー半導体モジュール(40)のストッパエッジ(48)に当接することを特徴とする、請求項1に記載の装置。
- パワー半導体モジュール(40)のストッパエッジ(48)が各々のパワー半導体モジュール(40)のハウジング(42)により形成され、このハウジング(42)が、一直線に並ぶ主面を形成する割り当てられた基板(46)を、少なくとも2つの縁の方向又は穴(12)の角の方向で越えていることを特徴とする、請求項4に記載の装置。
- 位置決め成形体(10)の平らな第1主面(14)と、パワー半導体モジュール(40)の各々の割り当てられた主面との間の高さ許容誤差が0.5mmよりも小さいことを特徴とする、請求項1に記載の装置。
- 位置決め成形体(10)がスクリーンプリンティング装置用の少なくとも2つの位置決め装置(24)を有することを特徴とする、請求項1に記載の装置。
- 前記のコーティングがスクリーンプリンティング又はステンシルプリンティングを用いて行なわれることを特徴とする、請求項2に記載の方法。
- 前記の材料(60)が熱伝導ペースト又は接着剤であることを特徴とする、請求項2に記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005052798.1 | 2005-11-05 | ||
DE102005052798A DE102005052798B4 (de) | 2005-11-05 | 2005-11-05 | Anordnung mit Leistungshalbleitermodulen und mit Vorrichtung zu deren Positionierung sowie Verfahren zur Oberflächenbehandlung der Leistungshalbleitermodule |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2007129228A true JP2007129228A (ja) | 2007-05-24 |
JP5007099B2 JP5007099B2 (ja) | 2012-08-22 |
Family
ID=37506911
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006297737A Active JP5007099B2 (ja) | 2005-11-05 | 2006-11-01 | パワー半導体モジュールの位置決め装置及びパワー半導体モジュールの表面処理方法 |
Country Status (8)
Country | Link |
---|---|
US (1) | US9281224B2 (ja) |
EP (1) | EP1783831B1 (ja) |
JP (1) | JP5007099B2 (ja) |
KR (1) | KR101177585B1 (ja) |
CN (1) | CN1958407B (ja) |
AT (1) | ATE479200T1 (ja) |
DE (2) | DE102005052798B4 (ja) |
ES (1) | ES2348803T3 (ja) |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7851334B2 (en) * | 2007-07-20 | 2010-12-14 | Infineon Technologies Ag | Apparatus and method for producing semiconductor modules |
WO2010036790A1 (en) * | 2008-09-25 | 2010-04-01 | Illinois Tool Works Inc. | Devices and methods for handling microelectronic assemblies |
DE102010005047B4 (de) * | 2010-01-20 | 2014-10-23 | Semikron Elektronik Gmbh & Co. Kg | Anordnung mit mindestens einem Leistungshalbleitermodul und mit einer Transportverpackung |
CN103036401B (zh) * | 2012-12-10 | 2014-12-24 | 上海空间电源研究所 | 一种基于模块化设计的电源控制器平面度保证方法 |
DE102014217496A1 (de) * | 2014-09-02 | 2016-03-03 | Robert Bosch Gmbh | Lackiertray für elektromechanische Baugruppen |
US20170162411A1 (en) * | 2015-12-03 | 2017-06-08 | Nanya Technology Corporation | Tray |
DE102020102306A1 (de) | 2020-01-30 | 2021-08-05 | Semikron Elektronik Gmbh & Co. Kg | Vorrichtung und Verfahren zum Durchdruck eines wachsartig, pastösen wärmeleitenden Materials auf eine Kühleinrichtung oder ein Leistungshalbleitermodul |
Citations (2)
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JP2005142228A (ja) * | 2003-11-04 | 2005-06-02 | Toyota Motor Corp | パワーモジュール構造 |
JP2005183582A (ja) * | 2003-12-18 | 2005-07-07 | Nec Corp | 半導体素子の放熱構造およびヒートシンク |
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US4626167A (en) * | 1984-03-22 | 1986-12-02 | Thomson Components-Mostek Corporation | Manipulation and handling of integrated circuit dice |
US4529088A (en) * | 1984-06-22 | 1985-07-16 | Paul Quong | Shipping-and-storage container for produce |
US5492223A (en) * | 1994-02-04 | 1996-02-20 | Motorola, Inc. | Interlocking and invertible semiconductor device tray and test contactor mating thereto |
DE19630173C2 (de) * | 1996-07-26 | 2001-02-08 | Semikron Elektronik Gmbh | Leistungsmodul mit Halbleiterbauelementen |
US5794783A (en) * | 1996-12-31 | 1998-08-18 | Intel Corporation | Die-level burn-in and test flipping tray |
US5791486A (en) * | 1997-01-07 | 1998-08-11 | Fluoroware, Inc. | Integrated circuit tray with self aligning pocket |
US5878890A (en) * | 1997-09-30 | 1999-03-09 | Kaneko Denki Kabushiki Kaisha | Carrier tape |
US6225205B1 (en) * | 1998-01-22 | 2001-05-01 | Ricoh Microelectronics Company, Ltd. | Method of forming bump electrodes |
US5960961A (en) * | 1998-08-03 | 1999-10-05 | Tempo G | Tab means to assure ready release of singulated wafer die or integrated circuit chips packed in adhesive backed carrier tapes |
US6887723B1 (en) * | 1998-12-04 | 2005-05-03 | Formfactor, Inc. | Method for processing an integrated circuit including placing dice into a carrier and testing |
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DE10358843B3 (de) * | 2003-12-16 | 2005-03-24 | Semikron Elektronik Gmbh | Verpackungsbehältnis für Leistungshalbleitermodule |
-
2005
- 2005-11-05 DE DE102005052798A patent/DE102005052798B4/de active Active
-
2006
- 2006-10-24 CN CN2006101365111A patent/CN1958407B/zh active Active
- 2006-10-28 AT AT06022571T patent/ATE479200T1/de active
- 2006-10-28 ES ES06022571T patent/ES2348803T3/es active Active
- 2006-10-28 EP EP06022571A patent/EP1783831B1/de active Active
- 2006-10-28 DE DE502006007724T patent/DE502006007724D1/de active Active
- 2006-11-01 JP JP2006297737A patent/JP5007099B2/ja active Active
- 2006-11-02 KR KR1020060107603A patent/KR101177585B1/ko active IP Right Grant
- 2006-11-06 US US11/593,355 patent/US9281224B2/en not_active Expired - Fee Related
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2005142228A (ja) * | 2003-11-04 | 2005-06-02 | Toyota Motor Corp | パワーモジュール構造 |
JP2005183582A (ja) * | 2003-12-18 | 2005-07-07 | Nec Corp | 半導体素子の放熱構造およびヒートシンク |
Also Published As
Publication number | Publication date |
---|---|
EP1783831A2 (de) | 2007-05-09 |
ATE479200T1 (de) | 2010-09-15 |
DE102005052798A1 (de) | 2007-05-24 |
DE502006007724D1 (de) | 2010-10-07 |
JP5007099B2 (ja) | 2012-08-22 |
EP1783831B1 (de) | 2010-08-25 |
ES2348803T3 (es) | 2010-12-14 |
KR101177585B1 (ko) | 2012-08-27 |
US20070105275A1 (en) | 2007-05-10 |
US9281224B2 (en) | 2016-03-08 |
EP1783831A3 (de) | 2008-06-11 |
CN1958407A (zh) | 2007-05-09 |
KR20070048606A (ko) | 2007-05-09 |
CN1958407B (zh) | 2010-11-17 |
DE102005052798B4 (de) | 2007-12-13 |
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