JP2007059485A - 半導体装置、基板及び半導体装置の製造方法 - Google Patents
半導体装置、基板及び半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2007059485A JP2007059485A JP2005240285A JP2005240285A JP2007059485A JP 2007059485 A JP2007059485 A JP 2007059485A JP 2005240285 A JP2005240285 A JP 2005240285A JP 2005240285 A JP2005240285 A JP 2005240285A JP 2007059485 A JP2007059485 A JP 2007059485A
- Authority
- JP
- Japan
- Prior art keywords
- layer
- solder
- alloy
- substrate
- semiconductor chip
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
- B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
- B23K35/24—Selection of soldering or welding materials proper
- B23K35/26—Selection of soldering or welding materials proper with the principal constituent melting at less than 400 degrees C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49811—Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/04026—Bonding areas specifically adapted for layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29109—Indium [In] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/29111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/291—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29144—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/325—Material
- H01L2224/32505—Material outside the bonding interface, e.g. in the bulk of the layer connector
- H01L2224/32507—Material outside the bonding interface, e.g. in the bulk of the layer connector comprising an intermetallic compound
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/834—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/83438—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/83444—Gold [Au] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/83801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/42—Wire connectors; Manufacturing methods related thereto
- H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L24/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/73—Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00013—Fully indexed content
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01004—Beryllium [Be]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01015—Phosphorus [P]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01047—Silver [Ag]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/0105—Tin [Sn]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01051—Antimony [Sb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01058—Cerium [Ce]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01082—Lead [Pb]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0132—Binary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0133—Ternary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/0134—Quaternary Alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/06—Polymers
- H01L2924/0665—Epoxy resin
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/14—Integrated circuits
- H01L2924/143—Digital devices
- H01L2924/1433—Application-specific integrated circuit [ASIC]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15788—Glasses, e.g. amorphous oxides, nitrides or fluorides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Abstract
【解決手段】 半導体チップ3が接合される接合領域2aを有する基板2と、接合領域2aに金属層10を介して接合された半導体チップ3とを備えた半導体装置であって、金属層10は、Au−Sn−Ni合金層13と、Au−Sn−Ni合金層13に重なった半田層15とを有し、Au−Sn−Ni合金層13と半田層15との界面には、凹凸が形成されていることを特徴とする半導体装置1。
【選択図】 図2
Description
しかしながら、特許文献2に記載されているように、Au−Sn合金層と半田層との界面に凹凸が形成されるように制御した場合、Au−Sn合金層表面のアンカー形状を、半田層に複雑に入り込むように成長させることが困難であり、充分なアンカー効果を得ることができないという問題があった。そのため、特許文献2に記載の構造では、半導体チップと配線基板との接合強度を充分に高めることが困難であり、熱衝撃や温度サイクル等によってクラックが発生するおそれがあった。
(1) 半導体チップと、
上記半導体チップが金属層を介して接合される接合領域を有する基板と
を備えた半導体装置であって、
上記金属層は、Au−Sn−Ni合金層と、上記Au−Sn−Ni合金層に重なった半田層とを有し、
上記Au−Sn−Ni合金層と上記半田層との界面には、凹凸が形成されていることを特徴とする半導体装置。
上記Au−Sn−Ni合金層と上記半田層との界面に形成された凹凸は、Au−Sn合金層と半田層との界面に形成された凹凸(特許文献2参照)と比較すると、起伏が激しく、上記Au−Sn−Ni合金層表面の形状は、上記半田層に複雑に入り込んだ形状を有する。また、上記Au−Sn−Ni合金は、Niを含有していて、その強度が高いので、上記Au−Sn−Ni合金層の上記半田層への噛み込みは、Au−Sn合金層の場合と比較しても強固なものである。従って、上記Au−Sn−Ni合金層と上記半田層との界面におけるアンカー効果が強く作用し、そのアンカー効果によって、半導体チップと基板との接合強度を高めることができる。その結果、熱衝撃や温度サイクル等によってクラックが発生することを確実に防止することができる。
(2) 上記(1)の半導体装置であって、
上記半田層の内部には、Au−Sn合金相が分散していることを特徴とする。
(3) 半導体チップが接合される接合領域を有する基板であって、
上記接合領域には、Ni層が形成され、上記Ni層の表面に、厚さ0.1〜2.0μmのAu層が形成されていることを特徴とする基板。
(4) 半導体チップが接合される接合領域にNi層が形成され、上記Ni層の表面に厚さ0.1〜2.0μmのAu層が形成された基板の上記Au層の表面に、Sn含有半田材を用いてSn含有半田材層を形成する形成工程と、
上記Sn含有半田材層の表面に、半導体チップを搭載する搭載工程と、
上記Sn含有半田層が溶融する温度で加熱する加熱工程と
を含むことを特徴とする半導体装置の製造方法。
図1は、本発明の一実施形態に係る半導体装置を模式的に示す断面図である。
半導体装置1が備える基板2は、ガラスエポキシ樹脂等からなるものであり、基板2の表面であって、半導体チップ3が接合される接合領域2a以外の領域には、Cu層、Ni層、Au層の順に積層された導体回路7が形成されている。なお、基板2としては、特に限定されるものではなく、エポキシ樹脂、ビスマレイミド−トリアジン樹脂(BT樹脂)、ポリエステル樹脂、ポリイミド樹脂、フェノール樹脂、これらの樹脂にガラス繊維等の補強材を含浸したもの等を挙げることができる。また、基板2の裏面には、半田バンプ4が形成されていて、導体回路7と半田バンプ4とはスルーホール8を介して電気的に接続されている。本実施形態では、予め基板2の裏面に半田バンプ4が形成されている場合について説明するが、本発明はこの例に限定されず、例えば、実装時に半田ボールや半田ペースト等を用いて直接、プリント基板に実装することとしてもよい。
金属層10は、Cu層11、Ni層12、Au−Sn−Ni合金層13、半田層15、及び、Au−Sn合金層16を有している。また、Au−Sn−Ni合金層13と半田層15との界面には凹凸が形成されていて、Au−Sn−Ni合金層13の表面が半田層15に複雑に入り込んでいる。
半田層15の構成物質は、特に限定されるものではなく、半導体装置1の製造時に用いられるSn含有半田材の組成によって定められる。なお、Sn含有半田材については、後で詳述することにする。
また、Au−Sn合金相14は、半田層15の内部において、縦方向(基板2から半導体チップ3へ向かう方向)に均一に分散していることが望ましい。Au−Sn合金相14の存在によってクラックが発生することがなく、分散強化によって半田層15自体の強度を高めることができるからである。
図3は、本発明の一実施形態に係る基板の接合領域近傍を模式的に示す部分拡大断面図である。
Au層23の厚さが0.1μm未満である場合、Au層23が薄過ぎるため、凹凸を有するAu−Sn−Ni合金層13の形成と半田層15へのAu−Sn合金相14の分散とに必要な量のAuをAu層13から供給することが困難である。
一方、Au層23の厚さが2.0μmを超える場合、Au層23が厚過ぎるため、半田溶融初期にAu層23のAuと半田の成分であるSnとによって形成されるAu−Sn合金に対して、下層のNi層12からNiを均一に拡散させることが困難である。また、Au層23が厚過ぎると、コストが増大するという問題もある。
また、Au層23の形成方法としては、特に限定されるものではなく、真空蒸着法、スパッタ法、メッキ法、印刷法等を用いることができる。
(A)まず、半導体チップ3の裏面にメッキ法等によりAu層26を形成する(図4参照)。Au層26の厚さは、特に限定されるものではない。
Sn含有半田材としては、Snを含有するものであれば、特に限定されるものではなく、例えば、Sn−Pb合金、Sn−Pb−Ag合金、Sn−Pb−Bi合金、Sn−Pb−In合金、Sn−Pb−In−Sb合金、Sn−Ag系合金、Sn−Cu系合金、Sn単体金属等の合金を含む半田ペーストや半田クリーム等の半田材を挙げることができる。
また、Sn含有半田材として、Pb系高温半田材(85質量%以上のPbを含有するPb−Sn合金の半田材)を用いることができる。このようなPb系高温半田材としては、例えば、Pb−8Sn−2Ag合金(Snを8重量%、Agを2重量%含み、残部がPb及び不可避不純物からなる合金の半田材)を挙げることができる。
図4は、搭載工程終了時の接合領域近傍を模式的に示す部分拡大断面図である。
基板2の接合領域2aには、Cu層11、Ni層12、Au層23、Sn含有半田材層25が、この順に形成され、Sn含有半田材層25には、裏面にAu層26が形成された半導体チップ3が搭載されている。
上述した処理を行うと、図2及び図4に示すように、Sn含有半田材層25に含まれるSnと、Au層23のAuとによって、Au−Sn合金が形成され、上記Au−Sn合金に対してNi層11からNiが拡散し、半田層15との界面に凹凸を有するAu−Sn−Ni合金層13が形成される。このとき、Niが存在することによって、Au−Sn−Ni合金層13のアンカー形状の成長が促進されるため、上記界面の凹凸は起伏が激しいものとなり、Au−Sn−Ni合金層13表面の形状は、半田層15に複雑に入り込んだ形状を有する。
また、Sn含有半田材層25に含まれるSnと、Au層26のAuとによって、半田層15との界面に凹凸を有するAu−Sn合金層16が形成される。さらに、Sn含有半田材層25に含まれるSnと、Au層22又はAu層26のAuとによって形成されたAu−Sn合金の一部は、Au−Sn合金相14として半田層15の内部に分散する。その結果、図2に示したような金属層10が形成され、半導体チップ3が金属層10を介して基板2に接合される。
本実施形態においては、半田層の下側(基板側)に、Au−Sn−Ni合金層が形成される場合について説明したが、本発明は、この例に限定されず、例えば、半田層の上側(半導体チップ側)に、Au−Sn−Ni合金層が形成されることとしてもよく、半田層の上側及び下側に、Au−Sn−Ni合金層が形成されることとしてもよい。
2 基板
3 半導体チップ
3a 接合領域
4 半田バンプ
5 ワイヤ
6 樹脂パッケージ部
7 導体回路
10 金属層
11 Cu層
12 Ni層
13 Au−Sn−Ni合金層
14 Au−Sn合金相
15 半田層
16 Au−Sn合金層
23、26 Au層
25 Sn含有半田材層
Claims (4)
- 半導体チップと、
前記半導体チップが金属層を介して接合される接合領域を有する基板と
を備えた半導体装置であって、
前記金属層は、Au−Sn−Ni合金層と、前記Au−Sn−Ni合金層に重なった半田層とを有し、
前記Au−Sn−Ni合金層と前記半田層との界面には、凹凸が形成されていることを特徴とする半導体装置。 - 前記半田層の内部には、Au−Sn合金相が分散している請求項1に記載の半導体装置。
- 半導体チップが接合される接合領域を有する基板であって、
前記接合領域には、Ni層が形成され、前記Ni層の表面に、厚さ0.1〜2.0μmのAu層が形成されていることを特徴とする基板。 - 半導体チップが接合される接合領域にNi層が形成され、前記Ni層の表面に厚さ0.1〜2.0μmのAu層が形成された基板の前記Au層の表面に、Sn含有半田材を用いてSn含有半田材層を形成する形成工程と、
前記Sn含有半田材層の表面に、半導体チップを搭載する搭載工程と、
前記Sn含有半田層が溶融する温度で加熱する加熱工程と
を含むことを特徴とする半導体装置の製造方法。
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005240285A JP2007059485A (ja) | 2005-08-22 | 2005-08-22 | 半導体装置、基板及び半導体装置の製造方法 |
US12/064,434 US7902681B2 (en) | 2005-08-22 | 2006-08-18 | Semiconductor device, production method for the same, and substrate |
CN2006800305037A CN101243546B (zh) | 2005-08-22 | 2006-08-18 | 半导体装置及其制造方法以及基板 |
PCT/JP2006/316240 WO2007023743A1 (ja) | 2005-08-22 | 2006-08-18 | 半導体装置およびその製造方法ならびに基板 |
KR20087004073A KR20080038167A (ko) | 2005-08-22 | 2006-08-18 | 반도체 장치 및 그 제조 방법 및 기판 |
TW095130854A TW200717668A (en) | 2005-08-22 | 2006-08-22 | Semiconductor device, method for manufacturing such semiconductor device and substrate for such semiconductor device |
US12/929,425 US8368234B2 (en) | 2005-08-22 | 2011-01-24 | Semiconductor device, production method for the same, and substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2005240285A JP2007059485A (ja) | 2005-08-22 | 2005-08-22 | 半導体装置、基板及び半導体装置の製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2007059485A true JP2007059485A (ja) | 2007-03-08 |
Family
ID=37771491
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2005240285A Pending JP2007059485A (ja) | 2005-08-22 | 2005-08-22 | 半導体装置、基板及び半導体装置の製造方法 |
Country Status (6)
Country | Link |
---|---|
US (2) | US7902681B2 (ja) |
JP (1) | JP2007059485A (ja) |
KR (1) | KR20080038167A (ja) |
CN (1) | CN101243546B (ja) |
TW (1) | TW200717668A (ja) |
WO (1) | WO2007023743A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012060054A1 (ja) * | 2010-11-04 | 2012-05-10 | オンセミコンダクター・トレーディング・リミテッド | 回路装置およびその製造方法 |
Families Citing this family (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7888781B2 (en) * | 2008-08-27 | 2011-02-15 | Fairchild Semiconductor Corporation | Micro-layered lead frame semiconductor packages |
JP2010103206A (ja) * | 2008-10-22 | 2010-05-06 | Panasonic Corp | 半導体装置及びその製造方法 |
US8097944B2 (en) * | 2009-04-30 | 2012-01-17 | Infineon Technologies Ag | Semiconductor device |
EP2940720B1 (en) * | 2012-12-25 | 2021-04-14 | Mitsubishi Materials Corporation | Power module |
JP7221579B2 (ja) * | 2016-03-22 | 2023-02-14 | 富士電機株式会社 | 樹脂組成物 |
US11491269B2 (en) | 2020-01-21 | 2022-11-08 | Fresenius Medical Care Holdings, Inc. | Arterial chambers for hemodialysis and related systems and tubing sets |
JP7348890B2 (ja) * | 2020-10-30 | 2023-09-21 | 太陽誘電株式会社 | セラミック電子部品およびその製造方法 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003258150A (ja) * | 2002-03-01 | 2003-09-12 | Hitachi Ltd | 絶縁型半導体装置 |
JP2005093782A (ja) * | 2003-09-18 | 2005-04-07 | Dowa Mining Co Ltd | 回路基板材料、パワーモジュール、および回路基板材料の製造方法 |
JP2005217099A (ja) * | 2004-01-29 | 2005-08-11 | Kyocera Corp | 多数個取り配線基板 |
Family Cites Families (23)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE3408630A1 (de) * | 1984-03-09 | 1985-09-12 | Hoechst Ag, 6230 Frankfurt | Verfahren und schichtmaterial zur herstellung durchkontaktierter elektrischer leiterplatten |
US5302492A (en) * | 1989-06-16 | 1994-04-12 | Hewlett-Packard Company | Method of manufacturing printing circuit boards |
US5616520A (en) * | 1992-03-30 | 1997-04-01 | Hitachi, Ltd. | Semiconductor integrated circuit device and fabrication method thereof |
US5311404A (en) * | 1992-06-30 | 1994-05-10 | Hughes Aircraft Company | Electrical interconnection substrate with both wire bond and solder contacts |
JPH06283844A (ja) | 1993-03-26 | 1994-10-07 | Nec Corp | 絶縁回路基板 |
JP3271475B2 (ja) | 1994-08-01 | 2002-04-02 | 株式会社デンソー | 電気素子の接合材料および接合方法 |
JPH09232465A (ja) * | 1996-02-27 | 1997-09-05 | Fuji Kiko Denshi Kk | 半導体実装用プリント配線板 |
KR100376253B1 (ko) * | 1997-06-04 | 2003-03-15 | 이비덴 가부시키가이샤 | 인쇄 배선판용 솔더 부재 |
JP3889856B2 (ja) * | 1997-06-30 | 2007-03-07 | 松下電器産業株式会社 | 突起電極付きプリント配線基板の製造方法 |
USRE41242E1 (en) * | 1997-10-17 | 2010-04-20 | Ibiden Co., Ltd. | Package substrate |
US7007378B2 (en) * | 1999-06-24 | 2006-03-07 | International Business Machines Corporation | Process for manufacturing a printed wiring board |
TW512653B (en) * | 1999-11-26 | 2002-12-01 | Ibiden Co Ltd | Multilayer circuit board and semiconductor device |
JP2001351266A (ja) * | 2000-04-06 | 2001-12-21 | Fujitsu Ltd | 光ピックアップ及び光記憶装置 |
US6485843B1 (en) * | 2000-09-29 | 2002-11-26 | Altera Corporation | Apparatus and method for mounting BGA devices |
JP4245924B2 (ja) * | 2001-03-27 | 2009-04-02 | 株式会社Neomaxマテリアル | 電子部品用パッケージおよびその製造方法 |
JP4248761B2 (ja) * | 2001-04-27 | 2009-04-02 | 新光電気工業株式会社 | 半導体パッケージ及びその製造方法並びに半導体装置 |
EP1915040A3 (en) * | 2001-09-28 | 2008-04-30 | Ibiden Co., Ltd. | Printed wiring board and printed wiring board manufacturing method |
JP2004022608A (ja) | 2002-06-12 | 2004-01-22 | Sony Corp | 半田接合構造 |
US20050161814A1 (en) * | 2002-12-27 | 2005-07-28 | Fujitsu Limited | Method for forming bumps, semiconductor device and method for manufacturing same, substrate processing apparatus, and semiconductor manufacturing apparatus |
JP4115859B2 (ja) * | 2003-02-28 | 2008-07-09 | 株式会社日立製作所 | 陽極接合方法および電子装置 |
TWI263704B (en) * | 2003-03-18 | 2006-10-11 | Ngk Spark Plug Co | Wiring board |
JP2006287034A (ja) * | 2005-04-01 | 2006-10-19 | Shinko Electric Ind Co Ltd | 電解めっきを利用した配線基板の製造方法 |
US7910156B2 (en) * | 2007-03-30 | 2011-03-22 | Endicott Interconnect Technologies, Inc. | Method of making circuitized substrate with selected conductors having solder thereon |
-
2005
- 2005-08-22 JP JP2005240285A patent/JP2007059485A/ja active Pending
-
2006
- 2006-08-18 KR KR20087004073A patent/KR20080038167A/ko not_active Application Discontinuation
- 2006-08-18 CN CN2006800305037A patent/CN101243546B/zh active Active
- 2006-08-18 WO PCT/JP2006/316240 patent/WO2007023743A1/ja active Application Filing
- 2006-08-18 US US12/064,434 patent/US7902681B2/en active Active
- 2006-08-22 TW TW095130854A patent/TW200717668A/zh unknown
-
2011
- 2011-01-24 US US12/929,425 patent/US8368234B2/en active Active
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003258150A (ja) * | 2002-03-01 | 2003-09-12 | Hitachi Ltd | 絶縁型半導体装置 |
JP2005093782A (ja) * | 2003-09-18 | 2005-04-07 | Dowa Mining Co Ltd | 回路基板材料、パワーモジュール、および回路基板材料の製造方法 |
JP2005217099A (ja) * | 2004-01-29 | 2005-08-11 | Kyocera Corp | 多数個取り配線基板 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2012060054A1 (ja) * | 2010-11-04 | 2012-05-10 | オンセミコンダクター・トレーディング・リミテッド | 回路装置およびその製造方法 |
JP2012099688A (ja) * | 2010-11-04 | 2012-05-24 | On Semiconductor Trading Ltd | 回路装置およびその製造方法 |
US9572294B2 (en) | 2010-11-04 | 2017-02-14 | Semiconductor Components Industries, Llc | Circuit device and method for manufacturing same |
Also Published As
Publication number | Publication date |
---|---|
CN101243546B (zh) | 2011-07-06 |
US8368234B2 (en) | 2013-02-05 |
CN101243546A (zh) | 2008-08-13 |
US7902681B2 (en) | 2011-03-08 |
US20100013095A1 (en) | 2010-01-21 |
WO2007023743A1 (ja) | 2007-03-01 |
KR20080038167A (ko) | 2008-05-02 |
TW200717668A (en) | 2007-05-01 |
US20110115089A1 (en) | 2011-05-19 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4788119B2 (ja) | 電子機器および半導体装置および半導体モジュール | |
JP3757881B2 (ja) | はんだ | |
KR100790978B1 (ko) | 저온에서의 접합 방법, 및 이를 이용한 반도체 패키지 실장 방법 | |
US7352055B2 (en) | Semiconductor package with controlled solder bump wetting | |
US20030067057A1 (en) | Lead frame and flip chip semiconductor package with the same | |
JP2007287712A (ja) | 半導体装置、半導体装置の実装構造、及びそれらの製造方法 | |
JP3866503B2 (ja) | 半導体装置 | |
US8368234B2 (en) | Semiconductor device, production method for the same, and substrate | |
KR19980054344A (ko) | 표면 실장형 반도체 패키지 및 그 제조 방법 | |
US20060097398A1 (en) | Method and structure to reduce risk of gold embrittlement in solder joints | |
JP4096992B2 (ja) | 半導体モジュールの製造方法 | |
JP5578326B2 (ja) | リード部品及びその製造方法、並びに半導体パッケージ | |
JP2008109059A (ja) | 電子部品の基板への搭載方法及びはんだ面の形成方法 | |
US20090127706A1 (en) | Chip structure, substrate structure, chip package structure and process thereof | |
JP2010003878A (ja) | 回路基板及びその製造方法 | |
US20100144136A1 (en) | Semiconductor device with solder balls having high reliability | |
JP2006351950A (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2001060760A (ja) | 回路電極およびその形成方法 | |
JP4366838B2 (ja) | 電子回路モジュールの製造方法 | |
US11239190B2 (en) | Solder-metal-solder stack for electronic interconnect | |
JP4940662B2 (ja) | はんだバンプ、はんだバンプの形成方法及び半導体装置 | |
JP2004079891A (ja) | 配線基板、及び、配線基板の製造方法 | |
JP2017107955A (ja) | 電子装置及び電子装置の製造方法 | |
JPH11307585A (ja) | 半導体装置 | |
JP2001094004A (ja) | 半導体装置、外部接続端子構造体及び半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20070831 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20071004 |
|
RD02 | Notification of acceptance of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7422 Effective date: 20071004 |
|
RD04 | Notification of resignation of power of attorney |
Free format text: JAPANESE INTERMEDIATE CODE: A7424 Effective date: 20071121 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20080819 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20110602 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20110729 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20120412 |