CN101243546A - 半导体装置及其制造方法以及基板 - Google Patents

半导体装置及其制造方法以及基板 Download PDF

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Publication number
CN101243546A
CN101243546A CNA2006800305037A CN200680030503A CN101243546A CN 101243546 A CN101243546 A CN 101243546A CN A2006800305037 A CNA2006800305037 A CN A2006800305037A CN 200680030503 A CN200680030503 A CN 200680030503A CN 101243546 A CN101243546 A CN 101243546A
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layer
alloy
solder
substrate
semiconductor device
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CN101243546B (zh
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芳我基治
糟谷泰正
松原弘招
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Rohm Co Ltd
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Rohm Co Ltd
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    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K35/00—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting
    • B23K35/22—Rods, electrodes, materials, or media, for use in soldering, welding, or cutting characterised by the composition or nature of the material
    • B23K35/24—Selection of soldering or welding materials proper
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Abstract

本发明提供一种能够充分提高半导体芯片与基板之间的接合强度，且可确实防止由于热冲击或温度循环等造成断裂的发生的半导体装置。半导体装置具备半导体芯片、和具有该半导体芯片经由金属层接合的接合区域的基板。金属层具有Au－Sn－Ni合金层、和重叠于Au－Sn－Ni合金层的焊料层。Au－Sn－Ni合金层和焊料层的界面形成有凹凸。

Description

半导体装置及其制造方法以及基板
技术领域
本发明涉及一种半导体装置及其制造方法、以及应用于该半导体装置的基板。
背景技术
迄今为止，存在有在表面形成有Au层的配线基板上钎焊焊接LSI芯片等的半导体芯片，且通过树脂密封上述半导体芯片而形成的半导体装置。配线基板表面的Au层是以确保焊料湿润性或防止布线的氧化等为目的，通过电镀或溅射等形成的。但是，若在这样的配线基板上钎焊焊接半导体芯片，则Au层的Au与作为焊料的成分的Sn在两者的界面附近形成Au-Sn合金层，从而降低半导体芯片和配线基板之间的接合强度。因此，存在由于热冲击或温度循环等造成以Au-Sn合金层为起点发生裂纹的问题。
为了解决上述问题，提出有将Au层变的非常薄，从而防止Au-Sn合金层的形成的方案(例如，参照专利文献1)。但是，即使将Au层变薄，只要存在Au层与焊料的接触部位，就不能完全防止Au-Sn合金层的形成，而在局部形成Au-Sn合金层。因此，不能充分防止半导体芯片与配线基板之间的接合强度的降低。另外，若将Au层变薄，则焊料湿润性降低，结果导致空隙的产生，在钎焊焊接半导体芯片时自对准(self alignment)不能良好作用之类的问题出现。
因此，提出有在Au-Sn合金层和焊料层的界面形成凹凸，利用锚固(anchor)效果，实现半导体芯片和配线基板之间的接合强度的提高(例如，参照专利文献2)。在上述提案的结构中，确保了Au层的厚度，因此不会出现产生空隙，且在钎焊焊接半岛体芯片时自对准不会难以起作用。
专利文献1：特开平6-283844号公报
专利文献2：特开2004-22608号公报
锚固效果在Au-Sn合金层与焊料层的界面的起伏越激烈、且Au-Sn合金层越复杂进入焊料层，越起到良好的作用。但是，在Au与Sn的合金化中，难以形成将Au-Sn合金层表面的形状复杂地进入焊料层。因此，不能获得充分的锚固效果，半导体芯片和配线基板之间的接合强度不能提高到足以防止由于热冲击或温度循环等造成裂纹的产生的强度。
发明内容
本发明的目的在于提供一种半导体芯片和基板之间的接合强度高、且能够确实地防止由于热冲击或温度循环等造成裂纹的发生的半导体装置及其制造方法、以及用于该半导体装置的基板。
本发明的半导体装置是具备半导体芯片、和具有所述半导体芯片经由金属层而接合的接合区域的基板的半导体装置。上述金属层具有Au-Sn-Ni合金层、和重叠于上述Au-Sn-Ni合金层的焊料层。在上述Au-Sn-Ni合金层和上述焊料层之间的界面形成有凹凸。
上述Au-Sn-Ni合金层与上述焊料层的界面形成的凹凸与Au-Sn合金层与焊料层的界面形成的凹凸(参照专利文献2)相比，起伏更激烈。而且，上述Au-Sn-Ni合金层表面的形状具有复杂进入上述焊料层的形状。另外，上述Au-Sn-Ni合金含有Ni，其强度高，所以上述Au-Sn-Ni合金层嵌入到上述焊料层，与Au-Sn合金层的情况相比更坚固。因此，上述Au-Sn-Ni合金层和上述焊料层的界面处的锚固效果作用变强，通过该锚固效果，能够提高半导体芯片与基板之间的接合强度。最终能够确实防止由于热冲击或温度循环等造成断裂的发生。
在上述Au-Sn-Ni合金层和上述焊料层的界面形成有比在Au-Sn合金和焊料层界面形成的凹凸的起伏更激烈的凹凸，其原因在于，在形成上述金属层时，由于Ni的存在，促进了上述Au-Sn-Ni合金层的锚固形状的成长。
在上述焊料层的内部优选分散有Au-Sn合金相。在焊料层的内部分散了Au-Sn合金相的构成，提高了焊料层本身的强度，因此可使Au-Sn-Ni合金层与焊料层的界面处的锚固效果的作用更强，通过该锚固效果，能够进一步提高半导体芯片和基板之间的接合强度。
通过在焊料层的内部分散Au-Sn合金相，可提高焊料层本身的强度，其理由如下所述：若在焊料层的内部(例如，焊料层的表面附近)Au-Sn合金相不均匀，则出现由于热冲击或温度循环等造成以上述Au-Sn合金为起点的断裂的发生的情况，但若在焊料层的内部分散Au-Sn合金相时，则不会发生以Au-Sn合金相为起点的断裂，进一步通过分散强化，能够提高焊料层的强度。
另外，本发明的基板是具有接合半导体芯片的接合区域的基板，在上述接合区域形成Ni层，且在上述Ni层的表面形成有厚度为0.1～2.0μm的Au层。
根据上述构成，上述Au层的厚度在0.1μm以上，则具有对于形成具有凹凸的Au-Sn-Ni合金层和Au-Sn合金相分散到焊料层中所必需量的Au。另外，上述Au层厚度在2.0μm以下，厚度不太厚，因此在焊料熔融初期，能够将来自下层Ni层的Ni均匀地扩散到由Au层的Au以及焊料的成分Sn形成的Au-Sn合金中。因此，若使用该基板，则可与焊料层的界面形成具有凹凸的Au-Sn-Ni合金层，并且可使Au-Sn合金相分散到焊料层中。因此，半导体芯片与基板之间的接合强度提高，且能够制得确实防止由于热冲击、温度循环等造成断裂的发生的半导体装置。
本发明的半导体装置的制造方法，包括：形成工序，其在接合半导体芯片的接合区域形成Ni层且在所述Ni层的表面上形成有厚度0.1～2.0μm的Au层的基板的所述Au层的表面上使用含Sn焊料形成含Sn焊料材料层；搭载工序，其在所述含Sn焊料材料层的表面搭载半导体芯片；加热工序，其以所述含Sn焊料材料层熔融的温度进行加热。
根据上述制造方法，可与焊料层的界面形成具有凹凸的Au-Sn-Ni合金层，并且可使Au-Sn合金相分散到焊料层中。因此，可以制得半导体芯片与基板之间的接合强度高、且能够确实防止由于热冲击或温度循环等造成断裂的发生的半导体装置。
对本发明的上述的或下述的进一步的其它目的、特征以及效果，参照附图，通过以下所述的实施方式进行明确说明。
附图说明
图1是表示本发明的一个实施方式的半导体装置的剖面图。
图2是示意地表示图1所示的半导体装置的接合区域附近的局部放大剖面图。
图3是示意地表示本发明的一实施方式的基板的接合区域附近的局部放大剖面图。
图4是示意地表示搭载工序结束时的接合区域附近的局部放大剖面图。
最佳实施方式
图1是表示本发明的一实施方式的半导体装置的剖面图。半导体装置1具有由玻璃纤维强化树脂构成的基板2。该基板2的表面中，在除接合半导体芯片3的接合区域2a之外的区域处，形成有具有按照Cu层、Ni层、Au层的顺序层叠的构造的导体回路7。
作为玻璃纤维强化树脂，没有特别的限定，可以举出环氧树脂、双马来酰亚胺三嗪树脂(BT树脂)、聚酯树脂、聚酰亚胺树脂、酚醛树脂、在上述树脂中浸渗玻璃纤维等的加固材料后的树脂等。
在基板2背面形成有焊料凸起4。导体回路7与焊料凸起4经由通孔(through hole)8电连接。本实施方式中虽然对在基板2的背面形成有焊料凸起4的情况进行说明，但是，例如，也可省略焊料凸起4，而使用焊料球或焊料膏，将半导体装置1安装在印刷电路板上。
半导体芯片3经由金属层10接合于接合区域2a。关于金属层10后面会详细说明。作为半导体芯片3，可使用各种各样的半导体芯片，其具体的功能或内部的回路结构没有特别的限定。半导体芯片3的上面具有电极(未图示)。该电极和导体回路7利用金属线6电连接。
半导体装置1具有密封半导体芯片3的树脂封装部6。含有焊料凸起4的基板2的背面侧从树脂封装部6露出。树脂封装部6例如由含有环氧树脂等的树脂组合物构成。
图2是示意地表示图1所示的半导体装置的接合区域附近的局部放大剖面图。金属层10具有Cu层11、Ni层12、Au-Sn-Ni合金层13、焊料层15以及Au-Sn合金层16。
Au-Sn-Ni合金层13和焊料层15的界面形成有凹凸。Au-Sn-Ni合金层13的表面复杂进入焊料层15中。
在Au-Sn-Ni合金层13和焊料层15的界面上形成的凹凸的形状虽然没有特别的限定，但是优选由具有多样的高度以及深度的多个峰以及谷构成的不规则的非直线状图案，Au-Sn-Ni合金层更优选呈楔状或绒毛状进入到焊料层侧的形状。越是错综复杂的形状，锚固效果的作用越强，通过该锚固效果，可提高半导体芯片3和基板2的接合强度。
另外，在Au-Sn合金层16和焊料层15的界面上形成有凹凸。Au-Sn合金层16的表面复杂进入到焊料层15中。为了让锚固效果的作用更强，在Au-Sn合金层16和焊料层15的界面上形成的凹凸形状，优选由具有多样高度以及深度的多个峰以及谷构成的不规则的非直线图形，Au-Sn合金层更优选呈楔状或绒毛状进入到焊料层的形状。
焊料层15的内部分散有Au-Sn合金相14。对于焊料层15的构成物质没有特别的限定，由在半导体装置1的制造时使用的含Sn焊料材料的组成决定。关于含Sn焊料材料后面将详细叙述。Au-Sn合金相14优选在焊料层15的内部，在纵向(从基板2朝向半导体芯片3的方向)上均匀分散。通过分散Au-Sn合金相14，可有效防止裂纹的发生，通过该分散强化，可提高焊料层15本身的强度。
在本实施方式的半导体装置1中，接合基板2和半导体芯片3的金属层10具有Au-Sn-Ni合金层13和焊料层15，在两者的界面形成有凹凸。因此，可使Au-Sn-Ni合金层13和焊料层15的界面的锚固效果作用增强，通过该锚固效果，可提高半导体芯片3和基板2之间的连接强度。另外，焊料层15内部分散有Au-Sn合金相14，利用分散强化，焊料层15本身的强度变大，因此，Au-Sn-Ni合金层13和焊料层15的界面中的锚固效果作用进一步增强。因此，通过该锚固效果，可进一步提高半导体芯片3和基板2的连接强度。其结果，能够确实防止由于热冲击或温度循环等造成裂纹的发生。
接着，参照图1以及图3，对本发明的基板2进行说明。
图3是示意地表示本发明的一实施方式的基板的接合区域附近的局部放大剖面图。
首先，对基板2的整体进行说明。对于基板2的表面，如参照图1所述，在接合区域2a之外的区域形成有导体回路7。另外，在基板2的背面形成有焊料凸起4。导体回路7和焊料凸起4经由通孔8电连接。
其次，如图3所示，在基板2的接合区域2a处，从基板2侧开始，顺次形成有Cu层11、Ni层12、Au层23。
对于Cu层11的厚度没有特别的限定，可适宜设定。对于Cu层而言，例如，可形成与导体回路7的Cu层的厚度相同，并与该Cu层同时形成。作为Cu层11的形成方法，没有特别的限定，可使用真空蒸镀法、溅射法、电镀法、印刷法等。另外，也可通过在基板的表面形成Cu薄膜，且选择性的蚀刻该Cu薄膜，形成Cu层11。
对于Ni层12的厚度没有特别的限定，可适宜设定。另外，作为Ni层12的形成方法，没有特别的限定，可使用真空蒸镀法、溅射法、电镀法、印刷法等。
Au层23的厚度为0.1～2.0μm。这样，可在与焊料层15的界面处形成具有凹凸的Au-Sn-Ni合金层13，并且也可让Au-Sn合金相14分散于焊料层15。当Au层23的厚度不足0.1μm时，因为Au层23过薄，所以难以形成具有凹凸的Au-Sn-Ni合金层13以及从Au层13供给向焊料层15分散的Au-Sn合金相14所需量的Au。另一方面，当Au层23的厚度超过2.0μm时，因为Au层23过厚，所以在焊料熔融初期，很难使来自下层的Ni层12的Ni均匀扩散到由Au层23的Au和作为焊料的成分的Sn形成的Au-Sn合金中。另外，若Au层23过厚，也存在成本提高的问题。
另外，对于Au层23的厚度而言，从促进形成具有凹凸的Au-Sn-Ni合金层13以及Au-Sn合金相14分散到焊料层15的观点出发，Au层23的厚度的优选下限值为0.5μm，其优选上限值1.0μm。另外，作为Au层23的形成方法，没有特别的限定，可使用真空蒸镀法、溅射法、电镀法、印刷法等。
就本实施方式的基板2而言，Au层23的厚度为0.1～2.0μm，且Au层23含有形成具有凹凸的Au-Sn-Ni合金层13以及Au-Sn合金相14分散到焊料层15所必需量的Au，且具有能够使来自Ni层12的Ni均匀地扩散到Au-Sn合金中的厚度。因此，若使用该基板2，则在与焊料层15的界面处可形成具有凹凸的Au-Sn-Ni合金层13，同时，可使Au-Sn合金相14分散到焊料层15中。因此，能够制得半导体芯片3和基板2接合强度高、且能够确实防止由于热冲击或温度循环等造成断裂的发生的半导体装置。
接着，关于本发明的半导体装置的制造方法，参照图1～图4进行说明。
(A)首先，在半导体芯片3的背面通过电镀法等形成Au层26(参照图4)。Au层26的厚度没有特别的限定。
(B)接下来，作为形成工序，在基板2的Au层23的表面使用含Sn焊料材料形成含Sn焊料材料层25。作为含Sn焊料材料，只要是含有Sn的焊料材料即可，没有特别的限定，例如，可以举出包含Sn-Pb合金、Sn-Pb-Ag合金、Sn-Pb-Bi合金、Sn-Pb-In合金、Sn-Pb-In-Sb合金、Sn-Ag类合金、Sn-Au类合金、和Sn单体金属等合金的焊料膏剂或膏状焊料等的焊料材料。另外，作为含Sn的焊料材，可使用Pb类高温焊料材料(含有85质量％以上的Pb的Pb-Sn合金的焊料材料)。作为上述的Pb类高温焊料材，例如，可以举出Pb-8Sn-2Ag合金(由含有8重量％的Sn、2重量％的Ag，剩余为Pb以及不可避免的杂质构成的合金的焊料材料)。
(C)接下来，作为搭载工序，在含Sn焊料材料层25的上面搭载在上述(A)工序中背面形成了Au层26的半导体芯片3。图4是示意地表示该搭载工序结束时接合区域附近的局部放大剖面图。在基板2的接合区域2a处，从基板2侧开始，顺次形成有Cu层11、Ni层12、Au层23、含Sn焊料材料层25。在含Sn焊料材料层25上，搭载有背面形成了Au层26的半导体芯片3。
(D)接下来，作为加热工序，在含Sn焊料层25熔融的温度下，加热搭载了半导体芯片3的基板2。含Sn焊料层25熔融的温度(熔融温度)约为260℃以上，优选约295℃以上。另外，上述加热工序的回流(reflow)时间为10～60秒。通过上述加热，如图2以及图4所示，由在含Sn焊料材层25中所含的Sn和Au层23的Au形成Au-Sn合金，且来自Ni层11的Ni扩散到上述Au-Sn合金中，从而在与焊料层15的界面处形成有具有凹凸的Au-Sn-Ni合金层13。此时，由于Ni的存在，促进了Au-Sn-Ni合金层13的锚固形状的成长，因此上述界面的凹凸起伏变得更激烈，且Au-Sn-Ni合金层13表面的形状具有复杂进入焊料层15的形状。另外，由含Sn焊料材料层25中所含的Sn和Au层26的Au在与焊料层15的界面形成具有凹凸的Au-Sn合金层16。进一步，由含Sn焊料材料层25中所含的Sn以及Au层22或Au层26中的Au形成的Au-Sn合金的一部分，作为Au-Sn合金相14，分散到焊料层15的内部。最终形成了如图2所示的金属层10，且半导体芯片3通过金属层10与基板2接合。
接着，如图1所示，将在半导体芯片3的上面形成的电极和导体回路7使用引线6进行引线接合。然后，通过由含有环氧树脂等的树脂组合物形成树脂封装部6，由此可获得半导体装置1。
根据本发明的半导体装置的制造方法，在与焊料层15的界面处可形成具有凹凸的Au-Sn-Ni合金层13，并且可让Au-Sn合金相14分散到焊料层15中。因此，能够制得半导体芯片3和基板2之间的接合强度高、且能够确实防止由于热冲击或温度循环等造成断裂的发生的半导体装置。
以上虽然对本发明的实施方式进行说明，但是，本发明并不限定于上述的实施方式。在本实施方式中，虽然对在焊料层的下侧(基板侧)形成有Au-Sn-Ni合金层的情况进行了说明，但是，例如，也可在焊料层的上侧(半导体芯片侧)形成Au-Sn-Ni合金层。另外，也可在焊料层的上侧以及下侧都形成Au-Sn-Ni合金层。
在本实施方式中，虽然对在焊料层的内部分散有Au-Sn合金相的情况进行了说明，但也未必一定要在焊料层的内部分散Au-Sn合金相。
在本实施方式中，虽然对基板是由1层构成的基板的情况进行了说明，但是，基板也可以是由多个板状体层叠而成的基板。另外，作为基板，也可使用引线框。
作为在形成树脂封装部时所使用的树脂，没有特别的限定，例如，可以举出含有作为树脂主成分的热硬化性的环氧树脂、和作为硬化剂成分的酚醛树脂以及无机填充剂的树脂组合物等。另外，作为上述树脂主成分，例如，也可用PPS(聚苯硫醚)树脂、PPE(聚苯醚)树脂等耐热性的热可塑性树脂来代替环氧树脂。另外，作为上述无机充填剂，没有特别的限定，例如，可以举出石英玻璃、结晶性二氧化硅、熔融二氧化硅等。
在本实施方式中，对半导体装置的封装方式是BGA(Ball Grid Array)的情况进行了说明。但是，作为封装方式并不限定与此，例如，可以举出LGA(Land Grid Array)、QFP(Quad Flat Package)、QFN(Quad FlatNon-Leaded Package)、QFJ(Quad Flat J Leaded Package)、SOP(SmallOut-Line Package)、SOJ(Small Out-Line J Leaded Package)、DIP(DualIn-Line Package)、SIP(Single In-Line Package)等。
之外，可在专利要求范围所述的事项的范围内，对各种设计实施变更。换言之，所述的实施方式，只不过是为了使本发明的技术内容清楚而应用的具体实例，本发明不应限定于上述的具体实例进行解释，本发明的精神以及范围只限定于所附的权利要求范围。
本申请与2005年8月22日在日本专利局提出的专利申请号为2005-240285号相对应，该申请的全部内容可通过引用编入本申请。

Claims (4)

1.一种半导体装置，其具备：
半导体芯片；
基板，其具有经由金属层接合所述半导体的接合区域，
所述半导体装置的特征在于，
所述金属层具有Au-Sn-Ni合金层和重叠于所述Au-Sn-Ni合金层的焊料层，且
在所述Au-Sn-Ni合金层与所述焊料层的界面上形成凹凸。
2.根据权利要求1所述的半导体装置，其特征在于，
在所述焊料层的内部分散有Au-Sn合金相。
3.一种基板，其具有接合半导体芯片的接合区域，其特征在于，
在所述接合区域形成Ni层并在所述Ni层的表面形成有厚度0.1～2.0μm的Au层。
4.一种半导体装置的制造方法，其特征在于，包括：
形成工序，其在接合半导体芯片的接合区域形成Ni层且在所述Ni层的表面上形成有厚度0.1～2.0μm的Au层的基板的所述Au层的表面上使用含Sn焊料材料形成含Sn焊料材料层；
搭载工序，其在所述含Sn焊料材料层的表面搭载半导体芯片；
加热工序，其以所述含Sn焊料材料层熔融的温度进行加热。
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