CN103201829A - 电路装置及其制造方法 - Google Patents

电路装置及其制造方法 Download PDF

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Publication number
CN103201829A
CN103201829A CN2011800530727A CN201180053072A CN103201829A CN 103201829 A CN103201829 A CN 103201829A CN 2011800530727 A CN2011800530727 A CN 2011800530727A CN 201180053072 A CN201180053072 A CN 201180053072A CN 103201829 A CN103201829 A CN 103201829A
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pad
scolder
alloy
layer
soldering paste
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CN103201829B (zh
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小内伸久
茂木昌巳
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On Semiconductor Trading Ltd
Semiconductor Components Industries LLC
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Semiconductor Components Industries LLC
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Abstract

提供一种电路装置及其制造方法,抑制焊料的缩痕的产生以提高焊料结合部的连接可靠性。在本方式的电路装置的制造方法中,首先,在焊盘18A的上表面形成多个分开的焊料19,并且固定安装片状部件14B和晶体管14C。接着,使用注射器30向焊盘18A的上表面供给焊膏31,在该焊膏31的上部载置散热件14D,通过回流工序熔化该焊膏31。在本发明中,因为在焊盘18A的上表面离散地配置焊料19,所以焊料19产生缩痕的可能性较小。

Description

电路装置及其制造方法
技术领域
本发明涉及电路装置及其制造方法,特别是涉及进行大型电路元件的焊料连接的电路装置的制造方法。
背景技术
参照图8说明现有的电路装置的制造方法。在此说明在基板106的表面形成导电图案108和电路元件的混合集成电路装置的制造方法(例如参照下述专利文献1)。
参照图8(A),首先,在形成于基板106表面的导电图案108的表面形成焊料109。基板106是例如由铝等金属构成的金属基板,导电图案108与基板106利用绝缘层107绝缘。利用导电图案108形成焊盘108A、焊盘108B及焊盘108C。在焊盘108A的上部通过后工序固定安装散热件。在焊盘108B上通过后工序固定小信号的晶体管。在焊盘108C上通过后工序固定引线。在此,在较大的焊盘108A及焊盘108C的表面形成焊料109。
参照图8(B),接着,经由焊料将小信号类的晶体管104C及片状部件104B固定。在该工序中,进行加热直至连接晶体管104C等的焊料熔化。因此,在前工序中形成于焊盘108A和焊盘108C的焊料109也熔化。
参照图8(C),接着,利用细线105B将小信号类的晶体管104C与规定的导电图案108连接。
参照图9(A),接着,将预先形成于焊盘108A和焊盘108C的焊料109熔化,固定安装散热件111及引线101。在此,经由预先形成的焊料109将上部载置有功率晶体管104A的散热件111固定安装在焊盘108A上。进而,使用粗线105A将所希望的导电图案108与晶体管104A连接。
参照图9(B),形成密封树脂102,使其覆盖形成于基板106表面的电路元件和导电图案108。通过以上工序,制造混合集成电路装置100。
现有技术文献
专利文献
专利文献1:(日本)特开2002-134682号公报
发明内容
发明要解决的技术课题
然而,参照图10,在上述现有的制造方法中,在熔融的焊料109中产生缩痕的问题。图10(A)是产生了缩痕的基板106的俯视图,图10(B)是剖面图,图10(C)是产生了缩痕部分的放大剖面图。
参照图10(A)及图10(B),“缩痕”是当熔化涂布于焊盘108(A)整个表面的焊料时焊料109发生偏离的现象。特别是固定安装有散热件111的焊盘108A形成为例如一个边长为9mm以上的大型的矩形。因此,与其他部位比较,在焊盘108A的上部附着大量的焊料,且在熔融的焊料109上作用有较大的表面张力,从而产生焊料的缩痕。
如果产生焊料109的缩痕,则在产生了焊料缩痕的部分,因为焊料108A与电路元件未接合,所以导致产生了缩痕的部分的热阻上升。另外,由于缩痕的产生导致焊料接合的强度降低,因此对应于温度变化的焊料结合部的连接可靠性降低。
参照图10(C),产生缩痕的原因是在焊盘108A与焊料109之间生成合金层110。在焊盘108A的上部附着焊膏并对其进行加热熔化时,形成由作为焊盘108A材料的铜和作为焊料材料的锡构成的金属间化合物。在该图中,用合金层110表示由金属间化合物构成的层。具体地说,合金层110的厚度为数μm左右,其组成是Cu6Sn5或者Cu3Sn的金属间化合物。该金属层110与作为焊盘108A材料的铜相比较,焊料的浸润性极差。由于形成了焊料的浸润性差的合金层110,因此产生了焊料的缩痕。如果多次熔化焊料,则形成于焊盘108A上表面的合金层110变厚,导致焊料的浸润性进一步恶化。在以下说明中,将由铜和锡构成的合金层称为Cu/Sn合金层。
近年来,从环境方面考虑,使用无铅焊料。如果使用无铅焊料作为焊料109A,则形成更厚的合金层110,从而上述的缩痕问题更加突出。其原因在于在无铅焊料中含有比铅共晶焊料多的锡。具体地说,通常铅共晶焊料中含有的锡的比例为60重量%左右,与此相对,无铅焊料中含有的锡的比例为90重量%左右。
另外,如果以提高生产率等为目的采用添加了松香类焊剂的焊膏,则发生熔化的焊膏不浸润的问题。其原因在于与水溶性焊剂相比,松香类焊剂的活性更弱。另外,如果用镍膜覆盖由铜构成的焊盘的上表面,并在该镍膜的上表面涂布松香类焊膏并使其熔化时,焊膏不浸润的问题更加突出。
在此,“浸润性差”指的是在焊盘与焊料之间未形成合金层,焊料不发生扩散。另一方面,“缩痕”指的是焊料与焊盘之间形成合金层而使焊料暂时浸润扩散,但之后在焊料的表面张力下焊料集聚的状态。因此,在焊料上产生缩痕时,如后文所述,在焊盘的上表面露出合金层而产生空隙。
此外,在对电路元件进行焊料连接时,如果在焊料与焊盘的界面部分形成厚的Cu/Sn合金层,由于厚的Cu/Sn层的机械强度较弱,因此有可能导致焊料连接的连接可靠性降低。
本发明是鉴于上述问题而提出的,本发明的主要目的在于提供一种电路装置的制造方法,其能够抑制产生焊料的缩痕以提高焊料结合部的连接可靠性。
用于解决技术课题的技术方案
本发明的电路装置的特征在于,包括:基板、形成于所述基板上表面的焊盘以及经由焊料固定安装于所述焊盘的电路元件;在所述焊料与所述焊盘的界面上形成有由构成二者的金属间化合物形成的合金层,所述合金层包括第一合金层及比所述第一合金层厚的第二合金层。
本发明的电路装置的制造方法的特征在于,包括:在配置于电路基板的焊盘的上表面彼此分开地形成第一焊料的工序,涂布焊膏使其覆盖所述第一焊料及所述焊盘上表面的工序,将电路元件载置于所述焊膏的上表面并进行加热而将所述电路元件固定安装于所述焊盘的工序。
发明效果
在本发明的电路装置中,在连接电路元件的焊料与焊盘的界面上设置的合金层由较厚的第一合金层和较薄的第二合金层构成。由此,因为能够利用较薄的合金层确保连接强度,所以能够提高焊料与焊盘的连接可靠性。
在本发明的电路装置的制造方法中,在比较大型的焊盘的上表面上以彼此分开的方式熔敷多个第一焊料。由于在焊盘的上表面上不是形成一体化的第一焊料,而是将离散的多个第一焊料设置成焊盘状,因此能够降低作用于各第一焊料上的表面张力,防止形成第一焊料的工序中产生的缩痕。
而且,由于在第一焊料中不会产生缩痕,因此在不形成第一焊料区域的焊盘的上表面不会露出Cu/Sn合金层。由于不会露出焊料的浸润性差的Cu/Sn合金层,因此进一步抑制在熔化焊膏的下一工序中的缩痕。
附图说明
图1是表示利用本发明制造的电路装置的视图,(A)是立体图,图1是剖面图,(C)是放大剖面图。
图2是表示本发明电路装置的制造方法的视图,(A)是俯视图,(B)是剖面图。
图3是表示本发明电路装置的制造方法的视图,(A)是剖面图,(B)是俯视图,(C)是放大俯视图。
图4是表示本发明电路装置的制造方法的视图,(A)是剖面图,(B)是剖面图,(C)是剖面图。
图5是表示本发明电路装置的制造方法的视图,(A)是俯视图,(B)是放大俯视图。
图6是表示本发明电路装置的制造方法的视图,(A)是剖面图,(B)是剖视图,(C)是放大剖面图。
图7是表示本发明电路装置的制造方法的视图,(A)是剖视图,(B)是剖视图。
图8是现有电路装置的制造方法的视图,(A)-(C)是剖面图。
图9是现有电路装置的制造方法的视图,(A)是剖面图,(B)是剖面图。
图10是现有电路装置的制造方法的视图,(A)是俯视图,(B)是剖面图,(C)是放大剖面图。
具体实施方式
<第一实施方式>
在本实施方式中,参照图1说明作为本发明电路装置一例的混合集成电路装置10的构成。图1(A)是混合集成电路装置10的立体图,图1(B)是其剖面图,图1(C)是表示固定安装有晶体管14A(电路元件)的结构的剖面图。
参照图1(A)及图1(B),在混合集成电路装置10中,在基板16的表面形成有导电图案18,在导电图案18上经由焊料19固定安装有晶体管等电路元件。并且,基板16的至少表面由密封树脂12密封。
基板16是由铝或铜等金属构成的金属基板,或者由环氧树脂等树脂材料构成的基板。在采用由铝构成的基板作为基板16时,基板16的两个主面被经过氧化铝膜处理生成的阳极氧化膜覆盖。基板16的具体大小例如为长×宽×厚=60mm×40mm×1.5mm左右。
绝缘层17形成为覆盖基板16的整个上表面。绝缘层17由填充了大量Al2O3等填充材料的环氧树脂等构成。由此,可经由基板16将从内置的电路元件产生的热量有效地排出到外部。绝缘层17的具体厚度例如为50μm左右。
导电图案18由以铜为主材料的金属膜构成,其形成在绝缘层17的表面以实现规定的电路。另外,利用导电图案18形成焊盘18A、焊盘18C及焊盘18E。后文将参照图2详述各焊盘。
功率晶体管14A、片状部件14B及小信号晶体管14C等电路元件经由焊料19固定安装于规定的导电图案18。功率晶体管14A隔着散热件14D固定安装于焊盘18A,从而使散热性提高。片状部件14B经由焊料19将两端的电极固定安装在导电图案18上。小信号晶体管14C经由焊料19将背面固定安装于焊盘18C。在此,功率晶体管14A例如是导通1A以上的电流的晶体管,小信号晶体管14C是导通不到1A的电流的晶体管。另外,功率晶体管14A表面的电极利用粗100μm以上的金属细线即粗线15A与导电图案18连接。另外,形成于小信号晶体管14C表面的电极利用粗细为80μm左右以下的细线15B与导电图案18连接。
作为安装于基板16的电路元件,可以采用晶体管、LST芯片、二极管等半导体元件。另外,也可以采用片状电阻、片状电容、电感、热敏电阻、天线、振荡器等片状部件作为电路元件。另外,可以将树脂密封型电路装置也作为电路元件内置于混合集成电路装置10。在本方式中,下面固定有散热件14D的晶体管14也可以视作一个电路元件。
引线11被固定安装在设置于基板16的周边部的焊盘18E上,具有与外部进行输入或输出的作用。在此,在一个侧边固定安装有多条引线11,但是,引线11既可以从基板16的四个边导出,还可以从相对的两个边导出。
密封树脂12通过使用热固性树脂的传递模塑成型形成。参照图1(B),形成于基板16表面的导电图案18和电路元件由密封树脂12覆盖。在此,基板16的侧面及背面也被密封树脂12覆盖,由此,能够使装置整体的耐湿性提高。另外,为了提高基板16的散热性,也可以使基板16的背面从密封树脂12露出。另外,也可以用壳体材料进行密封来代替树脂密封12。
参照图1(C)说明散热件14D熔敷在焊盘18A上的构造。具体地说,以铜为主材料构成的焊盘18A的上表面经由焊料19固定安装有散热件14D,并且,在散热件14D的上表面固定安装有晶体管14A的下侧电极。
另外,配置于晶体管14A上表面的电极经由粗线15A与配置于焊盘18A附近的焊盘状导电图案18连接。如上所述,通过在晶体管14A与焊盘18A之间配置散热件14D,使导热面积增大,从而从晶体管14A散出的热量能够良好地传导至基板16。
在采用MOSFET作为晶体管14A时,设置于晶体管14A下表面的漏电极隔着散热件14D与焊盘18A连接,而设置于晶体管14A上表面的源电极经由粗线15A与配置于焊盘18A附近的其他导电图案18连接。配置于晶体管14A上表面的栅电极经由粗线15A或者细线与配置于焊盘18A周围的其他导电图案18连接。
在焊盘18A的上表面与焊料19的界面部分,生成由焊盘18A的材料与焊料19的材料构成的金属间化合物。例如,在焊盘18A的材料是铜,焊料19的主材料是锡时,生成上述的Cu/Sn合金层。特别是,在采用由锡作为主材料的无铅焊料作为焊料19时,具有生成较厚的Cu/Sn合金层的倾向。
另外,在本实施方式中,作为固定安装于焊盘18A上表面的元件,采用上表面固定安装有晶体管14A的散热件,但是也可以在焊盘18A上固定安装其他元件。例如,可以直接在焊盘18A的上表面固定安装晶体管14A。
在本实施方式中,具有使上述合金层的一部分变薄而焊料19与焊盘18A的连接可靠性提高的优点。具体地说,Cu/Sn合金构成的合金层具有脆性。因此,如果该合金层较厚地形成,则在使用状况下在形成有合金层的部位有可能发生焊料19与焊盘18A的剥离。为了防止发生剥离,使合金层的一部分较薄地形成。由此,虽然较厚的合金层22的强度变弱,但是因为利用较薄的合金层23确保强度,所以利用该合金层的部分抑制使用状况下的裂纹的产生。
另外,较厚的合金层22在焊盘18A的上表面被配置为呈矩阵状,而较薄的合金层23在合金层22之间形成为格子状。通过使较薄的合金层23形成为格子状,利用合金层23在焊盘18A的整个表面上防止剥离。
另外,较薄的合金层22配置于焊盘18A的四方的周边部,由此也抑制了焊料19与焊盘18A的剥离。
如后文所述,这样的合金层通过将焊料部分地分成多个而形成。参照图5(B),焊盘18A上表面的形成焊料19的部位是上述较厚的合金层22的形成区域,而在焊盘18A的上表面的没有形成焊料19的区域是较薄的合金层23的形成区域。
<第二实施方式>
在本实施方式中,参照图2至图7说明上述混合集成电路装置10的制造方法。
第一工序:参照图2
在本工序中,在基板16的表面形成导电图案18。图2(A)是本工序中的基板16的俯视图,图2(B)是其剖面图。
参照图2(A)及图2(B),通过对贴合于基板16表面的导电箔进行构图,形成规定图案形状的导电图案18。在此,利用导电图案18形成焊盘18A~18E。焊盘18A是在后工序中固定安装散热件的焊盘,形成得较大。例如,焊盘18A形成为9mm×9mm以上的四边形形状。焊盘18B、18C是在后工序中经由焊料固定安装有片状电容等片状元件的两个电极的焊盘。另外,焊盘18D是固定安装有小信号类晶体管或者LSI的焊盘,与焊盘18A相比,形成得较小。例如焊盘18D的大小为2mm×2mm左右的矩形。焊盘18E在纸面上沿着基板16的上侧边大致等间隔地形成有多个。该焊盘18E在后工序中固定安装有引线11。另外,也形成相互连接各焊盘并延伸的配线图案18F。
上述导电图案18由以铜为主材料的金属构成。另外,焊盘18A等上表面是未被镀敷膜等覆盖而露出构成导电图案18的金属材料的面。并且,在通常的工作环境下,有时由较薄的氧化膜覆盖焊盘18A的表面,但是该氧化膜被包含在之后涂布的焊膏中的焊剂除去。
第二工序:参照图3
在本工序中,在焊盘18A~18D的上表面涂布焊膏21。
具体地说,参照图3(A),通过进行丝网印刷,在焊盘18A~18D的上表面涂布焊膏21A。在本工序中,在下一工序中安装小信号类元件的焊盘18B~18D和大型焊盘18A的上表面印刷涂布焊膏21A。
参照图3(A)及图3(B),焊盘18B、18C是安装电阻器等片状元件的元件,在其上表面的大致整个区域一体地涂布焊膏21A。另外,焊盘18D为供控制用的LSI固定安装的焊盘,在其上表面的大致整个区域一体地涂布焊膏21A。
在此,配置于图3(A)右端的焊盘18E是在后工序中供外部输出端子的引线固定安装的焊盘,在本工序中未熔敷有焊料。
另一方面,参照图3(C),在焊盘18A的上表面,不是以均匀的厚度在其整个表面上涂布焊膏21A,而是离散地涂布焊膏21A。具体地说,在焊盘18A的上表面,彼此分开地以三行三列的矩阵状配置合计九个焊膏21A。在此,有九个焊膏21A配置于焊盘18A的上表面,但是该个数也可以是两个、四个或者六个左右。
首先,离散配置有焊盘21A的焊盘18A在俯视时呈四边形形状,L1=4.5mm以上至13.0mm,L2与L1程度相同。
各焊膏21A在俯视时呈四边形形状,L3=2.4mm以上3.4mm以下,L4的长度与L3程度相同。在此,焊膏21A既可以是正方形,也可以是长方形。如果焊膏21A的一个边长过长,则焊膏21A的量增多,从而表面张力增大,导致上述缩痕发生的可能性变大。相反地,如果焊膏21A的一个边长过短,则焊膏21的量不充分,从而导致焊盘18A与其上表面固定安装的元件的连接强度不充分。
各焊膏21A彼此分开以便维持其在熔化时离散化的状态。焊膏21A彼此在纸面的纵向上分开的距离L5例如在0.9mm以上1.7mm以下。另外,焊膏21A彼此在纸面的横向上分开的距离L6也相同。如果焊膏21A彼此分开的距离过短,则导致熔化的焊膏21彼此成为一体,其结果,在液状的焊膏上产生的表面张力变大,从而产生缩痕。另一方面,如果焊膏21彼此分开的距离过长,则有可能导致焊膏21A的量不足。
在本工序中利用丝网印刷涂布或者由注射器的供给来进行。在采用丝网印刷时,将在涂布焊膏21A的区域具有开口部的丝网载置于基板16的上表面,利用刮板向该丝网的开口部供给焊膏。之后,通过使丝网与基板16分离,在规定位置上涂布焊膏21A。
在本工序中使用的焊膏21A是焊剂与焊料粉末的混合物。作为混入焊膏21A的焊料粉,可以采用含铅的焊料及无铅焊料两种。作为焊料粉的具体组成,考虑例如Sn63/Pb37、Sn/Ag3.5、Sn/Ag3.0/Cu0.5、Sn/Ag2.9/Cu0.5、Sn/Ag3.0/Cu0.5、Sn/Bi58、Sn/Cu0.7、Sn/Zn9、Sn/Zn8/Bi3等。这些数字表示相对总焊料的重量%。考虑到铅给予环境的负荷大,优选使用无铅焊料。
在上述无铅焊料中,从熔点的合适度等观点出发,具有Sn/Ag3.0/Cu0.5组成的焊料最为合适。在此,该焊料中含有的Ag的重量%可以在2.0以上4.0%以下,Cu的重量%可以在0.5%以上0.8%以下。
另外,无铅焊料以Sn(锡)作为主材料的情况较多,因此在焊盘18A与焊料19的界面生成包含铜和锡的浸润性差的金属间化合物层。
松香类焊剂可以适用作为包含于焊膏21的焊剂,在本实施方式中,在回流工序结束后,将该焊剂的残渣清洗除去。
第三工序:参照图4及图5
接着,进行除功率晶体管外的元件(小信号类晶体管及片状部件)的电连接,并在焊盘18A的上表面离散地形成焊料19。
首先,参照图4(A),将本工序中连接的元件载置于焊膏21A。具体地说,在涂布于焊盘18B、18C的焊膏21A的上表面载置片状部件14B。同样地,在涂布于焊盘18D上表面的焊盘21A上表面载置晶体管14C。
接着,参照图4(B),通过利用回流工序进行加热,使上述焊膏21A熔化以形成焊料19。由此,片状部件14B两端的电极经由焊料19固定安装于焊盘18B,18C。另外,晶体管14C的背面也经由焊料19固定安装于焊盘18D的上表面。在本工序的回流中,涂布于焊盘18A上表面的焊膏21A也熔化,形成焊料19(第一焊料)。
接着,参照图4(C),经由细线15B,将配置于晶体管14C上表面的电极与配置于焊盘18D周围的导电图案构成的焊盘连接。在此,细线15B是粗细在80μm左右以下的金、铜或者铝构成的金属细线。
图5表示本工序结束后的基板16的状态。图5(A)表示本工序结束后的基板16上表面的俯视图,图5(B)是表示焊盘18A的放大俯视图。
参照图5(A)与图5(B),在焊盘18A的上表面以三行三列的方式彼此分开地配置合计九个焊料19。各焊料19的平面大小与参照图3(C)说明的情况相比稍大,其形状呈稍微膨胀的四边形形状。这是由于焊膏熔化而向外部扩张引起的。另外,各焊料19之间分开的距离L5、L6与图3(C)所示的情况相比,距离稍微缩短。但是,即使经过了本工序,焊料19之间也保持分开的状态。
在本方式中,通过像这样在焊盘18A的上表面离散地配置小型的焊料19,防止了焊料缩痕。
具体地说,如上所述,在后工序中供散热件安装的焊盘18A例如是一个边长在9mm以上的大型焊盘。因此,如果在焊盘18A的整个上表面上涂布焊膏并使其熔化,则在大量液体状的焊料上作用有较大的表面张力。此时,在表面张力的作用下焊料19产生缩痕。另外,在焊料19中产生缩痕的部分露出由焊盘18A与焊料19生成的Cu/Sn合金。在露出该Cu/Sn合金的面上,因为焊料的浸润性极差,所以在后工序中在该区域焊料不熔敷而产生空隙。
在本方式中,通过使小型的焊料19离散地形成于焊盘18A的上表面,使表面张力变小,其结果,焊料19在防止产生缩痕的状态下熔敷于焊盘18A的上表面。因此,在焊盘18A上表面的没有形成焊料19的区域不会露出Cu/Sn层。即,该区域露出焊盘18A的材料即铜等金属材料。由此,防止了焊料在该区域中的浸润性的降低。
第四工序:参照图6
接着,参照图6,将固定安装有晶体管14A的散热件14D固定安装于焊盘18A的上表面。
参照图6(A),首先,向焊盘18A的上表面供给新的焊膏31。在本工序中,因为在基板16的上表面上已经配置有片状部件14B等电路元件,丝网印刷困难,所以使用注射器30将焊膏31供给至焊盘18A的上表面。在本工序中,丸子状地供给焊膏31使其填埋在已经形成于焊盘18A上表面的焊料19之间。在本工序中使用的焊膏31的组成可以与图3(A)所示的焊膏21A相同。
在本工序中,焊膏31与没有形成焊料19的区域的焊盘18A的上表面接触。并且,焊料19的表面被焊膏31覆盖。
参照图6(B),接着,将固定安装有功率类晶体管14A的散热件14D载置于焊料19的上表面。在此,预先将晶体管14A经由焊料固定安装于散热件14D的上表面,但是也可以在将散热件14D固定安装于焊盘18A之后,将晶体管14A固定安装于散热件14D。
该状态下,通过进行回流工序,形成于焊盘18A上表面的焊料19与焊膏31熔化。其结果,预先形成的焊料19与焊膏31熔化并混合,从而散热件14D经由如图6(C)所示的新的焊料19(第二焊料)固定安装于焊盘18A的上表面。另外,用于固定安装片状部件14B和晶体管14C的焊料19也在本工序中熔化之后凝固。
在此,在没有熔化焊料19的区域的焊盘18A的上表面是露出焊料19A的材料即铜的表面。即,在该区域不露出焊料的浸润性差的Cn/Sn合金层。因此,在本方式中生成的焊料良好地紧密贴合在该区域,从而抑制了空隙的产生。
参照图6(C),在经由焊料19将散热件14D固定安装后,经由粗线15A将配置于晶体管14A上表面的电极与导电图案18连接。
在本工序中,通过熔化焊膏形成焊料19,在焊盘18A与焊料19之间生成上述的合金层。具体地说,在焊盘18A与焊料19的界面部分,生成厚度不同的两种合金层22、23。
合金层22位于上述的焊料19被离散配置的部位,进行了两次焊料的熔化,因此形成比较厚的合金层。换言之,合金层22包括如图4所示的工序中生成的合金层和在本工序中生成的合金层。
另一方面,合金层23是仅在本工序(即只熔化一次)中生成的合金层,其厚度例如在合金层22厚度一半以下左右。参照图6(A),厚度不均匀的合金层是通过局部地形成最初形成的焊料19,然后再次全面形成焊膏31而设置的。
在本方式中,如上所述,最初离散地设置焊料,之后再次供给焊膏31来形成焊料19,从而得到确保用于安装散热件14D的足够的焊料量,并且防止该焊料产生缩痕的双重效果。
第五工序:参照图7
在本工序中,进行引线11的固定安装和密封树脂12的形成。
参照图7(A),首先,在焊盘18E的上部涂布焊膏21A并载置引线11,之后熔化焊膏21A并固定安装引线11。
参照图7(B),接着,形成密封树脂12使其覆盖固定安装于基板16表面的电路元件。在本方式中,密封树脂12的形成也覆盖基板16的侧面与背面。在此,也可以形成密封树脂12时使基板16的背面向外部露出。并且,可以利用壳体材料密封基板16的表面。
利用上述工序,形成如图1所示的混合集成电路装置10。
符号说明
10   混合集成电路装置
11   引线
12   密封树脂
14A  晶体管
14B  片状部件
14C  晶体管
14D  散热件
15A  粗线
15B  细线
16   基板
17   绝缘层
18   图案
18A  焊盘
18B  焊盘
18C  焊盘
18D  焊盘
18E  焊盘
18F  配线图案
19   焊料
21   焊膏
21A  焊膏
22   合金层
23   合金层
30   注射器
31   焊膏

Claims (11)

1.一种电路装置,其特征在于,包括:
基板、
形成于所述基板的上表面的焊盘、
经由焊料固定安装于所述焊盘的电路元件,
在所述焊料与所述焊盘的界面形成有由构成二者的金属间化合物形成的合金层,
所述合金层包括第一合金层及比所述第一合金层厚的第二合金层。
2.如权利要求1所述的电路装置,其特征在于,所述第一合金层彼此分开而被配置成矩阵状。
3.如权利要求2所述的电路装置,其特征在于,所述第一合金层在所述第二合金层之间形成为格子状。
4.如权利要求1至3中任一项所述的电路装置,其特征在于,所述电路元件是上表面固定安装有半导体元件的散热件。
5.一种电路装置的制造方法,其特征在于,包括:
在配置于电路基板的焊盘的上表面彼此分开地形成多个第一焊料的工序;
涂布焊膏使其覆盖所述第一焊料和所述焊盘的上表面的工序;
在所述焊膏的上表面载置电路元件并进行加热而使所述电路元件固定安装于所述焊盘的工序。
6.如权利要求5所述的电路装置的制造方法,其特征在于,所述第一焊料直接形成在所述焊盘的上表面,所述焊膏涂布在所述第一焊料的表面及所述焊盘的上表面。
7.如权利要求5或6所述的电路装置的制造方法,其特征在于,将所述第一焊料以矩阵状配置在所述焊盘的上表面。
8.如权利要求5至7中任一项所述的电路装置的制造方法,其特征在于,在所述第一焊料与所述焊盘的界面部分生成第一合金层;
在通过熔化所述焊膏而形成的第二焊料与所述焊盘的界面部分生成第二合金层;
所述第二合金层比所述第一合金层薄。
9.如权利要求5至8中任一项所述的电路装置的制造方法,其特征在于,所述第一焊料形成为在俯视时呈一边的长度在3mm以下的四边形。
10.如权利要求5至9中任一项所述的电路装置的制造方法,其特征在于,在形成所述第一焊料的工序中,将片状元件或小信号晶体管经由焊料固定安装于所述电路基板的上表面。
11.如权利要求5至10中任一项所述的电路装置的制造方法,其特征在于,所述电路元件是上表面固定安装有晶体管的散热件。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109599334A (zh) * 2017-09-30 2019-04-09 株洲中车时代电气股份有限公司 用于绝缘栅双极晶体管的制造方法
CN113894398A (zh) * 2021-10-25 2022-01-07 智新半导体有限公司 提高ntc电阻焊接可靠性的方法及装置

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102212559B1 (ko) 2014-08-20 2021-02-08 삼성전자주식회사 반도체 발광소자 및 이를 이용한 반도체 발광소자 패키지
USD836073S1 (en) * 2017-01-25 2018-12-18 Shindengen Electric Manufacturing Co., Ltd. Solid state relay
JP7192523B2 (ja) * 2019-01-23 2022-12-20 富士通株式会社 半導体パッケージ及び電子装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58132941A (ja) * 1982-02-02 1983-08-08 Sharp Corp 部品搭載基板のリ−ド接続方法
JPH0690078A (ja) * 1992-09-07 1994-03-29 Harima Chem Inc プリコート基板の製造方法
US20050230842A1 (en) * 2004-04-20 2005-10-20 Texas Instruments Incorporated Multi-chip flip package with substrate for inter-die coupling
CN1755919A (zh) * 2004-09-30 2006-04-05 三洋电机株式会社 电路装置及其制造方法
CN101243546A (zh) * 2005-08-22 2008-08-13 罗姆股份有限公司 半导体装置及其制造方法以及基板
CN100440468C (zh) * 2005-01-31 2008-12-03 三洋电机株式会社 电路装置的制造方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4748085A (en) * 1985-11-16 1988-05-31 Narumi China Corporation Multilayer ceramic circuit board fired at a low temperature
US4775917A (en) * 1985-12-03 1988-10-04 Wells Manufacturing Company Thermal compensated circuit board interconnect apparatus and method of forming the same
JP3141364B2 (ja) * 1992-05-06 2001-03-05 住友電気工業株式会社 半導体チップ
US6444563B1 (en) * 1999-02-22 2002-09-03 Motorlla, Inc. Method and apparatus for extending fatigue life of solder joints in a semiconductor device
JP2002134682A (ja) 2000-10-26 2002-05-10 Sanyo Electric Co Ltd 混成集積回路装置の製造方法
CN1445049A (zh) * 2002-03-19 2003-10-01 日本胜利株式会社 焊锡膏、焊接成品及焊接方法
US20040238925A1 (en) * 2003-05-23 2004-12-02 Paul Morganelli Pre-applied thermoplastic reinforcement for electronic components
JP3918779B2 (ja) * 2003-06-13 2007-05-23 松下電器産業株式会社 非耐熱部品のはんだ付け方法
US20060108402A1 (en) * 2004-11-19 2006-05-25 Tessera, Inc. Solder ball formation and transfer method
JP4817418B2 (ja) * 2005-01-31 2011-11-16 オンセミコンダクター・トレーディング・リミテッド 回路装置の製造方法
US7851916B2 (en) * 2005-03-17 2010-12-14 Taiwan Semiconductor Manufacturing Co., Ltd. Strain silicon wafer with a crystal orientation (100) in flip chip BGA package
US20090085207A1 (en) * 2007-09-28 2009-04-02 Texas Instruments, Inc. Ball grid array substrate package and solder pad
US20090218124A1 (en) * 2008-02-28 2009-09-03 Motorola, Inc. Method of filling vias with fusible metal

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58132941A (ja) * 1982-02-02 1983-08-08 Sharp Corp 部品搭載基板のリ−ド接続方法
JPH0690078A (ja) * 1992-09-07 1994-03-29 Harima Chem Inc プリコート基板の製造方法
US20050230842A1 (en) * 2004-04-20 2005-10-20 Texas Instruments Incorporated Multi-chip flip package with substrate for inter-die coupling
CN1755919A (zh) * 2004-09-30 2006-04-05 三洋电机株式会社 电路装置及其制造方法
CN100440468C (zh) * 2005-01-31 2008-12-03 三洋电机株式会社 电路装置的制造方法
CN101243546A (zh) * 2005-08-22 2008-08-13 罗姆股份有限公司 半导体装置及其制造方法以及基板

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109599334A (zh) * 2017-09-30 2019-04-09 株洲中车时代电气股份有限公司 用于绝缘栅双极晶体管的制造方法
CN113894398A (zh) * 2021-10-25 2022-01-07 智新半导体有限公司 提高ntc电阻焊接可靠性的方法及装置

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