JP2007027559A - 表面実装型電子部品、その製造方法および光学電子機器 - Google Patents

表面実装型電子部品、その製造方法および光学電子機器 Download PDF

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Publication number
JP2007027559A
JP2007027559A JP2005210115A JP2005210115A JP2007027559A JP 2007027559 A JP2007027559 A JP 2007027559A JP 2005210115 A JP2005210115 A JP 2005210115A JP 2005210115 A JP2005210115 A JP 2005210115A JP 2007027559 A JP2007027559 A JP 2007027559A
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Japan
Prior art keywords
electronic component
resin
photoelectric effect
effect element
sealing
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2005210115A
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English (en)
Japanese (ja)
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JP2007027559A5 (enExample
Inventor
Takahiro Matsuyama
貴洋 松山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
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Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP2005210115A priority Critical patent/JP2007027559A/ja
Publication of JP2007027559A publication Critical patent/JP2007027559A/ja
Publication of JP2007027559A5 publication Critical patent/JP2007027559A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/93—Batch processes
    • H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05552—Shape in top view
    • H01L2224/05553—Shape in top view being rectangular
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49171—Fan-out arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161—Cap
    • H01L2924/1615—Shape
    • H01L2924/16195—Flat cap [not enclosing an internal cavity]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation
    • H01L2924/1815—Shape

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Light Receiving Elements (AREA)
  • Led Device Packages (AREA)
  • Semiconductor Lasers (AREA)
JP2005210115A 2005-07-20 2005-07-20 表面実装型電子部品、その製造方法および光学電子機器 Pending JP2007027559A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2005210115A JP2007027559A (ja) 2005-07-20 2005-07-20 表面実装型電子部品、その製造方法および光学電子機器

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005210115A JP2007027559A (ja) 2005-07-20 2005-07-20 表面実装型電子部品、その製造方法および光学電子機器

Publications (2)

Publication Number Publication Date
JP2007027559A true JP2007027559A (ja) 2007-02-01
JP2007027559A5 JP2007027559A5 (enExample) 2007-05-17

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JP2005210115A Pending JP2007027559A (ja) 2005-07-20 2005-07-20 表面実装型電子部品、その製造方法および光学電子機器

Country Status (1)

Country Link
JP (1) JP2007027559A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008053546A (ja) * 2006-08-25 2008-03-06 Tdk Corp 受光素子
JP2008288539A (ja) * 2007-05-16 2008-11-27 Philips Lumileds Lightng Co Llc 実装用に半導体発光デバイスを前処理するための方法
JP2009099680A (ja) * 2007-10-15 2009-05-07 Panasonic Corp 光学デバイスおよびその製造方法

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0480989A (ja) * 1990-07-23 1992-03-13 Nec Home Electron Ltd 封止樹脂の塞止め構造
JP2001250889A (ja) * 2000-03-06 2001-09-14 Matsushita Electric Ind Co Ltd 光素子の実装構造体およびその製造方法
JP2003273371A (ja) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd 集積回路素子の実装構造および実装方法
JP2005166870A (ja) * 2003-12-02 2005-06-23 Seiko Epson Corp 光素子及びその製造方法、光モジュール、光伝送装置
JP2006186288A (ja) * 2004-09-14 2006-07-13 Sony Chem Corp 機能素子実装モジュール及びその製造方法
JP2007189182A (ja) * 2005-03-09 2007-07-26 Pioneer Electronic Corp 光検出半導体装置及びその製造方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0480989A (ja) * 1990-07-23 1992-03-13 Nec Home Electron Ltd 封止樹脂の塞止め構造
JP2001250889A (ja) * 2000-03-06 2001-09-14 Matsushita Electric Ind Co Ltd 光素子の実装構造体およびその製造方法
JP2003273371A (ja) * 2002-03-19 2003-09-26 Matsushita Electric Ind Co Ltd 集積回路素子の実装構造および実装方法
JP2005166870A (ja) * 2003-12-02 2005-06-23 Seiko Epson Corp 光素子及びその製造方法、光モジュール、光伝送装置
JP2006186288A (ja) * 2004-09-14 2006-07-13 Sony Chem Corp 機能素子実装モジュール及びその製造方法
JP2007189182A (ja) * 2005-03-09 2007-07-26 Pioneer Electronic Corp 光検出半導体装置及びその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008053546A (ja) * 2006-08-25 2008-03-06 Tdk Corp 受光素子
JP2008288539A (ja) * 2007-05-16 2008-11-27 Philips Lumileds Lightng Co Llc 実装用に半導体発光デバイスを前処理するための方法
JP2009099680A (ja) * 2007-10-15 2009-05-07 Panasonic Corp 光学デバイスおよびその製造方法

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