JP2006512776A - 直列接続されたトランジスタ列を組込んだプログラマブルメモリアレイ構造およびこの構造を製造して作動させるための方法 - Google Patents

直列接続されたトランジスタ列を組込んだプログラマブルメモリアレイ構造およびこの構造を製造して作動させるための方法 Download PDF

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JP2006512776A
JP2006512776A JP2004565772A JP2004565772A JP2006512776A JP 2006512776 A JP2006512776 A JP 2006512776A JP 2004565772 A JP2004565772 A JP 2004565772A JP 2004565772 A JP2004565772 A JP 2004565772A JP 2006512776 A JP2006512776 A JP 2006512776A
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block
voltage
memory
nand string
integrated circuit
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Japanese (ja)
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JP2006512776A5 (cg-RX-API-DMAC7.html
Inventor
スケウアーレイン，ロイ・イー
ペティ，クリストファー
ウォーカー，アンドルー・ジェイ
チェン，エン−シン
ナラモス，シュシェタ
イルクバハール，アルパー
ファソリ，ルカ・ジィ
クズネトソフ，イゴール
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マトリックス セミコンダクター インコーポレイテッド
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Priority claimed from US10/335,078 external-priority patent/US7505321B2/en
Priority claimed from US10/335,089 external-priority patent/US7005350B2/en
Application filed by マトリックス セミコンダクター インコーポレイテッド filed Critical マトリックス セミコンダクター インコーポレイテッド
Publication of JP2006512776A publication Critical patent/JP2006512776A/ja
Publication of JP2006512776A5 publication Critical patent/JP2006512776A5/ja
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G11C16/14—Circuits for erasing electrically, e.g. erase voltage switching circuits
    • G11C16/16—Circuits for erasing electrically, e.g. erase voltage switching circuits for erasing blocks, e.g. arrays, words, groups
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/10—EEPROM devices comprising charge-trapping gate insulators characterised by the top-view layout
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Thin Film Transistor (AREA)
JP2004565772A 2002-12-31 2003-12-29 直列接続されたトランジスタ列を組込んだプログラマブルメモリアレイ構造およびこの構造を製造して作動させるための方法 Withdrawn JP2006512776A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/335,078 US7505321B2 (en) 2002-12-31 2002-12-31 Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same
US10/335,089 US7005350B2 (en) 2002-12-31 2002-12-31 Method for fabricating programmable memory array structures incorporating series-connected transistor strings
PCT/US2003/041446 WO2004061863A2 (en) 2002-12-31 2003-12-29 Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same

Publications (2)

Publication Number Publication Date
JP2006512776A true JP2006512776A (ja) 2006-04-13
JP2006512776A5 JP2006512776A5 (cg-RX-API-DMAC7.html) 2007-02-22

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JP2004565772A Withdrawn JP2006512776A (ja) 2002-12-31 2003-12-29 直列接続されたトランジスタ列を組込んだプログラマブルメモリアレイ構造およびこの構造を製造して作動させるための方法

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JP (1) JP2006512776A (cg-RX-API-DMAC7.html)
AU (1) AU2003300007A1 (cg-RX-API-DMAC7.html)
WO (1) WO2004061863A2 (cg-RX-API-DMAC7.html)

Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008004934A (ja) * 2006-06-22 2008-01-10 Macronix Internatl Co Ltd 積層型不揮発性メモリデバイスおよびその製造方法
JP2008098641A (ja) * 2006-10-11 2008-04-24 Samsung Electronics Co Ltd Ｎａｎｄフラッシュメモリー装置及びその製造方法
JP2008098602A (ja) * 2006-10-13 2008-04-24 Macronix Internatl Co Ltd 積層型薄膜トランジスタ型不揮発性メモリ装置、およびその製造方法
JP2008210503A (ja) * 2007-02-27 2008-09-11 Samsung Electronics Co Ltd 不揮発性メモリ装置及びその駆動方法
JP2009130140A (ja) * 2007-11-22 2009-06-11 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2010040977A (ja) * 2008-08-08 2010-02-18 Toshiba Corp 半導体記憶装置及びその製造方法
JP2010045205A (ja) * 2008-08-13 2010-02-25 Toshiba Corp 不揮発性半導体記憶装置、及びその製造方法
JP2011054758A (ja) * 2009-09-02 2011-03-17 Toshiba Corp 半導体集積回路装置
JP2011243705A (ja) * 2010-05-17 2011-12-01 Toshiba Corp 半導体装置
JP2013157074A (ja) * 2012-01-30 2013-08-15 Phison Electronics Corp Ｎａｎｄフラッシュメモリユニット、ｎａｎｄフラッシュメモリ配列、およびそれらの動作方法
JP2013161878A (ja) * 2012-02-02 2013-08-19 Renesas Electronics Corp 半導体装置、および半導体装置の製造方法
KR101547328B1 (ko) * 2009-09-25 2015-08-25 삼성전자주식회사 강유전체 메모리 소자 및 그 동작 방법
US11647631B2 (en) 2020-03-09 2023-05-09 Kioxia Corporation Semiconductor memory device

Families Citing this family (8)

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Publication number Priority date Publication date Assignee Title
KR100657910B1 (ko) * 2004-11-10 2006-12-14 삼성전자주식회사 멀티비트 플래시 메모리 소자, 그 동작 방법, 및 그 제조방법
DE102005017072A1 (de) * 2004-12-29 2006-07-13 Hynix Semiconductor Inc., Ichon Ladungsfalle- bzw. Ladung-Trap-Isolator-Speichereinrichtung
US7317641B2 (en) 2005-06-20 2008-01-08 Sandisk Corporation Volatile memory cell two-pass writing method
US7764549B2 (en) 2005-06-20 2010-07-27 Sandisk 3D Llc Floating body memory cell system and method of manufacture
US7489546B2 (en) 2005-12-20 2009-02-10 Micron Technology, Inc. NAND architecture memory devices and operation
US8759915B2 (en) 2006-03-20 2014-06-24 Micron Technology, Inc. Semiconductor field-effect transistor, memory cell and memory device
US11729989B2 (en) * 2020-01-06 2023-08-15 Iu-Meng Tom Ho Depletion mode ferroelectric transistors
CN112470225B (zh) * 2020-10-23 2022-12-09 长江先进存储产业创新中心有限责任公司 用以提高2堆叠体3d pcm存储器的数据吞吐量的编程和读取偏置和访问方案

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5680347A (en) * 1994-06-29 1997-10-21 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device
AU7475196A (en) * 1995-10-25 1997-05-15 Nvx Corporation Semiconductor non-volatile memory device having a nand cell structure
KR100206709B1 (ko) * 1996-09-21 1999-07-01 윤종용 멀티비트 불휘발성 반도체 메모리의 셀 어레이의 구조 및 그의 구동방법
US6888750B2 (en) * 2000-04-28 2005-05-03 Matrix Semiconductor, Inc. Nonvolatile memory on SOI and compound semiconductor substrates and method of fabrication

Cited By (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008004934A (ja) * 2006-06-22 2008-01-10 Macronix Internatl Co Ltd 積層型不揮発性メモリデバイスおよびその製造方法
JP2008098641A (ja) * 2006-10-11 2008-04-24 Samsung Electronics Co Ltd Ｎａｎｄフラッシュメモリー装置及びその製造方法
JP2008098602A (ja) * 2006-10-13 2008-04-24 Macronix Internatl Co Ltd 積層型薄膜トランジスタ型不揮発性メモリ装置、およびその製造方法
JP2008210503A (ja) * 2007-02-27 2008-09-11 Samsung Electronics Co Ltd 不揮発性メモリ装置及びその駆動方法
US8648471B2 (en) 2007-11-22 2014-02-11 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device including a via-hole with a narrowing cross-section and method of manufacturing the same
JP2009130140A (ja) * 2007-11-22 2009-06-11 Toshiba Corp 不揮発性半導体記憶装置及びその製造方法
JP2010040977A (ja) * 2008-08-08 2010-02-18 Toshiba Corp 半導体記憶装置及びその製造方法
JP2010045205A (ja) * 2008-08-13 2010-02-25 Toshiba Corp 不揮発性半導体記憶装置、及びその製造方法
USRE45480E1 (en) 2008-08-13 2015-04-21 Kabushiki Kaisha Toshiba Nonvolatile semiconductor memory device and producing method thereof
JP2011054758A (ja) * 2009-09-02 2011-03-17 Toshiba Corp 半導体集積回路装置
US8274068B2 (en) 2009-09-02 2012-09-25 Kabushiki Kaisha Toshiba Semiconductor integrated circuit device and method of fabricating the same
KR101547328B1 (ko) * 2009-09-25 2015-08-25 삼성전자주식회사 강유전체 메모리 소자 및 그 동작 방법
US8791446B2 (en) 2010-05-17 2014-07-29 Kabushiki Kaisha Toshiba Semiconductor device
JP2011243705A (ja) * 2010-05-17 2011-12-01 Toshiba Corp 半導体装置
US8755227B2 (en) 2012-01-30 2014-06-17 Phison Electronics Corp. NAND flash memory unit, NAND flash memory array, and methods for operating them
JP2013157074A (ja) * 2012-01-30 2013-08-15 Phison Electronics Corp Ｎａｎｄフラッシュメモリユニット、ｎａｎｄフラッシュメモリ配列、およびそれらの動作方法
JP2013161878A (ja) * 2012-02-02 2013-08-19 Renesas Electronics Corp 半導体装置、および半導体装置の製造方法
US11647631B2 (en) 2020-03-09 2023-05-09 Kioxia Corporation Semiconductor memory device

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Publication number Publication date
AU2003300007A8 (en) 2004-07-29
WO2004061863A3 (en) 2004-12-16
AU2003300007A1 (en) 2004-07-29
WO2004061863A2 (en) 2004-07-22

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