JP2006503435A - 薄膜トランジスタアレイ基板及びその製造方法 - Google Patents
薄膜トランジスタアレイ基板及びその製造方法 Download PDFInfo
- Publication number
- JP2006503435A JP2006503435A JP2004545011A JP2004545011A JP2006503435A JP 2006503435 A JP2006503435 A JP 2006503435A JP 2004545011 A JP2004545011 A JP 2004545011A JP 2004545011 A JP2004545011 A JP 2004545011A JP 2006503435 A JP2006503435 A JP 2006503435A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- etching
- layer
- gate
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 45
- 239000010409 thin film Substances 0.000 title claims description 45
- 238000004519 manufacturing process Methods 0.000 title claims description 19
- 238000005530 etching Methods 0.000 claims abstract description 77
- 239000004065 semiconductor Substances 0.000 claims abstract description 60
- 239000004020 conductor Substances 0.000 claims abstract description 34
- 239000010408 film Substances 0.000 claims description 139
- 238000000034 method Methods 0.000 claims description 38
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 13
- 229910052782 aluminium Inorganic materials 0.000 claims description 13
- VYZAMTAEIAYCRO-UHFFFAOYSA-N Chromium Chemical compound [Cr] VYZAMTAEIAYCRO-UHFFFAOYSA-N 0.000 claims description 12
- 229910052804 chromium Inorganic materials 0.000 claims description 12
- 239000011651 chromium Substances 0.000 claims description 12
- 229910000838 Al alloy Inorganic materials 0.000 claims description 11
- 230000001681 protective effect Effects 0.000 claims description 10
- 238000001039 wet etching Methods 0.000 claims description 10
- 229910001182 Mo alloy Inorganic materials 0.000 claims description 7
- ZOKXTWBITQBERF-UHFFFAOYSA-N Molybdenum Chemical compound [Mo] ZOKXTWBITQBERF-UHFFFAOYSA-N 0.000 claims description 7
- 229910052750 molybdenum Inorganic materials 0.000 claims description 7
- 239000011733 molybdenum Substances 0.000 claims description 7
- 238000001312 dry etching Methods 0.000 claims description 6
- 229920002120 photoresistant polymer Polymers 0.000 claims description 5
- 238000000151 deposition Methods 0.000 claims description 3
- 238000000206 photolithography Methods 0.000 claims 2
- 238000010030 laminating Methods 0.000 claims 1
- 230000005611 electricity Effects 0.000 description 14
- 230000003068 static effect Effects 0.000 description 14
- 239000004973 liquid crystal related substance Substances 0.000 description 13
- 229910021417 amorphous silicon Inorganic materials 0.000 description 7
- 238000003860 storage Methods 0.000 description 7
- 238000001259 photo etching Methods 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 229920000642 polymer Polymers 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000004380 ashing Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 3
- 238000000059 patterning Methods 0.000 description 3
- 229910001316 Ag alloy Inorganic materials 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 239000011810 insulating material Substances 0.000 description 2
- 238000012423 maintenance Methods 0.000 description 2
- 239000011368 organic material Substances 0.000 description 2
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 238000002834 transmittance Methods 0.000 description 2
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- 206010034972 Photosensitivity reaction Diseases 0.000 description 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000005540 biological transmission Effects 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005229 chemical vapour deposition Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 230000036211 photosensitivity Effects 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Images
Classifications
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
- H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/40—Electrodes ; Multistep manufacturing processes therefor
- H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
- H01L29/45—Ohmic electrodes
- H01L29/456—Ohmic electrodes on silicon
- H01L29/458—Ohmic electrodes on silicon for thin film silicon, e.g. source or drain electrode
-
- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
- G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
- G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
- G02F1/1362—Active matrix addressed cells
- G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Nonlinear Science (AREA)
- Mathematical Physics (AREA)
- Chemical & Material Sciences (AREA)
- Crystallography & Structural Chemistry (AREA)
- Optics & Photonics (AREA)
- Thin Film Transistor (AREA)
- Liquid Crystal (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Abstract
Description
本発明の実施例による薄膜トランジスタアレイ基板及びその製造方法では、半導体層とデータ配線を一つの感光膜パターンを利用した写真エッチング工程で形成し、これについて図面を参照して詳細に説明する。
図1は、本発明の第1実施例による液晶表示装置用薄膜トランジスタ基板の配置図であり、図2乃至図4は、図1に示した薄膜トランジスタアレイ基板のII−II´、III−III´及びIV−IV´線による各々の断面図である。
一方、半導体パターン152は、薄膜トランジスタのチャンネル部(C)を除けば、データ配線171、173、175、179、第2静電気保護用配線174、178、及び抵抗性接触層パターン163、165と同一な模様をしている。具体的には、薄膜トランジスタのチャンネル部(C)でデータ線部171、179、173、特にソース電極173とドレーン電極175とが分離されており、データ線抵抗性接触層163とドレーン電極用抵抗性接触層パターン165も分離されているが、薄膜トランジスタ用半導体パターン152はここで切れずに連結されて、薄膜トランジスタのチャンネルを生成する。
まず、図5A乃至5Dに図示したように、絶縁基板110の上部に、モリブデンもしくはモリブデン合金又はクロムなどの下部膜201と、アルミニウム又はアルミニウム合金などの上部膜202とを順に積層し、マスクを利用した写真エッチング工程で上部膜202と下部膜201を共にパターニングして、ゲート線121、ゲート電極123、及びゲートパッド125を含むゲート配線と、ゲート短絡線128及び静電気保護用連結線124を含む第1静電気保護用配線と、維持電極線131及び維持電極133を含む維持配線とをテーパ構造に形成する。
96 静電気保護用連結パターン
97 補助データパッド
110 絶縁基板
111 データ線
121 ゲート線
123 ゲート電極
125 ゲートパッド
133 維持電極
140 ゲート絶縁膜
150 半導体層
152 半導体パターン
158 エッチング補助用パターン
160 中間層
163 抵抗性接触層パターン
165 中間層パターン
168 ソース/ドレーン抵抗性接触層パターン
170 導電体層
173 ソース電極
174 静電気保護用連結線
175 ドレーン電極
178 データ短絡線
179 データパッド
180 保護膜
182、184、185、186、189 接触孔
190 画素電極
201、701 下部膜
202、702 上部膜
212、214 感光膜パターン
Claims (12)
- 絶縁基板と、
前記絶縁基板上に形成されており、ゲート線、及び前記ゲート線に連結されているゲート電極を含むゲート配線と、
前記ゲート配線を覆うゲート絶縁膜と、
前記ゲート絶縁膜上部に形成されている半導体層と、
前記半導体層の上部に形成されており、前記ゲート線と交差するデータ線、前記データ線に連結されているソース電極、及び前記ゲート電極をに対して前記ソース電極と対向するドレーン電極を含むデータ配線と、
前記ドレーン電極に連結されている画素電極と、及び
前記ゲート線と前記データ線とが交差して定義する領域の外部に位置するエッチング補助用パターンとを含む薄膜トランジスタアレイ基板。 - 前記データ配線は、クロム又はモリブデンもしくはモリブデン合金の下部膜と、アルミニウム又はアルミニウム合金の上部膜とを含む、請求項1に記載の薄膜トランジスタアレイ基板。
- 前記データ配線と前記画素電極との間に形成されている保護膜をさらに含む、請求項2に記載の薄膜トランジスタアレイ基板。
- 前記半導体層は、前記データ線及びドレーン電極の間のチャンネル部を除いた前記データ配線と同一な模様を有する、請求項3に記載の薄膜トランジスタアレイ基板。
- 基板上にゲート線及びゲート電極を含むゲート配線を形成する段階と、
前記基板上にゲート絶縁膜を積層する段階と、
前記ゲート絶縁膜の上部に半導体パターン及びエッチング補助用パターンを形成する段階と、
前記半導体パターン及び前記エッチング補助用パターンの上部に、各々ソース/ドレーン用導電体パターン及びエッチング補助層を形成する段階と、
前記エッチング補助層を除去しながら前記ソース/ドレーン用導電体パターンの一部をエッチングして、データ線と互いに分離されているソース電極及びドレーン電極とを含むデータ配線を形成する段階と、及び
前記ドレーン電極に連結される画素電極を形成する段階とを含む薄膜トランジスタアレイ基板の製造方法。 - 前記ソース及びドレーン電極の分離は感光膜パターンを利用した写真エッチング工程によって行われ、前記感光膜パターンは、エッチング補助部に位置し、第1厚さを有する第1部分と、前記第1厚さより厚い厚さを有する第2部分、及び前記第1及び第2部分を除いた部分に位置し、第1厚さより薄い第3部分を含む、請求項5に記載の薄膜トランジスタ基板の製造方法。
- 前記写真エッチング工程に用いられるマスクは、光が一部だけ透過できる第1部分と、光が完全に透過できる第2部分、及び光が完全にブロックされる第3部分とを含み、前記感光膜パターンは陽性感光膜であり、前記マスクの第1、第2、第3の部分は、露光過程で前記感光膜パターンの第1、第2、第3部分に各々対応するように整列される、請求項6に記載の薄膜トランジスタ基板の製造方法。
- 前記データ配線と前記半導体パターンとの間に接触層パターンを形成する段階をさらに含み、
前記データ配線、前記接触層パターン、前記半導体パターン、及び前記エッチング補助用パターンを一つのマスクを使用して形成する、請求項6に記載の薄膜トランジスタ基板の製造方法。 - 前記ゲート絶縁膜、前記半導体パターン、前記接触層パターン、及び前記データ配線の形成段階は、
前記ゲート絶縁膜、半導体層、接触層、及び導電層を蒸着する段階と、
前記導電層上に感光膜を塗布する段階と、
前記感光膜を前記マスクを通して露光する段階と、
前記感光膜を現像し、前記第2部分が前記データ配線の上部に位置するように前記感光膜パターンを形成する段階と、
前記第3部分の下の前記導電層と、その導電層下部の接触層及び半導体層と、前記第1部分と、その第1部分下の前記導電層及び接触層と、そして前記第2部分の一部の厚さをエッチングして、前記導電層、前記接触層、前記半導体層から各々形成された前記データ配線、前記接触層パターン、前記半導体パターンを形成する段階と、
前記感光膜パターンを除去する段階とを含む、請求項8に記載の薄膜トランジスタ基板の製造方法。 - 前記データ配線、前記接触層パターン、前記半導体パターン、前記エッチング補助用パターンの形成段階は、
前記第3部分の下の前記導電層を湿式又は乾式エッチングして、前記ソース/ドレーン用導電体パターン及び前記エッチング補助層を形成する段階と、
前記第3部分の下の接触層及びその下の前記半導体層をエッチングして、前記第1及び第2部分の下に前記半導体パターン及び前記エッチング補助用パターンを完成する段階と、
前記ソース/ドレーン用導電体パターン、及び前記エッチング補助層をエッチングして除去することにより、前記データ配線と前記接触層パターンを完成する段階とを含む、請求項9に記載の薄膜トランジスタ基板の製造方法。 - 前記データ配線は、クロム又はモリブデンもしくはモリブデン合金の下部膜と、アルミニウム又はアルミニウム合金の上部膜とで形成する、請求項10に記載の薄膜トランジスタアレイ基板の製造方法。
- 前記上部膜と前記下部膜は湿式エッチングでパターニングする、請求項11に記載の薄膜トランジスタアレイ基板の製造方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020020062409A KR100878242B1 (ko) | 2002-10-14 | 2002-10-14 | 박막 트랜지스터 어레이 기판 및 그 제조 방법 |
PCT/KR2003/000146 WO2004036303A1 (en) | 2002-10-14 | 2003-01-23 | A thin film translator array panel and a method for manufacturing the panel |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006503435A true JP2006503435A (ja) | 2006-01-26 |
JP4373919B2 JP4373919B2 (ja) | 2009-11-25 |
Family
ID=36932424
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004545011A Expired - Fee Related JP4373919B2 (ja) | 2002-10-14 | 2003-01-23 | 薄膜トランジスタアレイ基板及びその製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US7605416B2 (ja) |
JP (1) | JP4373919B2 (ja) |
KR (1) | KR100878242B1 (ja) |
AU (1) | AU2003206173A1 (ja) |
WO (1) | WO2004036303A1 (ja) |
Families Citing this family (10)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
CN1139837C (zh) * | 1998-10-01 | 2004-02-25 | 三星电子株式会社 | 液晶显示器用薄膜晶体管阵列基板及其制造方法 |
KR101087398B1 (ko) * | 2004-06-30 | 2011-11-25 | 엘지디스플레이 주식회사 | 액정표시장치의 패드 구조 및 그 제조방법 |
WO2007097078A1 (ja) * | 2006-02-24 | 2007-08-30 | Sharp Kabushiki Kaisha | アクティブマトリクス基板、表示装置、テレビジョン受像機 |
KR101587936B1 (ko) * | 2009-10-26 | 2016-01-25 | 삼성디스플레이 주식회사 | 표시 장치용 모기판 및 이의 제조 방법 |
TWI467673B (zh) * | 2011-06-09 | 2015-01-01 | Chunghwa Picture Tubes Ltd | 配線裝置與顯示器 |
TWI460516B (zh) * | 2012-10-23 | 2014-11-11 | Au Optronics Corp | 畫素結構及其製作方法 |
CN103928453B (zh) * | 2013-01-11 | 2016-09-28 | 北京京东方光电科技有限公司 | 一种阵列基板及其制造方法 |
CN104951594B (zh) * | 2015-05-28 | 2023-07-21 | 格科微电子(上海)有限公司 | 集成电路的布线方法以及集成电路结构 |
CN107706196B (zh) * | 2017-09-28 | 2021-05-25 | 京东方科技集团股份有限公司 | 一种阵列基板及其制备方法、显示装置 |
WO2022082636A1 (zh) * | 2020-10-22 | 2022-04-28 | 京东方科技集团股份有限公司 | 显示背板及其制造方法、显示面板及其制造方法 |
Family Cites Families (13)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4862237A (en) * | 1983-01-10 | 1989-08-29 | Seiko Epson Corporation | Solid state image sensor |
JPH03148636A (ja) * | 1989-11-06 | 1991-06-25 | Toshiba Corp | アクティブマトリクス型液晶表示素子の製造方法 |
KR100213191B1 (ko) | 1995-12-30 | 1999-08-02 | 윤종용 | 박막트랜지스터-액정표시장치 및 그 제조방법 |
KR100271037B1 (ko) * | 1997-09-05 | 2000-11-01 | 구본준, 론 위라하디락사 | 액정 표시 장치의 구조 및 그 액정 표시 장치의 제조 방법(liquid crystal display device and the method for manufacturing the same) |
KR100312259B1 (ko) * | 1999-02-05 | 2001-11-03 | 구본준, 론 위라하디락사 | 액정표시장치의 불량패턴 제거방법 및 액정표시장치 구조 |
KR100312757B1 (ko) * | 1999-02-08 | 2001-11-03 | 윤종용 | 박막 트랜지스터 기판의 제조 방법 및 박막의 사진 식각 방법 |
KR100537879B1 (ko) | 1999-04-01 | 2005-12-20 | 삼성전자주식회사 | 박막 트랜지스터의 제조 방법 및 이를 포함하는 액정 표시 장치용 기판의 제조 방법 |
KR100333983B1 (ko) * | 1999-05-13 | 2002-04-26 | 윤종용 | 광시야각 액정 표시 장치용 박막 트랜지스터 어레이 기판 및그의 제조 방법 |
JP4102912B2 (ja) | 1999-11-24 | 2008-06-18 | カシオ計算機株式会社 | アクティブ型液晶表示パネル |
KR100590755B1 (ko) * | 2000-01-20 | 2006-06-15 | 삼성전자주식회사 | 액정 표시 장치용 박막 트랜지스터 기판 및 그의 제조 방법 |
KR100646790B1 (ko) | 2000-07-14 | 2006-11-17 | 삼성전자주식회사 | 박막 트랜지스터 기판 및 그 제조 방법 |
KR100796746B1 (ko) * | 2001-03-13 | 2008-01-22 | 삼성전자주식회사 | 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법 |
JP4398601B2 (ja) * | 2001-05-18 | 2010-01-13 | エーユー オプトロニクス コーポレイション | 薄膜トランジスタ・アレイ基板、薄膜トランジスタ・アレイ基板の製造方法および表示装置 |
-
2002
- 2002-10-14 KR KR1020020062409A patent/KR100878242B1/ko not_active IP Right Cessation
-
2003
- 2003-01-23 AU AU2003206173A patent/AU2003206173A1/en not_active Abandoned
- 2003-01-23 JP JP2004545011A patent/JP4373919B2/ja not_active Expired - Fee Related
- 2003-01-23 WO PCT/KR2003/000146 patent/WO2004036303A1/en active Application Filing
- 2003-01-23 US US10/531,442 patent/US7605416B2/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
US20060194368A1 (en) | 2006-08-31 |
KR20040033354A (ko) | 2004-04-28 |
JP4373919B2 (ja) | 2009-11-25 |
US7605416B2 (en) | 2009-10-20 |
WO2004036303A1 (en) | 2004-04-29 |
AU2003206173A1 (en) | 2004-05-04 |
KR100878242B1 (ko) | 2009-01-13 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP4373789B2 (ja) | 配線構造とこれを利用する薄膜トランジスタ基板及びその製造方法 | |
JP4544860B2 (ja) | 半導体素子の接触部の製造方法、並びにこれを含む液晶表示装置用薄膜トランジスタアレイ基板の製造方法 | |
JP4662700B2 (ja) | 薄膜トランジスタアレイ基板及びその製造方法 | |
US7666697B2 (en) | Thin film transistor substrate and method of manufacturing the same | |
JP2000180898A (ja) | 液晶表示装置用薄膜トランジスタ基板及びその製造方法 | |
JP2004311931A (ja) | 薄膜トランジスタアレイ基板及びその製造方法 | |
KR20000033047A (ko) | 박막트랜지스터의제조방법 | |
JP4632617B2 (ja) | 液晶表示装置用薄膜トランジスタ基板及びその製造方法 | |
JP4373919B2 (ja) | 薄膜トランジスタアレイ基板及びその製造方法 | |
JP2005506712A (ja) | 配線用エッチング液とこれを利用した配線の製造方法及びこれを利用した薄膜トランジスタアレイ基板の製造方法 | |
KR100783702B1 (ko) | 박막 트랜지스터 기판 및 그 제조 방법 | |
KR20050028531A (ko) | 박막 트랜지스터 기판 및 그 제조 방법 | |
KR20010010117A (ko) | 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법 | |
KR100590755B1 (ko) | 액정 표시 장치용 박막 트랜지스터 기판 및 그의 제조 방법 | |
KR100686236B1 (ko) | 박막 트랜지스터 기판 및 그의 제조 방법 | |
KR100796746B1 (ko) | 액정 표시 장치용 박막 트랜지스터 기판의 제조 방법 | |
KR100870009B1 (ko) | 배선의 접촉부 및 그 제조 방법과 이를 포함하는 박막트랜지스터 어레이 기판 및 그 제조 방법 | |
KR100695295B1 (ko) | 배선 구조, 이를 이용한 박막 트랜지스터 기판 및 그 제조방법 | |
KR100895309B1 (ko) | 박막 트랜지스터 어레이 기판 및 그의 제조 방법 | |
KR100670050B1 (ko) | 액정 표시 장치용 박막 트랜지스터 기판 및 그의 제조 방법 | |
KR100848101B1 (ko) | 박막 트랜지스터 어레이 기판 및 그의 제조 방법 | |
KR20060098018A (ko) | Tft기판의 제조 방법 | |
KR100878263B1 (ko) | 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법 | |
KR100729776B1 (ko) | 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법 | |
KR100783696B1 (ko) | 액정 표시 장치용 박막 트랜지스터 기판 및 그 제조 방법 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20080530 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20090421 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20090717 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20090811 |
|
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20090904 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20120911 Year of fee payment: 3 |
|
R150 | Certificate of patent or registration of utility model |
Free format text: JAPANESE INTERMEDIATE CODE: R150 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130911 Year of fee payment: 4 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130911 Year of fee payment: 4 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20130911 Year of fee payment: 4 |
|
R371 | Transfer withdrawn |
Free format text: JAPANESE INTERMEDIATE CODE: R371 |
|
S111 | Request for change of ownership or part of ownership |
Free format text: JAPANESE INTERMEDIATE CODE: R313111 |
|
R350 | Written notification of registration of transfer |
Free format text: JAPANESE INTERMEDIATE CODE: R350 |
|
LAPS | Cancellation because of no payment of annual fees |