JP2006024943A5 - - Google Patents

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Publication number
JP2006024943A5
JP2006024943A5 JP2005199284A JP2005199284A JP2006024943A5 JP 2006024943 A5 JP2006024943 A5 JP 2006024943A5 JP 2005199284 A JP2005199284 A JP 2005199284A JP 2005199284 A JP2005199284 A JP 2005199284A JP 2006024943 A5 JP2006024943 A5 JP 2006024943A5
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JP
Japan
Prior art keywords
atomic percent
iridium
metals
region
conductive
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Application number
JP2005199284A
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English (en)
Japanese (ja)
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JP2006024943A (ja
JP4965091B2 (ja
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Priority claimed from US10/887,087 external-priority patent/US7119018B2/en
Application filed filed Critical
Publication of JP2006024943A publication Critical patent/JP2006024943A/ja
Publication of JP2006024943A5 publication Critical patent/JP2006024943A5/ja
Application granted granted Critical
Publication of JP4965091B2 publication Critical patent/JP4965091B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2005199284A 2004-07-09 2005-07-07 導電性材料、半導体構造及び導電性材料を製造する方法 Expired - Fee Related JP4965091B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/887,087 US7119018B2 (en) 2004-07-09 2004-07-09 Copper conductor
US10/887,087 2004-07-09

Publications (3)

Publication Number Publication Date
JP2006024943A JP2006024943A (ja) 2006-01-26
JP2006024943A5 true JP2006024943A5 (enExample) 2008-08-14
JP4965091B2 JP4965091B2 (ja) 2012-07-04

Family

ID=35540173

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005199284A Expired - Fee Related JP4965091B2 (ja) 2004-07-09 2005-07-07 導電性材料、半導体構造及び導電性材料を製造する方法

Country Status (4)

Country Link
US (2) US7119018B2 (enExample)
JP (1) JP4965091B2 (enExample)
CN (1) CN100375280C (enExample)
TW (1) TWI373095B (enExample)

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US7341947B2 (en) * 2002-03-29 2008-03-11 Micron Technology, Inc. Methods of forming metal-containing films over surfaces of semiconductor substrates
US6653236B2 (en) * 2002-03-29 2003-11-25 Micron Technology, Inc. Methods of forming metal-containing films over surfaces of semiconductor substrates; and semiconductor constructions
US20060163731A1 (en) * 2005-01-21 2006-07-27 Keishi Inoue Dual damascene interconnections employing a copper alloy at the copper/barrier interface
US7666787B2 (en) * 2006-02-21 2010-02-23 International Business Machines Corporation Grain growth promotion layer for semiconductor interconnect structures
US7528066B2 (en) * 2006-03-01 2009-05-05 International Business Machines Corporation Structure and method for metal integration
US20070269586A1 (en) * 2006-05-17 2007-11-22 3M Innovative Properties Company Method of making light emitting device with silicon-containing composition
US7566653B2 (en) * 2007-07-31 2009-07-28 International Business Machines Corporation Interconnect structure with grain growth promotion layer and method for forming the same
US8168532B2 (en) 2007-11-14 2012-05-01 Fujitsu Limited Method of manufacturing a multilayer interconnection structure in a semiconductor device
KR100924865B1 (ko) * 2007-12-27 2009-11-02 주식회사 동부하이텍 반도체 소자의 금속배선 형성방법
US7651943B2 (en) * 2008-02-18 2010-01-26 Taiwan Semicondcutor Manufacturing Company, Ltd. Forming diffusion barriers by annealing copper alloy layers
EP2345069B1 (en) * 2008-10-27 2016-02-17 Nxp B.V. Method of manufacturing a biocompatible electrode
JP2011009439A (ja) * 2009-06-25 2011-01-13 Renesas Electronics Corp 半導体装置の製造方法および半導体装置
US8336204B2 (en) 2009-07-27 2012-12-25 International Business Machines Corporation Formation of alloy liner by reaction of diffusion barrier and seed layer for interconnect application
US8409960B2 (en) 2011-04-08 2013-04-02 Micron Technology, Inc. Methods of patterning platinum-containing material
US9418937B2 (en) 2011-12-09 2016-08-16 Infineon Technologies Ag Integrated circuit and method of forming an integrated circuit
US8736055B2 (en) 2012-03-01 2014-05-27 Lam Research Corporation Methods and layers for metallization
CN102891104B (zh) * 2012-09-17 2015-07-29 上海华力微电子有限公司 一种提高Cu CMP效率的方法
US8673779B1 (en) * 2013-02-27 2014-03-18 Lam Research Corporation Interconnect with self-formed barrier
KR102731586B1 (ko) * 2019-10-21 2024-11-15 어플라이드 머티어리얼스, 인코포레이티드 층들을 증착하는 방법
CN113363152A (zh) * 2020-03-06 2021-09-07 长鑫存储技术有限公司 半导体结构及其制作方法
TWI796607B (zh) * 2020-10-22 2023-03-21 龍華科技大學 銅銠鍍層的製備方法

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JP3512225B2 (ja) 1994-02-28 2004-03-29 株式会社日立製作所 多層配線基板の製造方法
US5904665A (en) * 1995-03-07 1999-05-18 Vance Products Inc. Automated prolonged slow release intrauterine insemination using self retaining intrauterine insemination catheter
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JP3409831B2 (ja) * 1997-02-14 2003-05-26 日本電信電話株式会社 半導体装置の配線構造の製造方法
US5801100A (en) 1997-03-07 1998-09-01 Industrial Technology Research Institute Electroless copper plating method for forming integrated circuit structures
US5969422A (en) 1997-05-15 1999-10-19 Advanced Micro Devices, Inc. Plated copper interconnect structure
US5893752A (en) 1997-12-22 1999-04-13 Motorola, Inc. Process for forming a semiconductor device
US5904565A (en) 1997-07-17 1999-05-18 Sharp Microelectronics Technology, Inc. Low resistance contact between integrated circuit metal levels and method for same
JPH11288936A (ja) * 1998-04-01 1999-10-19 Ricoh Co Ltd 半導体装置の製造方法
US5968333A (en) 1998-04-07 1999-10-19 Advanced Micro Devices, Inc. Method of electroplating a copper or copper alloy interconnect
US6181012B1 (en) 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
US6461675B2 (en) * 1998-07-10 2002-10-08 Cvc Products, Inc. Method for forming a copper film on a substrate
US6294836B1 (en) * 1998-12-22 2001-09-25 Cvc Products Inc. Semiconductor chip interconnect barrier material and fabrication method
JP4221100B2 (ja) * 1999-01-13 2009-02-12 エルピーダメモリ株式会社 半導体装置
JP2002075995A (ja) * 2000-08-24 2002-03-15 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
US6599666B2 (en) * 2001-03-15 2003-07-29 Micron Technology, Inc. Multi-layer, attenuated phase-shifting mask
US7008872B2 (en) * 2002-05-03 2006-03-07 Intel Corporation Use of conductive electrolessly deposited etch stop layers, liner layers and via plugs in interconnect structures
US20040108217A1 (en) * 2002-12-05 2004-06-10 Dubin Valery M. Methods for forming copper interconnect structures by co-plating of noble metals and structures formed thereby
US6974768B1 (en) * 2003-01-15 2005-12-13 Novellus Systems, Inc. Methods of providing an adhesion layer for adhesion of barrier and/or seed layers to dielectric films

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