JP2006013484A5 - - Google Patents

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Publication number
JP2006013484A5
JP2006013484A5 JP2005163977A JP2005163977A JP2006013484A5 JP 2006013484 A5 JP2006013484 A5 JP 2006013484A5 JP 2005163977 A JP2005163977 A JP 2005163977A JP 2005163977 A JP2005163977 A JP 2005163977A JP 2006013484 A5 JP2006013484 A5 JP 2006013484A5
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JP
Japan
Prior art keywords
layer
forming
cavity
reflective
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2005163977A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006013484A (ja
JP4869634B2 (ja
Filing date
Publication date
Priority claimed from US10/877,615 external-priority patent/US7045827B2/en
Application filed filed Critical
Publication of JP2006013484A publication Critical patent/JP2006013484A/ja
Publication of JP2006013484A5 publication Critical patent/JP2006013484A5/ja
Application granted granted Critical
Publication of JP4869634B2 publication Critical patent/JP4869634B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

JP2005163977A 2004-06-24 2005-06-03 ウエハスケール・パッケージ用のリッドおよびその形成方法 Expired - Fee Related JP4869634B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US877615 2001-06-08
US10/877,615 US7045827B2 (en) 2004-06-24 2004-06-24 Lids for wafer-scale optoelectronic packages

Publications (3)

Publication Number Publication Date
JP2006013484A JP2006013484A (ja) 2006-01-12
JP2006013484A5 true JP2006013484A5 (enExample) 2008-07-17
JP4869634B2 JP4869634B2 (ja) 2012-02-08

Family

ID=35504672

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005163977A Expired - Fee Related JP4869634B2 (ja) 2004-06-24 2005-06-03 ウエハスケール・パッケージ用のリッドおよびその形成方法

Country Status (4)

Country Link
US (3) US7045827B2 (enExample)
JP (1) JP4869634B2 (enExample)
CN (1) CN1713468B (enExample)
DE (1) DE102005010926B4 (enExample)

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7750356B2 (en) * 2005-05-04 2010-07-06 Avago Technologies Fiber Ip (Singapore) Pte. Ltd. Silicon optical package with 45 degree turning mirror
CN100559559C (zh) * 2007-03-08 2009-11-11 探微科技股份有限公司 制作光学元件封盖的方法
JP2009032843A (ja) * 2007-07-26 2009-02-12 Nec Electronics Corp 半導体装置とその製造方法
US20100032702A1 (en) * 2008-08-11 2010-02-11 E. I. Du Pont De Nemours And Company Light-Emitting Diode Housing Comprising Fluoropolymer
CN101599522B (zh) * 2009-06-30 2011-05-25 厦门市三安光电科技有限公司 一种采用绝缘介质阻挡层的垂直发光二极管及其制备方法
JP2011222675A (ja) * 2010-04-07 2011-11-04 Mitsubishi Electric Corp 半導体装置及びその製造方法
US8582618B2 (en) 2011-01-18 2013-11-12 Avago Technologies General Ip (Singapore) Pte. Ltd. Surface-emitting semiconductor laser device in which an edge-emitting laser is integrated with a diffractive or refractive lens on the semiconductor laser device
US8315287B1 (en) 2011-05-03 2012-11-20 Avago Technologies Fiber Ip (Singapore) Pte. Ltd Surface-emitting semiconductor laser device in which an edge-emitting laser is integrated with a diffractive lens, and a method for making the device
CN104094143B (zh) * 2011-12-22 2018-01-12 3M创新有限公司 具有传感器的光学装置及其制造和使用方法
DE102012217793A1 (de) * 2012-09-28 2014-04-03 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Herstellungsverfahren
JP2014158157A (ja) * 2013-02-15 2014-08-28 Asahi Kasei Electronics Co Ltd 圧電デバイス
NO2944700T3 (enExample) * 2013-07-11 2018-03-17
US9793237B2 (en) 2015-10-19 2017-10-17 Qorvo Us, Inc. Hollow-cavity flip-chip package with reinforced interconnects and process for making the same
US9799637B2 (en) * 2016-02-12 2017-10-24 Qorvo Us, Inc. Semiconductor package with lid having lid conductive structure
EP3385762A1 (en) * 2017-04-03 2018-10-10 Indigo Diabetes N.V. Optical assembly with hermetically sealed cover cap
US10242967B2 (en) 2017-05-16 2019-03-26 Raytheon Company Die encapsulation in oxide bonded wafer stack
JP6970336B2 (ja) * 2017-08-04 2021-11-24 日亜化学工業株式会社 光源装置

Family Cites Families (20)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3657029A (en) * 1968-12-31 1972-04-18 Texas Instruments Inc Platinum thin-film metallization method
US4773972A (en) * 1986-10-30 1988-09-27 Ford Motor Company Method of making silicon capacitive pressure sensor with glass layer between silicon wafers
US4791075A (en) * 1987-10-05 1988-12-13 Motorola, Inc. Process for making a hermetic low cost pin grid array package
JPH01264285A (ja) * 1988-04-15 1989-10-20 Omron Tateisi Electron Co 面発光型半導体レーザ
US5336928A (en) * 1992-09-18 1994-08-09 General Electric Company Hermetically sealed packaged electronic system
US5500540A (en) * 1994-04-15 1996-03-19 Photonics Research Incorporated Wafer scale optoelectronic package
DE4440935A1 (de) * 1994-11-17 1996-05-23 Ant Nachrichtentech Optische Sende- und Empfangseinrichtung
EP0899781A3 (en) * 1997-08-28 2000-03-08 Lucent Technologies Inc. Corrosion protection in the fabrication of optoelectronic assemblies
US6062461A (en) * 1998-06-03 2000-05-16 Delphi Technologies, Inc. Process for bonding micromachined wafers using solder
JP2000019357A (ja) * 1998-06-30 2000-01-21 Toshiba Corp 光アレイモジュール及び反射鏡アレイ
JP2000114655A (ja) * 1998-09-30 2000-04-21 Toshiba Corp サブマウントミラー方式面型レーザ
DE19845484C2 (de) * 1998-10-02 2002-09-26 Infineon Technologies Ag Mikrooptischer Baustein und Verfahren zu seiner Herstellung
US6818464B2 (en) * 2001-10-17 2004-11-16 Hymite A/S Double-sided etching technique for providing a semiconductor structure with through-holes, and a feed-through metalization process for sealing the through-holes
TW560018B (en) * 2001-10-30 2003-11-01 Asia Pacific Microsystems Inc A wafer level packaged structure and method for manufacturing the same
US7172911B2 (en) * 2002-02-14 2007-02-06 Silex Microsystems Ab Deflectable microstructure and method of manufacturing the same through bonding of wafers
US6696645B2 (en) * 2002-05-08 2004-02-24 The Regents Of The University Of Michigan On-wafer packaging for RF-MEMS
EP2937897A3 (en) * 2003-09-15 2016-03-23 Nuvotronics LLC Device package and methods for the fabrication and testing thereof
US20050063648A1 (en) * 2003-09-19 2005-03-24 Wilson Robert Edward Alignment post for optical subassemblies made with cylindrical rods, tubes, spheres, or similar features
US20050063431A1 (en) * 2003-09-19 2005-03-24 Gallup Kendra J. Integrated optics and electronics
US7767493B2 (en) * 2005-06-14 2010-08-03 John Trezza Post & penetration interconnection

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