JP2005519386A - データの不正確な記憶を回避するためのプロダクト及び方法 - Google Patents

データの不正確な記憶を回避するためのプロダクト及び方法 Download PDF

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Publication number
JP2005519386A
JP2005519386A JP2003573532A JP2003573532A JP2005519386A JP 2005519386 A JP2005519386 A JP 2005519386A JP 2003573532 A JP2003573532 A JP 2003573532A JP 2003573532 A JP2003573532 A JP 2003573532A JP 2005519386 A JP2005519386 A JP 2005519386A
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JP
Japan
Prior art keywords
power
processor
product
down signal
state
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2003573532A
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English (en)
Japanese (ja)
Inventor
ウィン,ナイン
ツァイ,ジュン
ジムソン,ジョーゼフ
ケイ ラム,ウェン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Koninklijke Philips NV
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Koninklijke Philips Electronics NV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Koninklijke Philips Electronics NV filed Critical Koninklijke Philips Electronics NV
Publication of JP2005519386A publication Critical patent/JP2005519386A/ja
Withdrawn legal-status Critical Current

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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/30Means for acting in the event of power-supply failure or interruption, e.g. power-supply fluctuations
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/10Programming or data input circuits
    • G11C16/20Initialising; Data preset; Chip identification
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/22Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C16/00Erasable programmable read-only memories
    • G11C16/02Erasable programmable read-only memories electrically programmable
    • G11C16/06Auxiliary circuits, e.g. for writing into memory
    • G11C16/22Safety or protection circuits preventing unauthorised or accidental access to memory cells
    • G11C16/225Preventing erasure, programming or reading when power supply voltages are outside the required ranges
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C5/00Details of stores covered by group G11C11/00
    • G11C5/14Power supply arrangements, e.g. power down, chip selection or deselection, layout of wirings or power grids, or multiple supply levels
    • G11C5/143Detection of memory cassette insertion or removal; Continuity checks of supply or ground lines; Detection of supply variations, interruptions or levels ; Switching between alternative supplies

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Power Engineering (AREA)
  • Computer Security & Cryptography (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Power Sources (AREA)
  • Container Filling Or Packaging Operations (AREA)
  • Supplying Of Containers To The Packaging Station (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Holo Graphy (AREA)
JP2003573532A 2002-03-05 2003-02-17 データの不正確な記憶を回避するためのプロダクト及び方法 Withdrawn JP2005519386A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SG0200041 2002-03-05
PCT/IB2003/000658 WO2003075140A2 (en) 2002-03-05 2003-02-17 Product and method for preventing incorrect storage of data

Publications (1)

Publication Number Publication Date
JP2005519386A true JP2005519386A (ja) 2005-06-30

Family

ID=27786700

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003573532A Withdrawn JP2005519386A (ja) 2002-03-05 2003-02-17 データの不正確な記憶を回避するためのプロダクト及び方法

Country Status (9)

Country Link
US (1) US20050146954A1 (de)
EP (2) EP1481399B1 (de)
JP (1) JP2005519386A (de)
KR (1) KR20040088570A (de)
CN (1) CN1639799A (de)
AT (1) ATE325418T1 (de)
AU (1) AU2003206042A1 (de)
DE (1) DE60305012T2 (de)
WO (1) WO2003075140A2 (de)

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KR100739775B1 (ko) * 2005-12-13 2007-07-13 삼성전자주식회사 전원 제어 장치 및 방법
KR100818802B1 (ko) 2007-01-03 2008-04-02 삼성전자주식회사 파워다운 응답신호를 발생하는 반도체 메모리 장치 및 상기반도체 장치의 파워다운 방법
DE102007008762B4 (de) * 2007-02-22 2016-03-10 Bizerba Gmbh & Co. Kg Steuerungsschaltung
JP4938893B2 (ja) * 2007-08-06 2012-05-23 サンディスク コーポレイション 不揮発性メモリのための改良された書き込み中断機構
US8706243B2 (en) 2009-02-09 2014-04-22 Rainbow Medical Ltd. Retinal prosthesis techniques
US8442641B2 (en) 2010-08-06 2013-05-14 Nano-Retina, Inc. Retinal prosthesis techniques
US8718784B2 (en) 2010-01-14 2014-05-06 Nano-Retina, Inc. Penetrating electrodes for retinal stimulation
US8150526B2 (en) 2009-02-09 2012-04-03 Nano-Retina, Inc. Retinal prosthesis
US8428740B2 (en) 2010-08-06 2013-04-23 Nano-Retina, Inc. Retinal prosthesis techniques
US8571669B2 (en) 2011-02-24 2013-10-29 Nano-Retina, Inc. Retinal prosthesis with efficient processing circuits
US20120297228A1 (en) * 2011-05-20 2012-11-22 Excelitas Technologies Sensonrs, Inc. Data recorder for harsh environments
US9720477B2 (en) 2012-11-21 2017-08-01 Nano-Retina, Inc. Weak power supply operation and control
US10121533B2 (en) 2012-11-21 2018-11-06 Nano-Retina, Inc. Techniques for data retention in memory cells during power interruption
US9370417B2 (en) 2013-03-14 2016-06-21 Nano-Retina, Inc. Foveated retinal prosthesis
US9474902B2 (en) 2013-12-31 2016-10-25 Nano Retina Ltd. Wearable apparatus for delivery of power to a retinal prosthesis
US9331791B2 (en) 2014-01-21 2016-05-03 Nano Retina Ltd. Transfer of power and data
CN112562764A (zh) * 2020-12-15 2021-03-26 上海维宏电子科技股份有限公司 嵌入式系统掉电保护的电路与方法
CN116010437B (zh) * 2023-03-20 2023-12-19 成都佰维存储科技有限公司 设备码写入方法、装置、可读存储介质及电子设备

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US32300A (en) * 1861-05-14 Denis lenain
JPS6120145A (ja) * 1984-07-07 1986-01-28 Iwatsu Electric Co Ltd マイクロプロセツサ動作解析装置
DE3529494A1 (de) * 1985-08-17 1987-02-19 Bosch Gmbh Robert Schaltungsanordnung umfassend einen mikrocomputer und einen mit diesem im datenaustausch stehenden halbleiter-speicher
JPH05342115A (ja) 1992-06-11 1993-12-24 Hitachi Ltd 電源遮断に対するメモリデータ保護装置
US5293424A (en) * 1992-10-14 1994-03-08 Bull Hn Information Systems Inc. Secure memory card
US5371709A (en) * 1993-04-01 1994-12-06 Microchip Technology Incorporated Power management system for serial EEPROM device
JPH0744468A (ja) * 1993-07-29 1995-02-14 Hitachi Ltd 記憶装置
US5812861A (en) * 1995-06-22 1998-09-22 Intel Corporation Override signal for forcing a powerdown of a flash memory
US5768208A (en) * 1996-06-18 1998-06-16 Microchip Technology Incorporated Fail safe non-volatile memory programming system and method therefor
EP0820059B1 (de) * 1996-07-18 2004-01-14 Hitachi, Ltd. Verfahren und Vorrichtung zum Steuern eines Magnetplatten-Speichergeräts und eines Plattenarrays
US5896338A (en) * 1997-04-11 1999-04-20 Intel Corporation Input/output power supply detection scheme for flash memory
JP3763192B2 (ja) * 1997-08-04 2006-04-05 富士電機システムズ株式会社 瞬停電時積算値保存回路
JP3884839B2 (ja) * 1997-10-17 2007-02-21 株式会社ルネサステクノロジ 半導体記憶装置
US6311279B1 (en) * 1998-10-27 2001-10-30 Compaq Computer Corporation Network node with internal battery backup
JP4409104B2 (ja) * 2000-06-08 2010-02-03 株式会社リコー データ通信装置,画像形成装置管理システム,およびその給電制御方法
US7023781B2 (en) * 2000-10-31 2006-04-04 Ricoh Company, Ltd. Optical disk apparatus
US7315951B2 (en) * 2003-10-27 2008-01-01 Nortel Networks Corporation High speed non-volatile electronic memory configuration

Also Published As

Publication number Publication date
US20050146954A1 (en) 2005-07-07
EP1610344A1 (de) 2005-12-28
AU2003206042A1 (en) 2003-09-16
KR20040088570A (ko) 2004-10-16
DE60305012D1 (de) 2006-06-08
CN1639799A (zh) 2005-07-13
EP1481399B1 (de) 2006-05-03
ATE325418T1 (de) 2006-06-15
WO2003075140A2 (en) 2003-09-12
EP1481399A2 (de) 2004-12-01
DE60305012T2 (de) 2007-01-11
WO2003075140A3 (en) 2004-03-25
AU2003206042A8 (en) 2003-09-16

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