JP2005513777A - 多官能性カルボシランを用いる誘電性層の製造方法 - Google Patents

多官能性カルボシランを用いる誘電性層の製造方法 Download PDF

Info

Publication number
JP2005513777A
JP2005513777A JP2003553609A JP2003553609A JP2005513777A JP 2005513777 A JP2005513777 A JP 2005513777A JP 2003553609 A JP2003553609 A JP 2003553609A JP 2003553609 A JP2003553609 A JP 2003553609A JP 2005513777 A JP2005513777 A JP 2005513777A
Authority
JP
Japan
Prior art keywords
dielectric layer
producing
aryl
alkyl
layer according
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2003553609A
Other languages
English (en)
Japanese (ja)
Other versions
JP2005513777A5 (enExample
Inventor
キルヒマイヤー シュテファン
ガイザー デトレフ
クラウス ハラルト
メルカー ウド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bayer AG
Original Assignee
Bayer AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bayer AG filed Critical Bayer AG
Publication of JP2005513777A publication Critical patent/JP2005513777A/ja
Publication of JP2005513777A5 publication Critical patent/JP2005513777A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49866Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
    • H01L23/49894Materials of the insulating layers or coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/532Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body characterised by the materials
    • H01L23/5329Insulating materials
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02126Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02203Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being porous
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02205Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition
    • H01L21/02208Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si
    • H01L21/02214Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H01L21/02216Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates the layer being characterised by the precursor material for deposition the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/0226Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process
    • H01L21/02282Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a deposition process liquid deposition, e.g. spin-coating, sol-gel techniques, spray coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/3011Impedance
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4644Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4673Application methods or materials of intermediate insulating layers not specially adapted to any one of the previous methods of adding a circuit layer
    • H05K3/4676Single layer compositions

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Formation Of Insulating Films (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Silicon Polymers (AREA)
  • Laminated Bodies (AREA)
  • Inorganic Insulating Materials (AREA)
JP2003553609A 2001-12-19 2002-12-06 多官能性カルボシランを用いる誘電性層の製造方法 Pending JP2005513777A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DE10162443A DE10162443A1 (de) 2001-12-19 2001-12-19 Verfahren zur Herstellung von dielektrischen Schichten unter Verwendung multifunktioneller Carbosilane
PCT/EP2002/013834 WO2003052809A1 (de) 2001-12-19 2002-12-06 Verfahren zur herstellung von dielektrischen schichten unter verwendung multifunktioneller carbosilane

Publications (2)

Publication Number Publication Date
JP2005513777A true JP2005513777A (ja) 2005-05-12
JP2005513777A5 JP2005513777A5 (enExample) 2006-01-05

Family

ID=7709842

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003553609A Pending JP2005513777A (ja) 2001-12-19 2002-12-06 多官能性カルボシランを用いる誘電性層の製造方法

Country Status (9)

Country Link
US (1) US7090896B2 (enExample)
EP (1) EP1468446A1 (enExample)
JP (1) JP2005513777A (enExample)
KR (1) KR20040068274A (enExample)
CN (1) CN100336183C (enExample)
AU (1) AU2002366351A1 (enExample)
DE (1) DE10162443A1 (enExample)
TW (1) TWI265964B (enExample)
WO (1) WO2003052809A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7470975B2 (en) 2006-02-22 2008-12-30 Fujitsu Limited Composition for forming insulation film, insulation film for semiconductor device, and fabrication method and semiconductor device thereof

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20040038048A1 (en) * 2000-02-02 2004-02-26 Lg Chemical Ltd. Semiconductor interlayer dielectric material and a semiconductor device using the same
DE102004027857A1 (de) * 2004-06-08 2006-01-05 Siemens Ag Verfahren zum Herstellen eines keramischen Werkstoffs, keramischer Werkstoff und Keramikkörper mit dem keramischen Werkstoff
US7575979B2 (en) * 2004-06-22 2009-08-18 Hewlett-Packard Development Company, L.P. Method to form a film
US7892648B2 (en) * 2005-01-21 2011-02-22 International Business Machines Corporation SiCOH dielectric material with improved toughness and improved Si-C bonding
JP5324734B2 (ja) * 2005-01-21 2013-10-23 インターナショナル・ビジネス・マシーンズ・コーポレーション 誘電体材料とその製造方法
US20080012074A1 (en) * 2006-07-14 2008-01-17 Air Products And Chemicals, Inc. Low Temperature Sol-Gel Silicates As Dielectrics or Planarization Layers For Thin Film Transistors
WO2009150021A2 (en) * 2008-05-26 2009-12-17 Basf Se Method of making porous materials and porous materials prepared thereof
DE102018102454A1 (de) * 2017-07-31 2019-01-31 Taiwan Semiconductor Manufacturing Co., Ltd. Halbleitervorrichtung und Verfahren
US10361137B2 (en) * 2017-07-31 2019-07-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5677410A (en) * 1995-05-16 1997-10-14 Bayer Ag Carbosilane-dendrimers, carbosilane-hybrid materials, methods for manufacturing them and a method for manufacturing coatings from the carbosilane-dendrimers
JPH09143420A (ja) * 1995-09-21 1997-06-03 Asahi Glass Co Ltd 低誘電率樹脂組成物
US6005131A (en) * 1996-01-30 1999-12-21 Bayer Aktiengesellschaft Multi-functional, cyclic organosiloxanes, process for the production thereof and use thereof
DE19603241C1 (de) * 1996-01-30 1997-07-10 Bayer Ag Multifunktionelle, cyclische Organosiloxane, Verfahren zu deren Herstellung und deren Verwendung
US6143855A (en) * 1997-04-21 2000-11-07 Alliedsignal Inc. Organohydridosiloxane resins with high organic content
US6043330A (en) * 1997-04-21 2000-03-28 Alliedsignal Inc. Synthesis of siloxane resins
CA2290455C (en) * 1997-05-23 2007-04-10 Bayer Aktiengesellschaft Organosilane oligomers
US6042994A (en) * 1998-01-20 2000-03-28 Alliedsignal Inc. Nanoporous silica dielectric films modified by electron beam exposure and having low dielectric constant and low water content
US6068884A (en) * 1998-04-28 2000-05-30 Silcon Valley Group Thermal Systems, Llc Method of making low κ dielectric inorganic/organic hybrid films
US6054206A (en) * 1998-06-22 2000-04-25 Novellus Systems, Inc. Chemical vapor deposition of low density silicon dioxide films
US5906859A (en) * 1998-07-10 1999-05-25 Dow Corning Corporation Method for producing low dielectric coatings from hydrogen silsequioxane resin
US6225238B1 (en) * 1999-06-07 2001-05-01 Allied Signal Inc Low dielectric constant polyorganosilicon coatings generated from polycarbosilanes
JP3571004B2 (ja) * 2000-04-28 2004-09-29 エルジー ケム インベストメント エルティーディー. 半導体素子用超低誘電多孔性配線層間絶縁膜およびその製造方法ならびにそれを用いた半導体素子
EP1209036A3 (en) * 2000-11-28 2003-11-19 Sumitomo Wiring Systems, Ltd. Electrical junction box for a vehicle
JP4246640B2 (ja) * 2002-03-04 2009-04-02 東京エレクトロン株式会社 ウェハ処理において低誘電率材料を不動態化する方法
JP4139710B2 (ja) * 2003-03-10 2008-08-27 信越化学工業株式会社 多孔質膜形成用組成物、多孔質膜の製造方法、多孔質膜、層間絶縁膜、及び半導体装置
KR100507967B1 (ko) * 2003-07-01 2005-08-10 삼성전자주식회사 실록산계 수지 및 이를 이용한 반도체 층간 절연막

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7470975B2 (en) 2006-02-22 2008-12-30 Fujitsu Limited Composition for forming insulation film, insulation film for semiconductor device, and fabrication method and semiconductor device thereof

Also Published As

Publication number Publication date
TW200305618A (en) 2003-11-01
US7090896B2 (en) 2006-08-15
HK1076918A1 (zh) 2006-01-27
WO2003052809A1 (de) 2003-06-26
DE10162443A1 (de) 2003-07-03
TWI265964B (en) 2006-11-11
KR20040068274A (ko) 2004-07-30
AU2002366351A1 (en) 2003-06-30
US20030181537A1 (en) 2003-09-25
CN1605118A (zh) 2005-04-06
EP1468446A1 (de) 2004-10-20
CN100336183C (zh) 2007-09-05

Similar Documents

Publication Publication Date Title
KR100334150B1 (ko) 절연 박막 제조용 알콕시실란/유기 중합체 조성물 및 이의용도
JP3571004B2 (ja) 半導体素子用超低誘電多孔性配線層間絶縁膜およびその製造方法ならびにそれを用いた半導体素子
JP2003501518A (ja) ポリカルボシランから生じた低誘電率ポリオルガノシリコンコーティング
EP1537183B1 (en) Coating composition for insulating film production, preparation method of insulation film by using the same, insulation film for semi-conductor device prepared therefrom, and semi-conductor device comprising the same
EP0677872A1 (en) Method of forming Si-O containing coatings
JP4142643B2 (ja) 有機シリケート重合体およびこれを含む絶縁膜
JP2006500769A (ja) 低k材料用の中間層接着促進剤
KR100515583B1 (ko) 유기실리케이트 중합체 및 이를 함유하는 절연막
JP2005513777A (ja) 多官能性カルボシランを用いる誘電性層の製造方法
KR100451044B1 (ko) 유기실리케이트 중합체의 제조방법, 및 이를 이용한절연막의 제조방법
US6764718B2 (en) Method for forming thin film from electrically insulating resin composition
JP3919862B2 (ja) 低誘電率シリカ質膜の形成方法及び同シリカ質膜
JP3485425B2 (ja) 低誘電率絶縁膜の形成方法及びこの膜を用いた半導体装置
JP2002201415A (ja) シリカ系被膜形成用塗布液、シリカ系被膜の製造方法及び半導体装置
JPH0950993A (ja) 絶縁膜形成方法と半導体装置
JP2001262062A (ja) シリカ系被膜形成用塗布液、シリカ系被膜の製造法、シリカ系被膜、これを用いた半導体素子及び多層配線板
KR100508901B1 (ko) 유기실리케이트 중합체 및 이를 함유하는 절연막
JPH11111712A (ja) 低誘電率絶縁膜とその形成方法及びこの膜を用いた半導体装置
HK1076918B (en) Method for production of dielectric layers using polyfunctional carbosilanes
JP3881420B2 (ja) 低誘電率材料、層間絶縁膜及びic基板
KR100508900B1 (ko) 유기실리케이트 중합체 및 이를 함유하는 절연막
KR100515584B1 (ko) 유기실리케이트 중합체 및 이를 함유하는 절연막
KR100508902B1 (ko) 유기실리케이트 중합체 및 이를 함유하는 절연막
JPH05267479A (ja) 半導体装置の製造方法
KR20000033206A (ko) 기상 실리레이션 공정을 이용한 저유전성 박막 형성방법

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20051007

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20051007

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20060605

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20080319

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20080617

A711 Notification of change in applicant

Free format text: JAPANESE INTERMEDIATE CODE: A711

Effective date: 20080716

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20081114

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20090409