JP2005347488A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP2005347488A JP2005347488A JP2004164857A JP2004164857A JP2005347488A JP 2005347488 A JP2005347488 A JP 2005347488A JP 2004164857 A JP2004164857 A JP 2004164857A JP 2004164857 A JP2004164857 A JP 2004164857A JP 2005347488 A JP2005347488 A JP 2005347488A
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- power supply
- semiconductor element
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 200
- 239000004020 conductor Substances 0.000 claims abstract description 63
- 239000000758 substrate Substances 0.000 claims abstract description 30
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 14
- 229910052709 silver Inorganic materials 0.000 claims description 14
- 239000004332 silver Substances 0.000 claims description 14
- 239000010931 gold Substances 0.000 claims description 7
- 239000010949 copper Substances 0.000 claims description 6
- 238000007747 plating Methods 0.000 claims description 5
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 4
- 229910052802 copper Inorganic materials 0.000 claims description 4
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 claims description 4
- 229910052737 gold Inorganic materials 0.000 claims description 4
- 229910052751 metal Inorganic materials 0.000 claims description 3
- 239000002184 metal Substances 0.000 claims description 3
- 230000002093 peripheral effect Effects 0.000 abstract description 11
- 238000000034 method Methods 0.000 description 15
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- 229910052782 aluminium Inorganic materials 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000007257 malfunction Effects 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
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Abstract
【解決手段】 半導体装置は、中央に設けた回路部が、外部からの電源を供給するための電源用電極と電源線により接続された半導体素子と、半導体素子を搭載すると共に、半導体素子を取り囲む領域に配設した第1の接続端子が電源用電極と電気的に接合された基板と、回路部の中央に配置された電源線上に形成された第1の開口部と、回路部の外周部に配置された電源線上に形成された第2の開口部と、基板上の半導体素子を取り囲む領域に配設した第2の接続端子と電気的に接合されると共に、第1の開口部における電源線と第2の開口部における電源線とを接続する導体層とを備える。
【選択図】 図4
Description
2 電極パッド
4 電源線
5 コア部
7 ボンディングリード
8 ワイヤ
10 従来の半導体装置
11、11a、11b 半導体素子
12 電極パッド
12a、12b バンプ
13 開口部
14 電源線
15 配線層
15a 絶縁膜
16 導体層
17 ボンディングリード
18 ワイヤ
19 基板
20 半導体装置
21 配線基板
21a ダイ付材
22 基板
23 接続端子
24 接続端子
27 リード
28 TABテープ
29 電源用リード
30 半導体装置
40 半導体装置
Claims (5)
- 中央に設けた回路部が外部からの電源を供給するための電源用電極と電源線により接続された半導体素子と、
前記半導体素子を搭載すると共に、前記半導体素子を取り囲む領域に配設した第1の接続端子が前記電源用電極と電気的に接合された基板と、
前記回路部の中央に配置された電源線上に形成された第1の開口部と、
前記回路部の外周部に配置された電源線上に形成された第2の開口部と、
前記基板上の前記半導体素子を取り囲む前記領域に配設した第2の接続端子と電気的に接合されると共に、前記第1の開口部における電源線と前記第2の開口部における電源線とを互いに接続する導体層と
を備えることを特徴とする半導体装置。 - 中央に設けた回路部が外部からの電源を供給するための電源用バンプと電源線により接続された半導体素子と、
前記半導体素子を搭載すると共に、前記半導体素子上の前記電源用バンプと対向する領域に配設した第1の接続端子が前記電源用バンプと電気的に接合された基板と、
前記回路部の中央に配置された電源線上に形成された第1の開口部と、
前記回路部の外周部に配置された電源線上に形成された第2の開口部と、
前記基板上の前記回路部と対向する領域に配設した第2の接続端子と電気的に接合されると共に、前記第1の開口部における電源線と前記第2の開口部における電源線とを互いに接続する導体層と
を備えることを特徴とする半導体装置。 - 中央に設けた回路部が外部からの電源を供給するための電源用バンプと電源線により接続された半導体素子と、
前記半導体素子を搭載すると共に、前記半導体素子を取り囲む領域に配設した第1のリードが前記電源用バンプと電気的に接合されたTABテープと、
前記回路部の中央に配置された電源線上に形成された第1の開口部と、
前記回路部の外周部に配置された電源線上に形成された第2の開口部と、
前記TABテープ上の前記半導体素子と対向する領域に配設した第2のリードと電気的に接合されると共に、前記第1の開口部における電源線と前記第2の開口部における電源線とを互いに接続する導体層と
を備えることを特徴とする半導体装置。 - 前記導体層は、銀、金、銅のうちいずれかの導電性物質を用いて形成されることを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
- 前記第1の開口部における前記電源線と前記第2の開口部における前記電源線は、金属めっき層を介して前記導体層と接続することを特徴とする請求項1乃至3のいずれかに記載の半導体装置。
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JP2004164857A JP4904670B2 (ja) | 2004-06-02 | 2004-06-02 | 半導体装置 |
KR1020050043947A KR100662070B1 (ko) | 2004-06-02 | 2005-05-25 | 반도체 장치 |
TW094117246A TWI271829B (en) | 2004-06-02 | 2005-05-26 | Semiconductor device |
US11/137,697 US7361980B2 (en) | 2004-06-02 | 2005-05-26 | Semiconductor device |
CNB2005100743166A CN100392843C (zh) | 2004-06-02 | 2005-06-01 | 半导体器件 |
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JP (1) | JP4904670B2 (ja) |
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JP2013229455A (ja) * | 2012-04-26 | 2013-11-07 | Renesas Electronics Corp | 半導体装置および半導体装置の製造方法 |
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US7750375B2 (en) * | 2006-09-30 | 2010-07-06 | Taiwan Semiconductor Manufacturing Co., Ltd. | Power line layout techniques for integrated circuits having modular cells |
US20090032941A1 (en) * | 2007-08-01 | 2009-02-05 | Mclellan Neil | Under Bump Routing Layer Method and Apparatus |
US7906424B2 (en) | 2007-08-01 | 2011-03-15 | Advanced Micro Devices, Inc. | Conductor bump method and apparatus |
US8258615B2 (en) * | 2008-03-07 | 2012-09-04 | Mediatek Inc. | Semiconductor device and fabricating method thereof |
US7554133B1 (en) * | 2008-05-13 | 2009-06-30 | Lsi Corporation | Pad current splitting |
US8314474B2 (en) * | 2008-07-25 | 2012-11-20 | Ati Technologies Ulc | Under bump metallization for on-die capacitor |
JP5404454B2 (ja) * | 2010-01-29 | 2014-01-29 | ルネサスエレクトロニクス株式会社 | 半導体装置及び半導体装置の製造方法 |
KR102172786B1 (ko) * | 2013-11-01 | 2020-11-02 | 에스케이하이닉스 주식회사 | 반도체 패키지 및 그의 제조방법 |
CN108336056B (zh) * | 2018-04-12 | 2024-06-04 | 苏州震坤科技有限公司 | 用于半导体封装结构的万用转接电路层 |
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JP4904670B2 (ja) | 2012-03-28 |
US7361980B2 (en) | 2008-04-22 |
KR20060046166A (ko) | 2006-05-17 |
CN1705099A (zh) | 2005-12-07 |
TWI271829B (en) | 2007-01-21 |
KR100662070B1 (ko) | 2006-12-27 |
CN100392843C (zh) | 2008-06-04 |
TW200603352A (en) | 2006-01-16 |
US20050280034A1 (en) | 2005-12-22 |
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