JP2005294822A - 半導体デバイス製造方法および半導体構造 - Google Patents
半導体デバイス製造方法および半導体構造 Download PDFInfo
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- JP2005294822A JP2005294822A JP2005067344A JP2005067344A JP2005294822A JP 2005294822 A JP2005294822 A JP 2005294822A JP 2005067344 A JP2005067344 A JP 2005067344A JP 2005067344 A JP2005067344 A JP 2005067344A JP 2005294822 A JP2005294822 A JP 2005294822A
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- mask layer
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/0035—Multiple processes, e.g. applying a further resist layer on an already in a previously step, processed pattern or textured surface
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/09—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers
- G03F7/095—Photosensitive materials characterised by structural details, e.g. supports, auxiliary layers having more than one photosensitive layer
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P50/00—Etching of wafers, substrates or parts of devices
- H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/405—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their composition, e.g. multilayer masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4085—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes characterised by the processes involved to create the masks
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P76/00—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography
- H10P76/40—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials
- H10P76/408—Manufacture or treatment of masks on semiconductor bodies, e.g. by lithography or photolithography of masks comprising inorganic materials characterised by their sizes, orientations, dispositions, behaviours or shapes
- H10P76/4088—Processes for improving the resolution of the masks
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- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Architecture (AREA)
- Structural Engineering (AREA)
- Drying Of Semiconductors (AREA)
- Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- Photosensitive Polymer And Photoresist Processing (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Preparing Plates And Mask In Photomechanical Process (AREA)
Abstract
【解決手段】半導体デバイスの製造方法において、同一のパターンであるが、ある距離だけ互いに対して移動している、第1および第2パターンを利用して、小さなサイズの構造を半導体材料などの材料内に作成する。2つのマスク層が使用される。第1パターンは、選択的エッチングで上部マスクへエッチングされ、第2パターンは上部マスク層上、または、上部マスク層が除去された位置の下部マスク層上に作成される。第2パターンに従って、下部マスク層および/または上部マスク層の一部がエッチングされ、下部および上部マスク層の残余部分で形成されたマスクをもたらし、マスクは、第1パターンに対する第2パターンの移動により決定されたサイズを伴う構造を有する。マスクは、無めっき材料をエッチングするのに使用可能であり、小さなサイズを有する材料構造が作成される。
【選択図】 図1d
Description
Claims (9)
- 材料を下部マスク層(3)で覆い、かつ、下部マスク層(3)を上部マスク層(4)で覆うことと、
リソグラフマスクを用いて上部マスク層(4)上に第1パターンを作成することと、
第1パターンに応じて上部マスク層(4)の一部分を除去することとを含む、材料内にパターンが作成された半導体デバイスの製造方法であって、
リソグラフマスクを用いて、上部マスク層(4)上、又は上部マスク層(4)が除去された位置の下部マスク層(3)上に第2パターンを作成することであって、マスクは、第2パターンが第1パターンに対して置き換えられる形態で、ある距離にわたって置き換えられることと、
少なくとも第2パターンに従って、下部マスク層(3)、および/または、上部マスク層(4)の一部分を除去することと、
下部および上部のマスク層(3、4)の残余部分により形成されたマスクに従って、材料の一部分を除去することとを含むことを特徴とする半導体デバイスの製造方法。 - 少なくとも第2パターンに従って、下部マスク層(3)、および/または、上部マスク層(4)の一部分を除去するステップが、
上部マスク層(4)の残余部分により形成されたパターンで覆われた第2パターンに従って、下部マスク層(3)の一部分を除去することを含む、請求項1に記載の半導体デバイスの製造方法。 - 少なくとも第2パターンに従って、下部マスク層(3)、および/または、上部マスク層(4)の一部分を除去するステップが、
第2パターンに従って、上部マスク層(4)の一部分を除去することと、
上部マスク層(4)により形成されたパターンに従って、下部マスク層(3)の一部分を除去することとを含む、請求項1に記載の半導体デバイスの製造方法。 - 第1または第2のパターンに従って、下部マスク層(3)または上部マスク層(3)の一部分の除去が、そのパターンに従うそれぞれの層の選択的なエッチングを含む、請求項1〜3のいずれか1つに記載の半導体デバイスの製造方法。
- 材料が、有機材料、および/または、無機材料を含む、請求項1〜4のいずれか1つに記載の半導体デバイスの製造方法。
- 材料が、無機材料層(1)を覆っている有機材料層(2)を含む、請求項5に記載の半導体デバイスの製造方法。
- 下部および上部のマスク層(3、4)の残余部分で形成されたマスクに従う、材料の一部分の除去が、
下部および上部のマスク層(3、4)の残余部分により形成されたマスクに従って、有機材料(2)の一部分を除去することと、
少なくとも有機材料(2)の残余部分により形成されたマスクに従って、無機材料(1)の一部分を除去することと、
有機材料(2)の残余部分を除去することとを含む、請求項6に記載の半導体デバイスの製造方法。 - 下部および上部のマスク(3、4)の残余部分を除去するさらなるステップを含む、請求項1〜7のいずれか1つに記載の半導体デバイスの製造方法。
- 請求項1〜8のいずれか1つに記載の半導体デバイスの製造方法で形成された半導体構造。
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| EP04101072 | 2004-03-16 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2005294822A true JP2005294822A (ja) | 2005-10-20 |
| JP4583980B2 JP4583980B2 (ja) | 2010-11-17 |
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Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005067344A Expired - Fee Related JP4583980B2 (ja) | 2004-03-16 | 2005-03-10 | 半導体デバイス製造方法および半導体構造 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US7361453B2 (ja) |
| JP (1) | JP4583980B2 (ja) |
| CN (1) | CN1681084B (ja) |
| TW (1) | TWI303751B (ja) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2009237270A (ja) * | 2008-03-27 | 2009-10-15 | Mitsubishi Electric Corp | パターン形成方法、及び配線構造、並びに電子機器 |
| US9587791B2 (en) | 2007-12-26 | 2017-03-07 | Olympus Corporation | Light source device and endoscope apparatus comprising the same |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20070018286A1 (en) * | 2005-07-14 | 2007-01-25 | Asml Netherlands B.V. | Substrate, lithographic multiple exposure method, machine readable medium |
| EP1850369A1 (en) * | 2006-04-28 | 2007-10-31 | STMicroelectronics S.r.l. | Manufacturing process of an organic mask for microelectronic industry |
| TW200926261A (en) * | 2007-12-12 | 2009-06-16 | Nanya Technology Corp | Method of forming iso space pattern |
| TWI409852B (zh) * | 2009-12-31 | 2013-09-21 | 華亞科技股份有限公司 | 利用自對準雙重圖案製作半導體元件微細結構的方法 |
| US10557939B2 (en) | 2015-10-19 | 2020-02-11 | Luminar Technologies, Inc. | Lidar system with improved signal-to-noise ratio in the presence of solar background noise |
| CN108369274B (zh) | 2015-11-05 | 2022-09-13 | 路明亮有限责任公司 | 用于高分辨率深度映射的具有经改进扫描速度的激光雷达系统 |
| US10591600B2 (en) | 2015-11-30 | 2020-03-17 | Luminar Technologies, Inc. | Lidar system with distributed laser and multiple sensor heads |
| US9810775B1 (en) | 2017-03-16 | 2017-11-07 | Luminar Technologies, Inc. | Q-switched laser for LIDAR system |
| US9905992B1 (en) | 2017-03-16 | 2018-02-27 | Luminar Technologies, Inc. | Self-Raman laser for lidar system |
| US9810786B1 (en) | 2017-03-16 | 2017-11-07 | Luminar Technologies, Inc. | Optical parametric oscillator for lidar system |
| US9869754B1 (en) | 2017-03-22 | 2018-01-16 | Luminar Technologies, Inc. | Scan patterns for lidar systems |
| US10007001B1 (en) | 2017-03-28 | 2018-06-26 | Luminar Technologies, Inc. | Active short-wave infrared four-dimensional camera |
| US10545240B2 (en) | 2017-03-28 | 2020-01-28 | Luminar Technologies, Inc. | LIDAR transmitter and detector system using pulse encoding to reduce range ambiguity |
| CN109148269B (zh) * | 2017-06-27 | 2021-05-04 | 联华电子股份有限公司 | 半导体装置的形成方法 |
| US10153161B1 (en) * | 2017-11-27 | 2018-12-11 | Nanya Technology Corporation | Method for manufacturing a semiconductor structure |
| CN114496771B (zh) * | 2020-11-11 | 2024-05-03 | 长鑫存储技术有限公司 | 半导体结构的制造方法 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56137627A (en) * | 1980-03-28 | 1981-10-27 | Nec Corp | Pattern forming |
| JPS6255934A (ja) * | 1985-09-05 | 1987-03-11 | Matsushita Electronics Corp | 樹脂パタ−ンの形成方法 |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR940010508B1 (ko) | 1991-09-18 | 1994-10-24 | 삼성전자 주식회사 | 미세패턴 형성방법 |
| JPH05343279A (ja) | 1992-06-11 | 1993-12-24 | Sony Corp | 半導体装置の製造方法 |
| TWI246633B (en) * | 1997-12-12 | 2006-01-01 | Applied Materials Inc | Method of pattern etching a low k dielectric layen |
| US6605541B1 (en) * | 1998-05-07 | 2003-08-12 | Advanced Micro Devices, Inc. | Pitch reduction using a set of offset masks |
| JP3279276B2 (ja) | 1999-01-27 | 2002-04-30 | 日本電気株式会社 | 半導体装置の製造方法 |
| US6660456B2 (en) | 2001-06-27 | 2003-12-09 | International Business Machines Corporation | Technique for the size reduction of vias and other images in semiconductor chips |
-
2005
- 2005-02-22 TW TW094105215A patent/TWI303751B/zh not_active IP Right Cessation
- 2005-03-10 JP JP2005067344A patent/JP4583980B2/ja not_active Expired - Fee Related
- 2005-03-15 CN CN200510055104.3A patent/CN1681084B/zh not_active Expired - Fee Related
- 2005-03-15 US US11/081,797 patent/US7361453B2/en not_active Expired - Lifetime
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS56137627A (en) * | 1980-03-28 | 1981-10-27 | Nec Corp | Pattern forming |
| JPS6255934A (ja) * | 1985-09-05 | 1987-03-11 | Matsushita Electronics Corp | 樹脂パタ−ンの形成方法 |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9587791B2 (en) | 2007-12-26 | 2017-03-07 | Olympus Corporation | Light source device and endoscope apparatus comprising the same |
| JP2009237270A (ja) * | 2008-03-27 | 2009-10-15 | Mitsubishi Electric Corp | パターン形成方法、及び配線構造、並びに電子機器 |
Also Published As
| Publication number | Publication date |
|---|---|
| TWI303751B (en) | 2008-12-01 |
| CN1681084A (zh) | 2005-10-12 |
| TW200532394A (en) | 2005-10-01 |
| US7361453B2 (en) | 2008-04-22 |
| CN1681084B (zh) | 2012-03-21 |
| US20050214690A1 (en) | 2005-09-29 |
| JP4583980B2 (ja) | 2010-11-17 |
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