JP2004303900A - Semiconductor device - Google Patents

Semiconductor device Download PDF

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JP2004303900A
JP2004303900A JP2003094106A JP2003094106A JP2004303900A JP 2004303900 A JP2004303900 A JP 2004303900A JP 2003094106 A JP2003094106 A JP 2003094106A JP 2003094106 A JP2003094106 A JP 2003094106A JP 2004303900 A JP2004303900 A JP 2004303900A
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semiconductor
heat
semiconductor element
heat radiating
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JP4022758B2 (en
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Takanori Tejima
孝紀 手嶋
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Denso Corp
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Denso Corp
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H01L2224/061—Disposition
    • H01L2224/0618—Disposition being disposed on at least two different sides of the body, e.g. dual array
    • H01L2224/06181—On opposite sides of the body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30—Technical effects
    • H01L2924/301—Electrical effects
    • H01L2924/3025—Electromagnetic shielding

Abstract

<P>PROBLEM TO BE SOLVED: To provide a semiconductor device in which sufficient pressurization for preventing the wraparound of resin to a radiation face at the time of forming is realized without damaging a semiconductor element and reliability is improved. <P>SOLUTION: A plurality of cylindrical spacers 9 are disposed in positions which are closed to the semiconductor element 2 and the semiconductor element 3, and which do not interfere with them between a lower heat sink 5 and an upper heat sink 8 which are arranged in parallel. The spacers 9 function as pressure reception parts (resistance parts) receiving mold-type clamping force (compression force) instead of the semiconductor elements 2 and 3 at the time of resin-molding the semiconductor elements 2 and 3, in a state where they are sandwiched between the lower and the upper heat sinks 5 and 8. Thus, damage of the semiconductor elements 2 and 3 is prevented and sufficient clamping force can be added. Consequently, wraparound of resin into both heat sinks 5 and 8 (requested to be exposed faces) can be prevented as much as possible. <P>COPYRIGHT: (C)2005,JPO&NCIPI

Description

【０００１】
【発明の属する技術分野】
本発明は、半導体素子の両面に放熱板を装着した半導体装置に関する。
【０００２】
【従来の技術】
近年、高耐圧、大電流に適した半導体チップ（半導体素子）が内蔵されたインバータパワーモジュールが、機器の小型化が図れるため多く使われている。この半導体素子として、例えば、ＩＧＢＴ（絶縁ゲート型バイポーラトランジスタ）等がある。これら半導体素子は、使用時の発熱を効率よく放熱することが要求され、半導体素子の放熱性を向上させるために種々の提案がされている。ここで、半導体素子を挟むように第１、第２の放熱板を配置した状態で、それを樹脂モールドして封止する工程が一般に実施されるが、第１、第２の放熱板の各外側面は放熱面として樹脂が付かない露出面として、放熱効率を低下させないことが求められる。第２の放熱板は圧縮方向に型締めされるが、型締め力が不足すると第１、第２の放熱板の放熱面に樹脂が回り込んで付着しやすい（一種のバリ）ため、型締め力を高める必要がある。しかし、型締め力を大きくすると間にある半導体素子が損傷するおそれがあるため型締め力の増大には限界がある。
【０００３】
【特許文献１】
特開２００１−２６７４６９号公報
【特許文献２】
特開２００２−３２４８１６号公報
【０００４】
【発明が解決しようとする課題】
従来技術として、特許文献１には、半導体素子の両面に放熱板を設けて、成形型で樹脂封止の際、上側の放熱板の外周のみを加圧し変形させることにより、半導体素子へのダメージを抑え、かつ放熱板の露出面への樹脂の回り込みを防止する提案がされている。しかしながら、該公報技術では、複数の半導体素子を搭載した半導体装置の場合、素子と素子の間の部分の放熱板が成形時の樹脂圧力により膨らむ可能性があるためよくない。やはり放熱板全面を加圧することが本来的には望ましいといえる。
【０００５】
また、特許文献２には、放熱板の外面に絶縁シートを貼り付けた状態で樹脂モールドする提案がされている。しかしながら、該公報技術は、樹脂の回り込みを防止する手段としては有効であるが、使用時の放熱シートをこのシートで兼ねるようにしており、シートの絶縁性等を考慮すると信頼性に劣る面もありうる。
【０００６】
本発明は、上記した点を背景になされたもので、半導体素子を損傷することなく、成形時の放熱面への樹脂の回り込みを防止するための十分な加圧を可能とし、かつ信頼性も高められる半導体装置を提供することを課題とする。
【０００７】
【課題を解決するための手段及び発明の効果】
上記課題を解決するために本発明の半導体装置は、半導体素子の一側面に第１の放熱板が設けられ、半導体素子の他側面に第１の放熱板と略平行に第２の放熱板が設けられた状態で成形型に収容され、第１および第２の放熱板のそれぞれ半導体素子と面した側と反対側を放熱面として露出するように樹脂で封止された半導体装置であって、第１の放熱板と第２の放熱板との間に、半導体素子に近接するとともにその外側の位置において、第１および第２の放熱板の間隔を両放熱板間の電気的絶縁を維持した状態で維持するスペーサ部材が設けられたことを特徴とする。
【０００８】
上記構成により、成形時に放熱板の露出すべき放熱面を全面的に十分加圧でき、半導体素子にダメージを与えずに、放熱面への樹脂の回り込みを防止できる。
【０００９】
具体的には、スペーサ部材は、第１および第２の放熱板の接近方向に作用する圧縮荷重に対抗する受圧構造部とされ、一端部が第１の放熱板に、他端部が第２の放熱板に当接または係合しており、型締め力を受け止め両放熱板間の間隔を保持して半導体素子の損傷を防ぐことができる。
【００１０】
また、本発明は、第１の放熱板の同一平面上に複数の半導体素子が設けられ、これら半導体素子の第１の放熱板に面した側と反対側に、第１の放熱板と略平行に第２の放熱板が設けられた状態で成形型に収容され、第１および第２の放熱板のそれぞれ半導体素子と面した側と反対側を放熱面として露出するように樹脂で封止される半導体装置であって、
第１および第２の放熱板の間に、複数の半導体素子のそれぞれに近接するとともにその外側の位置において、第１および第２の放熱板の間隔を両放熱板間の電気的絶縁を維持した状態で維持するスペーサ部材が設けられたことを特徴とする。
【００１１】
上記構成により、複数の半導体素子を搭載した半導体装置の場合に、放熱面の全面加圧が可能で素子と素子の間の部分においても放熱板が成形時の樹脂圧力により膨らむことがなく、放熱板の平行性は保たれ、かつ樹脂の放熱面への回り込みを防ぐことができる。
【００１２】
具体的には、スペーサ部材は、電気的な絶縁材料からなり、円柱状と角柱状と球状と直方体状とのうちのいずれかをなすスペーサ部材であり、第１および第２の放熱板間に両放熱板によって挟まれるように複数設けられることを特徴とし、複数のスペーサで間隔が保持され、半導体素子が損傷することがなく、かつ十分な加圧が可能で放熱面への樹脂の回り込みを防ぐことができ、信頼性を高めることができる。また、このスペーサ部材は、半導体素子と両放熱板をはんだ等で接合する際の治具も兼ねることができ有用である。
【００１３】
また、具体的には、スペーサ部材は、導体部と絶縁材料からなるスペーサ部とを含んで形成され、第１および第２の放熱板間に両放熱板によって挟まれるように複数設けられることを特徴とし、このように導体部とスペーサ部とで構成した場合も十分な加圧が可能で半導体素子を損傷することなく、樹脂の回り込みを防止できる。スペーサ部材は種々の構成を選択できる。
【００１４】
さらに、具体的には、導体部は、第１および第２の放熱板の少なくとも一方に他方と面する側に一体形成した突出部として形成され、この突出部と他方の放熱板との間に絶縁材料からなるスペーサ部が設けられることを特徴とし、放熱板をプレス加工することで導体部を比較的簡単に作ることが可能である。
【００１５】
また、具体的には、スペーサ部材は、成形金型で樹脂モールドする前に、半導体素子の周りを一次的に封止する一次樹脂とすることにより、このように樹脂で行うことも可能である。
【００１６】
さらに、本発明は、第１および第２の放熱板の少なくとも１つの放熱板の放熱面の外周部に、成形型で加圧時に変形する突起部をその外周部に沿って設けることを特徴とし、この放熱面の突起部が成形時の加圧によりつぶれ、これを樹脂の進入を防ぐ壁として機能させることにより樹脂の回り込み防止効果をさらに増すことができる。
【００１７】
【発明の実施の形態】
以下、本発明の実施の形態につき図面に示す実施例を参照して説明する。図１は、本発明の一実施例である半導体装置の縦断面図である。半導体装置１は、矩形状（または方形状）の第１の半導体素子（例えば、ＩＧＢＴ（絶縁ゲート型バイポーラトランジスタ））２と、この第１の半導体素子２と適間隔を置いて同じ平面上に並べて設けられる第１の半導体素子２とは異なる第２の半導体素子（例えば、ＦＷＤ（フリーホイールダイオード）３と、これら第１および第２の半導体素子２、３の一側面側に、接合材料としてはんだ４で接合された第１の放熱板としての下側放熱板５と、これら第１および第２の半導体素子２、３の他側面側に、半導体素子２より小さい矩形状をなし、はんだ４で接合された第１の電極ブロック６と、半導体素子３より小さい矩形状をなし、はんだ４で接合された第２の電極ブロック７と、これら第１および第２の電極ブロック６、７の半導体素子２および半導体素子３の接合面とは反対面側に、はんだ４で接合された第２の放熱板としての上側放熱板８とを含み構成される。
【００１８】
第１の放熱板としての下側放熱板５、第２の放熱板としての上側放熱板８および電極ブロック６、電極ブロック７は、銅、アルミニウム等の熱伝導性のよい材料で形成されている。下側放熱板５および上側放熱板８は、方形または矩形板状に形成されている。
【００１９】
下側放熱板５および上側放熱板８の間に、半導体素子２および半導体素子３のそれぞれに近接して外側に（干渉しない部位に）位置して、円柱状のスペーサ（スペーサ部材）９が複数（本実施例では、半導体素子２および半導体素子３の間と外側に配置され（図３も参照）、各素子の４隅に位置するように６個）設けている。下側放熱板５と上側放熱板８とにはそれぞれスペーサ９の位置決めおよび嵌合用の穴（凹所）１０と１１が複数設けられている。
【００２０】
この例のスペーサ９は円柱状（角柱状でもよい）の本体９ａとその両端から同軸状にかつ小径に突出した係合部９ｂとを備え、本体９ａと各嵌合部９ｂとの境界からの軸方向に直角な肩面９ｃとされ、このようなピン状のスペーサ９の両端の嵌合部９ｂが下側および上側放熱板５、８の穴１０、１１（ピン穴）に嵌まり、各肩面９ｃがそれら放熱板５、８の内側対向面に当接またはごく近接してこのスペーサ９は位置決めされるとともに、両放熱板５、８間の圧縮荷重を受け止めるようになっている。つまり、これらのスペーサ９は一種の突張り棒として機能するとも言うことができる。
【００２１】
図２は、図１の側面図である。半導体素子２の電極（図示せず）は、外部の信号端子用リード１２と、金あるいはアルミニウム等のボンディングワイヤ１３で接続されている。電極ブロック６は、半導体素子２と上側放熱板８との間の間隔を保持する働きをして、ボンディングワイヤ１３の部分の形態は保持される。図２を除き、信号端子用リード１２およびボンディングワイヤ１３は省略してある。
【００２２】
図３は、図１におけるスペーサ９の配置を示す説明図である。半導体素子２、半導体素子３の間を含み各素子の４隅に位置するように配置している。スペーサ９は、半導体素子２、および半導体素子３のできるだけ近傍で、かつできるだけ全周を均等にカバーすることが好ましい。スペーサ９は、材料として、セラミック等の絶縁材料を用いることができる。スペーサ９が第１、第２の放熱板５、８によって挟まれる結果となっても、そのスペーサ９によって両放熱板５、８の導通（短絡）を防ぐことが求められるため、スペーサ９（広くスペーサ部材）は、電気的な絶縁性を維持することが求められる。ただし、スペーサ９の全体がすべて絶縁材料で形成されていなくても、例えば肉部のコア材が金属棒（非絶縁材料）で、それが絶縁材料としての例えばセラミックや樹脂で包み込まれて、または外側が被覆されたものでもよいし、セラミック板の少なくとも片側に金属板を貼りつけたものでもよい。
【００２３】
半導体装置１は、半導体素子２、半導体素子３と下側放熱板５および電極ブロック６、電極ブロック７とのはんだ接合、信号端子用リード１２との結線、上側放熱板８とのはんだ接合がなされ、その後、熱硬化性の樹脂２０、例えばエポキシ樹脂でモールドすることにより封止される。
【００２４】
次に、図１に示す半導体装置１の製造方法について説明する。下側放熱板５の上にそれぞれはんだ箔を介して半導体素子２と半導体素子３とを載せ、さらに、半導体素子２の上にはんだ箔を介在して電極ブロック６を載せ、かつ半導体素子３の上にはんだ箔を介して電極ブロック７を載せる。加熱装置によって所定の温度ではんだ箔を溶融させ、その後硬化させることにより、半導体素子２、半導体素子３と下側放熱板５および電極ブロック６、電極ブロック７とのはんだ付けを行い、これらがはんだ４で接合される。
【００２５】
次に、信号用電極９と半導体素子２の電極とがワイヤボンディングにより結線される。そして、電極ブロック６と電極ブロック７の上にそれぞれはんだ箔を介在して上側放熱板８を載せる。この際に複数のスペーサ９を下側および上側放熱板５、８間に立て、各スペーサ９の両端の嵌合部９ｂを両放熱板５、８の穴１０、１１に嵌合して、複数のスペーサ９が両放熱板５、８に挟まれた状態とし、これらのスペーサ９を両放熱板５、８に加えられる型締めの際の圧縮荷重に対する抵抗体として機能させる。上側放熱板８は下側放熱板５と平行に配置する。スペーサ９は、平行に位置を合わせるための治具を兼ねる。電極ブロック６，７と上側放熱板８との間のはんだ箔を加熱、溶融させ、その後硬化させて、電極ブロック６、電極ブロック７と上側放熱板８とがそれぞれはんだ４によってはんだ付け（接合）される。
【００２６】
この後、半導体装置１をモールド金型（図示せず）にセットし、熱硬化性樹脂（例えば、エポキシ樹脂）を注入し硬化する。このとき、下側放熱板５の外面（露出した放熱面１４側）および上側放熱板８の外面（露出した放熱面１５側）から金型で加圧される。全面的に加圧されるが、スペーサ９がその型締め力（圧縮荷重）を受け、電極ブロック６，７への負荷をなくすかまたは減ずることにより、半導体素子２および半導体素子３へはダメージを与えずに、放熱面１４および放熱面１５への樹脂の回りこみを防ぎ、半導体装置１は樹脂２０で封止される。これにより、外部からの機械的および環境ストレスから半導体素子２および半導体素子３が保護される。下側放熱板５の下面と上側放熱板８の上面は、樹脂が回り込まないようにして露出した放熱面１４および放熱面１５となり、半導体素子２および半導体素子３の使用時の発熱を効率よく放熱できる。このように、全面加圧しても複数のスペーサ９で間隔が保持され（型締め力が受けられ）、半導体素子２、３が損傷することがなく、かつ十分な加圧が可能で放熱面１４、１５への樹脂の回り込みを防ぐことができ、装置の信頼性を高めることができる。また、このスペーサ９は、半導体素子２、３と両放熱板５、８をはんだ等で接合する際の治具も兼ねることができ有用である。
【００２７】
なお、スペーサ９は、円柱状としているが、前述のように角柱状としてもよい。その他、スペーサ９は種々の形態が挙げられる。図４は、図１におけるスペーサ９の他の実施例を示す要部断面図である。この例のスペーサ１９は、球状に形成されている。下側放熱板５および上側放熱板８のそれぞれ対応する部位に位置決め用の球面状の凹部２１，２２が形成され、スペーサ１９はそれら凹部に一部が嵌まった状態で両放熱板５，８間で位置決めされ、かつそれら放熱板５、８の間に介在して圧縮荷重（型締め力）を受け止める。このスペーサ１９はセラミック等の絶縁材料を材料として形成され、複数設けられる。このように球状等の点状のスペーサ部材でも前述と同様の効果が得られる。
【００２８】
さらに、図５は、図１におけるスペーサ９の他の実施例を示す説明図である。この例のスペーサ２９は、横長のブロック状、例えば直方体状とし、セラミック等の絶縁材料からなり複数（この実施例では半導体素子２、３の間と各外側に位置するように３個）設けられる。このようにブロック状のスペーサ部材でも、型締めの際に十分な加圧が可能で、半導体素子２、３を損傷することなく、樹脂の回り込みを防止できる。なお、スペーサ１９は、横長の棒状タイプのスペーサとも言え、横長棒状とする場合も、角柱状の棒材（軸状部材）あるいは横長の円柱状の棒材（軸状部材）としてもよい。上述のブロック状ないし棒状のスペーサを用いる場合でも、位置決めのための、それらスペーサが嵌まる凹部を両放熱板５、８の対向内面に形成することが望ましい。ただし、そのような凹部を形成することなく、スペーサと放熱板５、８とを接着剤等で仮止めしてもよいし、スペーサを一時的に保持する治具を用いることにより、そうした仮止めを省略することができる。
【００２９】
また、図６は、図１におけるスペーサ部材のさらに変形例を示す要部断面図である。この例でのスペーサ部材２７は、スペーサ部３９と導体部２６とを含んで構成される。なお、スペーサ部３９のみをスペーサ部材と把握する場合は、スペーサ部３９と導体部２６との全体を、双方の放熱板５、８の間隔を保持する（圧縮荷重を受けとめる）間隔保持部材とみることができる。なお、ここでは狭義のスペーサ部３９とこれと協働してスペーサ機能を果たす導体部２６とを併せて広義のスペーサ部材（分割タイプのもの）として説明する。つまりスペーサ部材は一体の必要はなく、複数が積み上げられる等、組立てられたものでもよい。スペーサ部３９は、セラミック等の絶縁材料を材料として、下側放熱面５および導体部２６とにはんだ等接合材料で接合される。導体部２６は、銅等の熱伝導性のよい材料からなり、上側放熱板８にはんだ等接合材料で接合される。このように、絶縁材料からなるスペーサ部３９と導体部２６とを含む複合的なスペーサ部材２７が複数設けられ、型締め時の圧縮力を受け止める。この複合的なスペーサ部材２７は全体としては絶縁性を有する。なお、スペーサ部３９を含んで間隔保持部材（ユニット）２７が複数組設けられるとも言える。
【００３０】
さらに、図７は、図６の変形例を示す要部断面図であり、中間にスペーサ部４９を設け、その上下に導体部３６を形成している。それぞれ材料は、図５に示す実施例と同じである。このようにスペーサ部４９とこれを両側から挟む導体部３６との複合的なスペーサ部材４６としてもよく、この場合でも全体として放熱板５、８間は絶縁されかつ型締めの際の圧縮力に対する抵抗となる。
【００３１】
また、図８は、図６の変形例を示す要部断面図である。上側放熱板８の下面側に突出して導体部５６がプレス加工で一体形成され、この導体部５６と下側放熱板５との間にスペーサ部６９が設けられる。上側放熱板８をプレス加工することで導体部５６を比較的簡単に作ることが可能であり、このように複合的スペーサ部材４８を形成しても上述と同様の効果が得られる。ここで、図６〜図８において、導体部を各放熱板５、８の一部とみればスペーサ部３９、４９、６９は、単純な単体のスペーサ部材とみることができる。
【００３２】
さらに、図９は、図１におけるスペーサ９の他の実施例を示す断面図である。成形金型で樹脂モールドする前に半導体素子２および半導体素子３の周りを一次樹脂、例えば、エポキシ樹脂によって、ポッティング法（注型法）等で一次的に封止しスペーサ部材７９を形成している。このように樹脂で行うことも可能である。
【００３３】
また、図１０は、本発明の他の実施例を示す縦断面図である。上側放熱板８の放熱面１５の外周部の板面から突出する、つぶししろ（環状突起ともいう）１８を設けている。図１１は、上面からみた説明図である。環状突起１８は、放熱板８の外周に沿って環状に、この例では長方形状に連なって突出形成される。この環状突起１８は、成形型での加圧時に塑性変形してつぶされた形となり、放熱面１５上に樹脂の遮蔽壁となって、樹脂の回りこみを防止する。上側放熱板８をこのように形成することにより、つぶししろ１８が壁となり樹脂の回り込み防止効果をさらに増すことができる。ここで、放熱板８の外周部板面に沿って環状に樹脂遮蔽壁を予め突出して形成しておき、型締め時に金型がその樹脂遮蔽壁（つぶされることを予定しない剛体壁）に当接して樹脂の回り込みを防ぐことが考えられる。ただし、型締め時の加工で環状突起が塑性変形（つぶされる）することにより金型と環状突起との密着性が単に当接する場合と比べて著しく高まるので、最初からつぶされることを予定した環状突起の方が好ましいと言える。この環状突起１８を形成するには放熱板８をプレス加工等で外周部に沿って環状に打刻し、その打刻（刻印加工）により移動、隆起した肉部を環状突起（つぶししろ）とする等適宜の手法を採用できる。
【００３４】
なお、下側放熱板５に押さえ部１９を設け、成形時に金型で下側放熱板５を加圧することができるようにしている。これは型締めのとき下側放熱板５を十分に加圧することを可能にする意義がある。この下側放熱板５の放熱面１４側に同じようにつぶししろ（環状突起１８）を設けてもよい。同様に加圧時に塑性変形してつぶされ、樹脂の遮蔽壁となり放熱面１４への樹脂の回りこみを防止できる。
【図面の簡単な説明】
【図１】本発明の半導体装置の一例を示す縦断面図。
【図２】図１の側面図。
【図３】図１におけるスペーサの配置を示す説明図。
【図４】本発明に係るスペーサの他の実施例を示す要部断面図。
【図５】本発明に係るスペーサの他の実施例を示す説明図。
【図６】本発明に係るスペーサの変形例を示す要部断面図。
【図７】本発明に係るスペーサの他の変形例を示す要部断面図。
【図８】本発明に係るスペーサの変形例を示す要部断面図。
【図９】本発明に係るスペーサの他の実施例を示す断面図。
【図１０】本発明の他の実施例を示す縦断面図。
【図１１】図１０に示したつぶししろ（環状突起）の説明図。
【符号の説明】
１ 半導体装置
２ 半導体素子
３ 半導体素子
４ はんだ
５ 下側放熱板
６ 電極ブロック
７ 電極ブロック
８ 上側放熱板
９，１９，２７，２９，４６，４８，７９ スペーサ（スペーサ部材）
１４ 放熱面（下側放熱板）
１５ 放熱面（上側放熱板）
１８ つぶししろ（環状突起）
２０ 樹脂
２６，３６，５６ 導体部
３９，４９，６９ スペーサ部[0001]
TECHNICAL FIELD OF THE INVENTION
The present invention relates to a semiconductor device in which heat sinks are mounted on both sides of a semiconductor element.
[0002]
[Prior art]
2. Description of the Related Art In recent years, inverter power modules having a built-in semiconductor chip (semiconductor element) suitable for high withstand voltage and large current are widely used because the size of equipment can be reduced. As this semiconductor element, there is, for example, an IGBT (insulated gate bipolar transistor). These semiconductor elements are required to efficiently radiate heat generated during use, and various proposals have been made to improve the heat dissipation of the semiconductor elements. Here, in a state where the first and second heat radiating plates are arranged so as to sandwich the semiconductor element, a step of resin-molding and sealing them is generally performed. It is required that the outer side surface is an exposed surface on which no resin is attached as a heat radiating surface, so that heat radiating efficiency is not reduced. The second heat radiating plate is clamped in the compression direction. However, if the clamping force is insufficient, the resin easily wraps around and adheres to the heat radiating surfaces of the first and second heat radiating plates (a kind of burr). You need to increase your power. However, if the mold clamping force is increased, there is a possibility that a semiconductor element in between may be damaged.
[0003]
[Patent Document 1]
JP 2001-267469 A [Patent Document 2]
JP-A-2002-324816
[Problems to be solved by the invention]
As a prior art, Patent Literature 1 discloses that a heat sink is provided on both surfaces of a semiconductor element, and when the resin is sealed with a molding die, only the outer periphery of the upper heat sink is pressed and deformed to damage the semiconductor element. It has been proposed to suppress the heat dissipation and prevent the resin from wrapping around the exposed surface of the heat sink. However, this publication is not good in the case of a semiconductor device having a plurality of semiconductor elements mounted thereon, because the heatsink at the portion between the elements may expand due to resin pressure during molding. After all, it can be said that it is originally desirable to press the entire surface of the heat sink.
[0005]
Patent Document 2 proposes that a resin mold be performed with an insulating sheet attached to an outer surface of a heat sink. However, although this publication technology is effective as a means for preventing the resin from wrapping around, the heat dissipation sheet during use is also used as this sheet, and the reliability is inferior when considering the insulation properties of the sheet. It is possible.
[0006]
The present invention has been made in view of the above-mentioned points, and enables sufficient pressurization to prevent the resin from wrapping around the heat radiation surface during molding without damaging the semiconductor element, and also has high reliability. It is an object to provide a semiconductor device which can be improved.
[0007]
Means for Solving the Problems and Effects of the Invention
In order to solve the above problem, a semiconductor device according to the present invention includes a first heat sink provided on one side surface of a semiconductor element, and a second heat sink provided on the other side surface of the semiconductor element substantially in parallel with the first heat sink. A semiconductor device housed in a molding die in a provided state, and sealed with a resin so as to expose a side opposite to a side facing the semiconductor element of each of the first and second heat sinks as a heat dissipation surface, Between the first radiator plate and the second radiator plate, the distance between the first and second radiator plates was maintained close to the semiconductor element and at the position outside the semiconductor device to maintain electrical insulation between the two radiator plates. A spacer member for maintaining the state is provided.
[0008]
With the above configuration, the heat radiating surface to be exposed of the heat radiating plate can be sufficiently pressed over the entire surface at the time of molding, and the resin can be prevented from wrapping around the heat radiating surface without damaging the semiconductor element.
[0009]
Specifically, the spacer member is a pressure receiving structure portion that resists a compressive load acting in the approaching direction of the first and second heat radiating plates, one end of the spacer member being the first heat radiating plate and the other end being the second heat radiating plate. Abuts or is engaged with the heat radiating plate, and receives the mold clamping force to maintain a space between the heat radiating plates to prevent damage to the semiconductor element.
[0010]
Further, according to the present invention, a plurality of semiconductor elements are provided on the same plane of the first heat sink, and the semiconductor elements are substantially parallel to the first heat sink on the side opposite to the side facing the first heat sink. Are provided in a molding die in a state in which the second heat radiating plate is provided, and are sealed with a resin so that the sides of the first and second heat radiating plates opposite to the side facing the semiconductor element are exposed as heat radiating surfaces. Semiconductor device,
Between the first and second radiating plates, the distance between the first and second radiating plates is set to be close to each of the plurality of semiconductor elements and at a position outside the plurality of semiconductor elements while maintaining electrical insulation between the two radiating plates. A maintenance spacer member is provided.
[0011]
With the above configuration, in the case of a semiconductor device having a plurality of semiconductor elements mounted thereon, it is possible to pressurize the entire heat radiating surface, and the heat radiating plate does not expand due to the resin pressure during molding even in a portion between the elements. The parallelism of the plates is maintained, and it is possible to prevent the resin from wrapping around the heat radiating surface.
[0012]
Specifically, the spacer member is made of an electrically insulating material, and is a spacer member having any one of a cylindrical shape, a prismatic shape, a spherical shape, and a rectangular parallelepiped shape, and is provided between the first and second heat radiation plates. It is characterized in that it is provided in plural so as to be sandwiched by both heat radiating plates, the space is maintained by multiple spacers, the semiconductor element is not damaged, sufficient pressure can be applied, and the resin wraps around the heat radiating surface Can be prevented and reliability can be improved. Further, this spacer member is useful because it can also serve as a jig for joining the semiconductor element and the heat sinks with solder or the like.
[0013]
More specifically, the spacer member is formed to include a conductor portion and a spacer portion made of an insulating material, and a plurality of spacer members are provided so as to be sandwiched between the first and second heat radiating plates by the two radiating plates. As a feature, even in the case where the conductor portion and the spacer portion are formed in this manner, sufficient pressurization is possible, and it is possible to prevent the resin from flowing around without damaging the semiconductor element. Various configurations can be selected for the spacer member.
[0014]
Further, specifically, the conductor portion is formed as a protrusion integrally formed on at least one of the first and second heat radiating plates on the side facing the other, and between the protrusion and the other heat radiating plate. It is characterized in that a spacer portion made of an insulating material is provided, and a conductor portion can be relatively easily formed by pressing a heat sink.
[0015]
Further, specifically, the spacer member may be formed of a primary resin for temporarily sealing the periphery of the semiconductor element before resin molding with a molding die. .
[0016]
Further, the present invention is characterized in that a projection which is deformed at the time of pressing by a molding die is provided along an outer peripheral portion of an outer peripheral portion of a heat radiation surface of at least one of the first and second heat radiating plates. The protrusion on the heat radiating surface is crushed by the pressure during molding, and functions as a wall for preventing the resin from entering, so that the effect of preventing the resin from wrapping around can be further increased.
[0017]
BEST MODE FOR CARRYING OUT THE INVENTION
Hereinafter, embodiments of the present invention will be described with reference to examples shown in the drawings. FIG. 1 is a longitudinal sectional view of a semiconductor device according to one embodiment of the present invention. The semiconductor device 1 includes a rectangular (or square) first semiconductor element (for example, an IGBT (insulated gate bipolar transistor)) 2 and the first semiconductor element 2 at an appropriate distance and on the same plane. A second semiconductor element (for example, FWD (freewheel diode) 3) different from the first semiconductor element 2 provided side by side, and one side of the first and second semiconductor elements 2 and 3 as a bonding material A lower radiator plate 5 as a first radiator plate joined by the solder 4 and a rectangular shape smaller than the semiconductor element 2 are formed on the other side surface of the first and second semiconductor elements 2 and 3. And a second electrode block 7 having a rectangular shape smaller than the semiconductor element 3 and joined by the solder 4, and a semiconductor of the first and second electrode blocks 6 and 7. element And on the opposite side to the joint surface of the semiconductor element 3, and comprises an upper heat dissipation plate 8 as a second heat radiating plate which is joined by solder 4.
[0018]
The lower radiator plate 5 as the first radiator plate, the upper radiator plate 8 as the second radiator plate, and the electrode blocks 6 and 7 are formed of a material having good heat conductivity such as copper and aluminum. . The lower radiator plate 5 and the upper radiator plate 8 are formed in a square or rectangular plate shape.
[0019]
A plurality of columnar spacers (spacer members) 9 are located between the lower heat radiating plate 5 and the upper heat radiating plate 8 and located outside (at portions not interfering) in close proximity to the semiconductor elements 2 and 3 respectively. (In this embodiment, six elements are arranged between and outside the semiconductor element 2 and the semiconductor element 3 (see also FIG. 3) so as to be located at four corners of each element). The lower heat radiating plate 5 and the upper heat radiating plate 8 are provided with a plurality of holes (recesses) 10 and 11 for positioning and fitting the spacer 9 respectively.
[0020]
The spacer 9 of this example includes a cylindrical (or prismatic) main body 9a and an engaging portion 9b protruding coaxially and with a small diameter from both ends of the main body 9a. The spacer 9 extends from the boundary between the main body 9a and each fitting portion 9b. The shoulders 9c are perpendicular to the axial direction, and the fitting portions 9b at both ends of such a pin-shaped spacer 9 fit into the holes 10 and 11 (pin holes) of the lower and upper heat sinks 5 and 8, respectively. The spacer 9 is positioned so that the shoulder surface 9c abuts or is very close to the inner facing surfaces of the heat radiating plates 5 and 8, and receives a compressive load between the heat radiating plates 5 and 8. In other words, it can be said that these spacers 9 function as a kind of strut.
[0021]
FIG. 2 is a side view of FIG. An electrode (not shown) of the semiconductor element 2 is connected to an external signal terminal lead 12 by a bonding wire 13 such as gold or aluminum. The electrode block 6 functions to maintain the space between the semiconductor element 2 and the upper heat sink 8, and the form of the bonding wire 13 is maintained. Except for FIG. 2, the signal terminal leads 12 and the bonding wires 13 are omitted.
[0022]
FIG. 3 is an explanatory diagram showing the arrangement of the spacer 9 in FIG. They are arranged so as to be located at the four corners of each element, including between the semiconductor element 2 and the semiconductor element 3. It is preferable that the spacer 9 cover the semiconductor element 2 and the semiconductor element 3 as close as possible and evenly over the entire circumference as much as possible. The spacer 9 can be made of an insulating material such as a ceramic as a material. Even if the spacer 9 is sandwiched between the first and second heat radiating plates 5 and 8, it is required that the heat radiating plates 5 and 8 be prevented from conducting (short circuit) by the spacer 9. The spacer member) is required to maintain electrical insulation. However, even if the entire spacer 9 is not entirely formed of an insulating material, for example, the core material of the meat portion is a metal bar (non-insulating material), which is wrapped with an insulating material such as ceramic or resin, or The outer surface may be covered, or a metal plate may be attached to at least one side of a ceramic plate.
[0023]
In the semiconductor device 1, the semiconductor element 2, the semiconductor element 3 and the lower heat sink 5, the electrode block 6, the electrode block 7, the solder connection with the signal terminal lead 12, and the solder joint with the upper heat sink 8 are made. Thereafter, sealing is performed by molding with a thermosetting resin 20, for example, an epoxy resin.
[0024]
Next, a method for manufacturing the semiconductor device 1 shown in FIG. 1 will be described. The semiconductor element 2 and the semiconductor element 3 are mounted on the lower heat sink 5 via solder foil, respectively, and the electrode block 6 is mounted on the semiconductor element 2 via the solder foil. The electrode block 7 is placed on the upper side via a solder foil. The solder foil is melted at a predetermined temperature by a heating device and then cured, so that the semiconductor element 2, the semiconductor element 3 and the lower heat sink 5, the electrode block 6, and the electrode block 7 are soldered. 4 are joined.
[0025]
Next, the signal electrode 9 and the electrode of the semiconductor element 2 are connected by wire bonding. Then, the upper heat sink 8 is placed on the electrode block 6 and the electrode block 7 with a solder foil interposed therebetween. At this time, a plurality of spacers 9 are set up between the lower and upper radiator plates 5 and 8, and fitting portions 9 b at both ends of each spacer 9 are fitted into holes 10 and 11 of both radiator plates 5 and 8. The spacers 9 are sandwiched between the heat radiating plates 5 and 8, and these spacers 9 function as resistors against a compressive load applied to the heat radiating plates 5 and 8 during mold clamping. The upper heat sink 8 is arranged in parallel with the lower heat sink 5. The spacer 9 also serves as a jig for adjusting the position in parallel. The solder foil between the electrode blocks 6 and 7 and the upper heat sink 8 is heated, melted, and then cured, and the electrode block 6, the electrode block 7 and the upper heat sink 8 are soldered (joined) with the solder 4 respectively. Is done.
[0026]
Thereafter, the semiconductor device 1 is set in a mold (not shown), and a thermosetting resin (for example, epoxy resin) is injected and cured. At this time, pressure is applied by a die from the outer surface of the lower heat sink 5 (exposed heat dissipation surface 14) and the outer surface of the upper heat sink 8 (exposed heat dissipation surface 15). Although the entire surface is pressurized, the spacer 9 receives the mold clamping force (compressive load) and eliminates or reduces the load on the electrode blocks 6 and 7, thereby damaging the semiconductor element 2 and the semiconductor element 3. Instead, the semiconductor device 1 is sealed with the resin 20 by preventing the resin from flowing into the heat radiation surfaces 14 and 15. Thereby, the semiconductor element 2 and the semiconductor element 3 are protected from external mechanical and environmental stress. The lower surface of the lower heat radiating plate 5 and the upper surface of the upper heat radiating plate 8 serve as a heat radiating surface 14 and a heat radiating surface 15 which are exposed so that the resin does not flow around, and efficiently radiate heat generated when the semiconductor elements 2 and 3 are used. it can. In this manner, even when the entire surface is pressed, the spacing is maintained by the plurality of spacers 9 (the mold clamping force is received), the semiconductor elements 2 and 3 are not damaged, and sufficient pressure can be applied to the heat radiation surface 14. , 15 can be prevented from flowing around, and the reliability of the device can be improved. The spacer 9 is useful because it can also serve as a jig for joining the semiconductor elements 2 and 3 and the heat sinks 5 and 8 with solder or the like.
[0027]
The spacer 9 has a columnar shape, but may have a prismatic shape as described above. In addition, the spacer 9 may take various forms. FIG. 4 is a sectional view of a main part showing another embodiment of the spacer 9 in FIG. The spacer 19 in this example is formed in a spherical shape. Spherical concave portions 21 and 22 for positioning are formed in the corresponding portions of the lower heat radiating plate 5 and the upper heat radiating plate 8, respectively. It is positioned between the heat radiating plates 5 and 8 and receives a compressive load (mold clamping force). The spacers 19 are formed of an insulating material such as ceramics, and are provided in plural numbers. As described above, the same effects as described above can be obtained even with a spherical spacer member.
[0028]
FIG. 5 is an explanatory view showing another embodiment of the spacer 9 in FIG. The spacers 29 in this example have a horizontally long block shape, for example, a rectangular parallelepiped shape, and are formed of a plurality of insulating materials such as ceramics (three in this embodiment so as to be located between and outside the semiconductor elements 2 and 3). . Thus, even with the block-shaped spacer member, sufficient pressure can be applied at the time of mold clamping, and the resin can be prevented from wrapping around without damaging the semiconductor elements 2 and 3. In addition, the spacer 19 can be said to be a horizontally long bar-shaped spacer, and may be a horizontally long bar, a prismatic bar (shaft member) or a horizontally long columnar bar (shaft member). Even when the above-mentioned block-shaped or rod-shaped spacers are used, it is desirable to form recesses in which the spacers are fitted for positioning on the opposed inner surfaces of the heat sinks 5 and 8. However, the spacer and the heat sinks 5 and 8 may be temporarily fixed with an adhesive or the like without forming such a concave portion, or such a temporary fixing may be performed by using a jig for temporarily holding the spacer. Can be omitted.
[0029]
FIG. 6 is a cross-sectional view of a main part showing a further modified example of the spacer member in FIG. The spacer member 27 in this example is configured to include the spacer portion 39 and the conductor portion 26. When only the spacer portion 39 is regarded as a spacer member, the entirety of the spacer portion 39 and the conductor portion 26 is regarded as an interval holding member that holds the interval between the heat radiating plates 5 and 8 (accepts a compressive load). be able to. Here, the narrowly defined spacer portion 39 and the conductor portion 26 which cooperates with the spacer portion 39 to perform the spacer function will be described as a broadly defined spacer member (division type). That is, the spacer member does not need to be integrated, and may be an assembled member such as a plurality of stacked spacers. The spacer portion 39 is joined to the lower heat radiation surface 5 and the conductor portion 26 with a joining material such as solder using an insulating material such as ceramic. The conductor portion 26 is made of a material having good thermal conductivity such as copper, and is joined to the upper heat sink 8 with a joining material such as solder. As described above, a plurality of composite spacer members 27 including the spacer portion 39 made of an insulating material and the conductor portion 26 are provided, and receive a compressive force at the time of mold clamping. This composite spacer member 27 has insulating properties as a whole. It can be said that a plurality of sets of the spacing members (units) 27 including the spacer portions 39 are provided.
[0030]
Further, FIG. 7 is a cross-sectional view of a main part showing a modification of FIG. 6, in which a spacer portion 49 is provided in the middle, and conductor portions 36 are formed above and below it. The materials are the same as those of the embodiment shown in FIG. In this manner, the composite spacer member 46 of the spacer portion 49 and the conductor portion 36 sandwiching the spacer portion 49 from both sides may be used. Even in this case, the heat radiating plates 5 and 8 are insulated as a whole, and the compression force at the time of mold clamping is reduced. It becomes resistance.
[0031]
FIG. 8 is a cross-sectional view of a main part showing a modification of FIG. The conductor portion 56 is formed integrally with the lower heat sink 5 by pressing the conductor portion 56 protruding from the lower surface side of the upper heat sink 8. A spacer 69 is provided between the conductor portion 56 and the lower heat sink 5. The conductor portion 56 can be relatively easily formed by pressing the upper heat sink 8. Even if the composite spacer member 48 is formed as described above, the same effect as described above can be obtained. Here, in FIGS. 6 to 8, if the conductor portion is regarded as a part of each of the heat radiating plates 5 and 8, the spacer portions 39, 49 and 69 can be regarded as a simple single spacer member.
[0032]
FIG. 9 is a sectional view showing another embodiment of the spacer 9 in FIG. Before resin molding with a molding die, the periphery of the semiconductor element 2 and the semiconductor element 3 is primarily sealed with a primary resin, for example, an epoxy resin by a potting method (a casting method) or the like to form a spacer member 79. I have. In this way, it is also possible to use a resin.
[0033]
FIG. 10 is a longitudinal sectional view showing another embodiment of the present invention. A squeezing margin (also referred to as an annular projection) 18 is provided which protrudes from the outer peripheral surface of the heat radiation surface 15 of the upper heat radiation plate 8. FIG. 11 is an explanatory diagram as viewed from above. The annular protrusion 18 is formed to protrude in a ring shape along the outer periphery of the heat sink 8, in this example, in a rectangular shape. The annular projection 18 is plastically deformed and crushed when pressurized by the molding die, and serves as a resin shielding wall on the heat radiation surface 15 to prevent the resin from flowing around. By forming the upper heat radiating plate 8 in this manner, the squeezing margin 18 serves as a wall, and the effect of preventing the resin from wrapping around can be further increased. Here, a resin shielding wall is formed so as to protrude in an annular shape along the outer peripheral plate surface of the heat radiating plate 8 in advance, and the mold is brought into contact with the resin shielding wall (a rigid body wall that is not expected to be crushed) at the time of mold clamping. It is conceivable to prevent the resin from wrapping around. However, due to the plastic deformation (crushing) of the annular projections during the processing during mold clamping, the adhesion between the mold and the annular projections is significantly increased as compared to the case where the annular projections simply come into contact with each other. It can be said that the projection is more preferable. In order to form the annular projection 18, the heat sink 8 is stamped in an annular shape along the outer peripheral portion by press working or the like, and the embossed portion is moved by the stamping (engraving process), and the raised flesh is formed into an annular projection (crushing margin). For example, an appropriate method can be adopted.
[0034]
Note that the holding portion 19 is provided on the lower heat sink 5 so that the lower heat sink 5 can be pressed by a mold during molding. This has the significance of enabling the lower heat sink 5 to be sufficiently pressurized during mold clamping. Similarly, a squeezing margin (annular projection 18) may be provided on the heat radiating surface 14 side of the lower heat radiating plate 5. Similarly, it is plastically deformed and crushed at the time of pressurization, and serves as a resin shielding wall, which can prevent the resin from entering the heat radiation surface 14.
[Brief description of the drawings]
FIG. 1 is a longitudinal sectional view illustrating an example of a semiconductor device of the present invention.
FIG. 2 is a side view of FIG.
FIG. 3 is an explanatory view showing an arrangement of spacers in FIG. 1;
FIG. 4 is a sectional view of a main part showing another embodiment of the spacer according to the present invention.
FIG. 5 is an explanatory view showing another embodiment of the spacer according to the present invention.
FIG. 6 is an essential part cross-sectional view showing a modified example of the spacer according to the present invention.
FIG. 7 is a sectional view of an essential part showing another modified example of the spacer according to the present invention.
FIG. 8 is a sectional view of a main part showing a modified example of the spacer according to the present invention.
FIG. 9 is a sectional view showing another embodiment of the spacer according to the present invention.
FIG. 10 is a longitudinal sectional view showing another embodiment of the present invention.
FIG. 11 is an explanatory view of a crushing portion (annular projection) shown in FIG. 10;
[Explanation of symbols]
DESCRIPTION OF SYMBOLS 1 Semiconductor device 2 Semiconductor element 3 Semiconductor element 4 Solder 5 Lower heat sink 6 Electrode block 7 Electrode block 8 Upper heat sink 9, 19, 27, 29, 46, 48, 79 Spacer (spacer member)
14 Heat dissipation surface (lower heat sink)
15 Heat radiation surface (upper heat radiation plate)
18 Whitening (annular projection)
20 Resins 26, 36, 56 Conductor 39, 49, 69 Spacer

Claims (8)

半導体素子の一側面に第１の放熱板が設けられ、半導体素子の他側面に前記第１の放熱板と略平行に第２の放熱板が設けられた状態で成形型に収容され、前記第１および第２の放熱板のそれぞれ前記半導体素子と面した側と反対側を放熱面として露出するように樹脂で封止された半導体装置であって、前記第１の放熱板と第２の放熱板との間に、前記半導体素子に近接するとともにその外側の位置において、第１および第２の放熱板の間隔を両放熱板間の電気的絶縁を維持した状態で維持するスペーサ部材が設けられたことを特徴とする半導体装置。A first heat sink is provided on one side surface of the semiconductor element, and a second heat sink is provided substantially in parallel with the first heat sink on the other side surface of the semiconductor element. A semiconductor device which is sealed with a resin so as to expose a side opposite to a side facing the semiconductor element of each of a first heat radiation plate and a second heat radiation plate, wherein the first heat radiation plate and the second heat radiation A spacer member is provided between the first heat radiation plate and the heat radiation plate at a position close to and outside the semiconductor element, while maintaining an electrical insulation between the heat radiation plates. A semiconductor device characterized by the above-mentioned. 前記スペーサ部材は、第１および第２の放熱板の接近方向に作用する圧縮荷重に対抗する受圧構造部とされ、一端部が第１の放熱板に、他端部が第２の放熱板に当接または係合している請求項１記載の半導体装置。The spacer member is a pressure receiving structure portion that resists a compressive load acting in a direction in which the first and second heat radiating plates approach each other. 2. The semiconductor device according to claim 1, wherein the semiconductor device is in contact with or engaged with the semiconductor device. 第１の放熱板の同一平面上に複数の半導体素子が設けられ、これら半導体素子の前記第１の放熱板に面した側と反対側に、前記第１の放熱板と略平行に第２の放熱板が設けられた状態で成形型に収容され、前記第１および第２の放熱板のそれぞれ前記半導体素子と面した側と反対側を放熱面として露出するように樹脂で封止される半導体装置であって、
前記第１および第２の放熱板の間に、前記複数の半導体素子のそれぞれに近接するとともにその外側の位置において、第１および第２の放熱板の間隔を両放熱板間の電気的絶縁を維持した状態で維持するスペーサ部材が設けられたことを特徴とする半導体装置。A plurality of semiconductor elements are provided on the same plane of the first radiator plate, and a second semiconductor element is provided on a side of the semiconductor element opposite to the side facing the first radiator plate, substantially in parallel with the first radiator plate. A semiconductor which is housed in a molding die in a state where a heat radiating plate is provided, and is sealed with a resin so as to expose the first and second heat radiating plates on the side opposite to the side facing the semiconductor element as a heat radiating surface. A device,
Between the first and second heat radiating plates, a distance between the first and second heat radiating plates was maintained close to each of the plurality of semiconductor elements and at a position outside the semiconductor devices to maintain electrical insulation between the two heat radiating plates. A semiconductor device comprising a spacer member for maintaining a state. 前記スペーサ部材は、電気的な絶縁材料からなり、円柱状と角柱状と球状と直方体状とのうちのいずれかをなすスペーサ部材であり、前記第１および第２の放熱板間に両放熱板によって挟まれるように複数設けられることを特徴とする請求項１ないし３のいずれか１項に記載の半導体装置。The spacer member is made of an electrically insulating material, and is a spacer member having any one of a cylindrical shape, a prismatic shape, a spherical shape, and a rectangular parallelepiped shape, and both heat sinks between the first and second heat sinks. The semiconductor device according to claim 1, wherein a plurality of the semiconductor devices are provided so as to be sandwiched between the semiconductor devices. 前記スペーサ部材は、導体部と絶縁材料からなるスペーサ部とを含んで形成され、前記第１および第２の放熱板間に両放熱板によって挟まれるように複数設けられることを特徴とする請求項１ないし３のいずれか１項に記載の半導体装置。The said spacer member is formed including the conductor part and the spacer part which consists of an insulating material, and is provided with two or more so that it may be pinched | interposed by both heat sinks between the said 1st and 2nd heat sinks. The semiconductor device according to any one of claims 1 to 3. 前記導体部は、前記第１および前記第２の放熱板の少なくとも一方に、他方と面する側に一体形成した突出部として形成され、この突出部と前記他方の放熱板との間に絶縁材料からなる前記スペーサ部が設けられることを特徴とする請求項５記載の半導体装置。The conductor is formed as a protrusion integrally formed on at least one of the first and second heat sinks on a side facing the other, and an insulating material is provided between the protrusion and the other heat sink. 6. The semiconductor device according to claim 5, wherein said spacer portion comprising: 前記スペーサ部材は、成形金型で樹脂モールドする前に、前記半導体素子の周りを一次的に封止する一次樹脂であることを特徴とする請求項１ないし３のいずれか１項に記載の半導体装置。4. The semiconductor according to claim 1, wherein the spacer member is a primary resin that temporarily seals around the semiconductor element before resin molding with a molding die. 5. apparatus. 前記第１および第２の放熱板の少なくとも１つの放熱板の放熱面の外周部に、成形型で加圧時に変形する突起部をその外周部に沿って設けることを特徴とする請求項１ないし７のいずれか１項に記載の半導体装置。4. A projection formed on an outer peripheral portion of a heat radiating surface of at least one of the first and second heat radiating plates along an outer peripheral portion thereof, the protrusion being deformed when pressed by a molding die. 8. The semiconductor device according to claim 7.
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KR20230000986A (en) * 2021-06-25 2023-01-03 주식회사 아모센스 Power module
KR102611687B1 (en) * 2021-06-25 2023-12-08 주식회사 아모센스 Power module

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