JP2007287833A - Power semiconductor device - Google Patents

Power semiconductor device Download PDF

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JP2007287833A
JP2007287833A JP2006111832A JP2006111832A JP2007287833A JP 2007287833 A JP2007287833 A JP 2007287833A JP 2006111832 A JP2006111832 A JP 2006111832A JP 2006111832 A JP2006111832 A JP 2006111832A JP 2007287833 A JP2007287833 A JP 2007287833A
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semiconductor device
connection circuit
block
power semiconductor
circuit board
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JP4637784B2 (en
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Shingo Sudo
進吾 須藤
Yasumi Kamigai
康己 上貝
Yasushi Nakajima
泰 中島
Toshio Kobayashi
利夫 小林
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Mitsubishi Electric Corp
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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/35Mechanical effects
    • H01L2924/351Thermal stress

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Die Bonding (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

<P>PROBLEM TO BE SOLVED: To construct a power semiconductor device with a large current carrying capacity without increasing the size and to keep it connected even in a temperature cycle during operation. <P>SOLUTION: The power semiconductor device comprises a first circuit board which is such that a conductive metal foil is pasted on one face and a first connection circuit is formed and a rear electrode of a semiconductor element is fixed to a predetermined position of the first connection circuit; first current-carrying block fixed to a fixed front electrode of the semiconductor element; a plurality of second current-carrying blocks which are fixed to predetermined positions of the first connection circuit and are adjusted to the height of the first current-carrying block; elastic member arranged on the opposite side from a second connection circuit of a second circuit board which is such that a conductive metal foil is pasted on one face and the second connection circuit is formed, with the second connection circuit in contact with end faces of the first current-carrying block and second current-carrying block; and pressure component arranged on a face of the elastic member opposite from the second circuit board. The pressure component and a cooling plate are tightened up by a tightening member. <P>COPYRIGHT: (C)2008,JPO&INPIT

Description

この発明は、大電流の電力変換に供される電力用半導体装置に関するものである。   The present invention relates to a power semiconductor device used for high-current power conversion.

従来の電力用半導体装置では、半導体素子の通電端子部分には、アルミワイヤを超音波接続するワイヤボンディングが多用されている。しかし、このワイヤボンディングは生産性が低く、断続通電による温度サイクルによって接合部に亀裂が発生し易く温度サイクル寿命が短いという問題点がある。このような問題点を解消して温度サイクル寿命が長くなる構成としては、例えば、特許文献1にパワー半導体モジュールとして開示されている。   In a conventional power semiconductor device, wire bonding for ultrasonically connecting an aluminum wire is frequently used for a current-carrying terminal portion of a semiconductor element. However, this wire bonding has a problem that productivity is low and cracks are likely to occur in the joint due to a temperature cycle caused by intermittent energization, resulting in a short temperature cycle life. For example, Patent Document 1 discloses a power semiconductor module as a configuration that eliminates such problems and increases the temperature cycle life.

特許文献1に開示された構成は、特許文献1の図1、図2に示されているように、上面に所定の回路を形成し、接触部には導電性の接触部を配設し、下面が冷却体に接触した基板と、基板の両側の同一平面状に配設された導体プレートと、基板上面の接触部に半導体素子の接続部を対向させて配設された半導体素子と、可撓性材料の表面に接続回路を形成し、半導体素子を配設した基板、導体プレートを覆うように配設し、半導体素子、基板および導体プレートに接触する接触部にイボ状の突起を設けた可撓性導体プレートと、可撓性導体プレートの上面に圧力蓄積体を配設し、圧力蓄積体の上面に配設された圧力プレートとからなり、半導体素子と基板の接触部はロー付け等の材料接合式で接続し、半導体素子の基板側とは反対側の上面接触部と可撓性導体プレートとの接続、可撓性導体プレートと基板および導体プレートとの接続は、冷却体と圧力プレートとの間を締め付けることで、圧力蓄積体を介して各接触部に圧力を加えることで接触するように構成されている。   In the configuration disclosed in Patent Document 1, as shown in FIGS. 1 and 2 of Patent Document 1, a predetermined circuit is formed on the upper surface, and a conductive contact portion is disposed on the contact portion. A substrate having a lower surface in contact with the cooling body, a conductor plate disposed on the same plane on both sides of the substrate, a semiconductor element disposed with a contact portion of the semiconductor element facing the contact portion on the upper surface of the substrate, and A connection circuit is formed on the surface of the flexible material, and is disposed so as to cover the substrate on which the semiconductor element is disposed and the conductor plate, and is provided with a warped projection at a contact portion that contacts the semiconductor element, the substrate and the conductor plate. It consists of a flexible conductor plate and a pressure accumulation body disposed on the upper surface of the flexible conductor plate, and a pressure plate disposed on the upper surface of the pressure accumulation body. The contact portion between the semiconductor element and the substrate is brazed or the like The upper surface contact on the opposite side of the substrate side of the semiconductor element The connection between the flexible conductor plate and the flexible conductor plate, and the connection between the flexible conductor plate and the substrate and the conductor plate are achieved by tightening the space between the cooling body and the pressure plate so that pressure is applied to each contact portion via the pressure accumulation body. It is comprised so that it may contact by adding.

このように構成された特許文献1のパワー半導体モジュールは、各接触部が圧力蓄積体を介して締め付けることで、可撓性導体プレートの表面に凹凸があっても安定した電気接触が確立されるものである。
また、特許文献2には、ワイヤボンディングを使用しない構造の半導体装置が示されている。この構成は、半導体素子の電極上に溶接シリンダを載置し、基板間の回路を構成する構造である。
In the power semiconductor module of Patent Document 1 configured as described above, each contact portion is tightened via a pressure accumulator, so that stable electrical contact is established even if the surface of the flexible conductor plate is uneven. Is.
Patent Document 2 discloses a semiconductor device having a structure that does not use wire bonding. This configuration is a structure in which a welding cylinder is placed on an electrode of a semiconductor element to constitute a circuit between substrates.

特開2002−353408号公報JP 2002-353408 A 特開2004−312997号公報JP 2004-312997 A

上記特許文献1に開示された構成の半導体素子と基板との接続は、ロー付け等の材料接合式で接続され、半導体素子の表面電極との接続部は、可撓性導体プレートで接続されているので、接触部の温度サイクル寿命は長くなる特徴を有しているが、可撓性導体プレートの表面に設けられた接続回路は、可撓性を必要とするので厚さを厚くすることができず、また、接触部は突起が押し付けられることで接触状態が確保される構成であり、接触面積が小さく電流容量を大きくすることができないという問題点があった。
また、特許文献2の溶融する溶接シリンダを用いた構成では、溶接シリンダにSnやSn−Pb合金系の半田が用いられられるが、半導体素子がSiで構成され高温で使用される半導体装置では、線膨張係数の小さなSiに対して、溶接シリンダは線膨張係数が20ppm/℃を越える材料からなり、半導体素子のSiの線膨張係数に対して非常に大きな値であり、大電流電力用半導体装置における断続通電による温度差の大きな温度サイクルによって溶接シリンダに大きな熱応力が加わり、溶接シリンダにクラックが発生して回路が遮断される可能性がある問題点があった。
The connection between the semiconductor element having the structure disclosed in Patent Document 1 and the substrate is connected by a material bonding method such as brazing, and the connection portion with the surface electrode of the semiconductor element is connected by a flexible conductor plate. Therefore, the temperature cycle life of the contact portion has a long characteristic, but the connection circuit provided on the surface of the flexible conductor plate needs to be flexible, so that the thickness can be increased. In addition, the contact portion has a configuration in which the contact state is ensured by pressing the protrusion, and there is a problem that the contact area is small and the current capacity cannot be increased.
In the configuration using the welding cylinder which melts in Patent Document 2, Sn or Sn-Pb alloy-based solder is used for the welding cylinder. However, in the semiconductor device in which the semiconductor element is made of Si and used at a high temperature, With respect to Si having a small linear expansion coefficient, the welding cylinder is made of a material having a linear expansion coefficient exceeding 20 ppm / ° C., which is a very large value with respect to the linear expansion coefficient of Si of the semiconductor element. There is a problem that a large thermal stress is applied to the welding cylinder due to a temperature cycle having a large temperature difference due to intermittent energization in the case, and the circuit may be interrupted due to a crack generated in the welding cylinder.

この発明は、上記問題点を解消するためになされたものであり、半導体素子相互間の接続回路の電流容量を大きくすることが装置寸法を大きくすることなく容易に実現でき、運転時の温度サイクルによってクラックが発生しても接続状態が維持できる電力用半導体装置を構成することを目的とする。   The present invention has been made to solve the above problems, and it is possible to easily increase the current capacity of the connection circuit between the semiconductor elements without increasing the size of the apparatus, and the temperature cycle during operation. It is an object of the present invention to configure a power semiconductor device that can maintain a connected state even if cracks occur.

この発明に係る電力用半導体装置は、表面および裏面に電極を備えた複数の半導体素子と、半導体素子で発生する熱を放熱する冷却板と、絶縁材で構成され、少なくとも片面に導電性金属箔が貼着されて第一の接続回路が形成され、第一の接続回路の所定の位置に半導体素子の裏面電極が固着され、第一の接続回路の裏面が冷却板に固着された第一の回路基板と、一方が第一の接続回路に固着された半導体素子の複数の表面電極へそれぞれ固着された複数の第一の通電ブロックと、一方が第一の接続回路の所定の位置に固着され、第一の通電ブロックの高さに一致する高さに調整された複数の第二の通電ブロックと、
絶縁材で構成され、少なくとも片面に導電性金属箔が貼着されて第二の接続回路が形成され、第二の接続回路を複数の第一の通電ブロックおよび複数の第二の通電ブロックの端面に接触させた第二の回路基板と、第二の回路基板の第二の接続回路が形成された反対面に配置された弾性部材と、弾性部材の第二の回路基板側の反対面に配置された加圧部材と、加圧部材と冷却板の間を締結する締結部材とを備え、冷却板と加圧部材との間を締結部材により締め付けることにより、弾性部材を介して第一の回路基板、複数の半導体素子、第一の通電ブロックおよび第二の通電ブロック、第二の回路基板それぞれに押圧力を加えたものである。
A power semiconductor device according to the present invention is composed of a plurality of semiconductor elements having electrodes on the front and back surfaces, a cooling plate that dissipates heat generated by the semiconductor elements, and an insulating material, and at least one surface of the conductive metal foil. Is attached to form the first connection circuit, the back electrode of the semiconductor element is fixed at a predetermined position of the first connection circuit, and the back surface of the first connection circuit is fixed to the cooling plate. A circuit board, a plurality of first current-carrying blocks each fixed to a plurality of surface electrodes of a semiconductor element, one of which is fixed to the first connection circuit, and one of which is fixed to a predetermined position of the first connection circuit A plurality of second energization blocks adjusted to a height that matches the height of the first energization block;
Consists of insulating material, conductive metal foil is attached to at least one surface to form a second connection circuit, and the second connection circuit is connected to the end surfaces of the plurality of first current-carrying blocks and the plurality of second current-carrying blocks. A second circuit board in contact with the elastic member, an elastic member disposed on the opposite surface of the second circuit board on which the second connection circuit is formed, and an elastic member disposed on the opposite surface of the second circuit board side. The first circuit board via the elastic member by fastening the pressure member, and a fastening member that fastens the pressure member and the cooling plate between the cooling plate and the pressure member. A pressing force is applied to each of the plurality of semiconductor elements, the first energization block, the second energization block, and the second circuit board.

この発明の係る電力用半導体装置は、半導体素子を装着する第一の回路基板と、半導体装置を構成する接続回路を形成する第二の回路基板を板状の絶縁材の表面に導電性金属箔を貼着して接続回路を構成したことにより、接続回路を構成する導電性金属箔の厚さを厚くすることが容易となり、半導体素子の電極と基板との間および第一の回路基板と第二の回路基板の相互間の接続は、通電ブロックにより接続する構成としたことにより、大電流容量の電力用半導体装置が装置寸法を大きくすることなく構成できる。
また、弾性部材により各接触部に押圧力が加えられているので、温度サイクルによって半田部分にクラックの発生があっても、通電機能は確保されて継続運転が可能な電力用半導体装置が提供できる。
A power semiconductor device according to the present invention includes a first circuit board on which a semiconductor element is mounted and a second circuit board on which a connection circuit constituting the semiconductor device is formed on the surface of a plate-like insulating material. Since the connection circuit is configured by sticking, it becomes easy to increase the thickness of the conductive metal foil constituting the connection circuit, and between the electrode of the semiconductor element and the substrate and between the first circuit substrate and the first circuit substrate. The connection between the two circuit boards is made by connecting with the energization block, so that the power semiconductor device having a large current capacity can be configured without increasing the size of the device.
In addition, since the pressing force is applied to each contact portion by the elastic member, it is possible to provide a power semiconductor device that can maintain an energization function and can be continuously operated even if a crack occurs in the solder portion due to a temperature cycle. .

実施の形態1.
図1は実施の形態1の電力用半導体装置の外観を示した斜視図であり、図2は図1の構成のA−A部の断面図である。
実施の形態1の電力用半導体装置は、半導体素子として、絶縁ゲート型バイポーラトランジスタ(IGBT:以下半導体素子15と呼称する)2個と還流ダイオード(FWDi:以下半導体素子16と呼称する)を2個で電力用半導体装置を構成する場合について説明する。
半導体素子15は、縦横各10mm、厚さ0.4mmの大きさであり、裏面にはコレクタ電極15a、表面にはゲート電極およびエミッタ電極15bが設けられている。
半導体素子16は、縦横各10mm、厚さ0.4mmの大きさであり、裏面にはカソード電極16a、表面にはアノード電極16bが設けられている。
Embodiment 1 FIG.
FIG. 1 is a perspective view showing an appearance of the power semiconductor device according to the first embodiment, and FIG. 2 is a cross-sectional view taken along the line AA of the configuration of FIG.
The power semiconductor device of the first embodiment includes two insulated gate bipolar transistors (IGBT: hereinafter referred to as semiconductor element 15) and two free-wheeling diodes (FWDi: hereinafter referred to as semiconductor element 16) as semiconductor elements. A case where a power semiconductor device is configured will be described.
The semiconductor element 15 is 10 mm in length and width, and has a thickness of 0.4 mm. A collector electrode 15 a is provided on the back surface, and a gate electrode and an emitter electrode 15 b are provided on the front surface.
The semiconductor element 16 is 10 mm in length and width, and has a thickness of 0.4 mm. A cathode electrode 16 a is provided on the back surface, and an anode electrode 16 b is provided on the front surface.

図1の構成は、冷却板1の基板載置面にシリコーン等の伝熱効果を高めるグリースを塗布し、セラミック等の絶縁板の片面には第一の接続回路12aを形成する例えば銅(Cu)等の導電性金属箔、反対面にも同様の銅(Cu)等の導電性金属箔12bを貼着した第一の回路基板11を載置し、この第一の回路基板11の第一の接続回路12aの所定の位置に、半導体素子15および半導体素子16を載置してコレクタ電極である裏面電極15a、およびカソード電極である裏面電極16aを半田20により固着し、第一の接続回路12aに固着された半導体素子15および半導体素子16の複数の表面電極へ複数の第一の通電ブロック21の一端側を半田20により固着し、第一の接続回路12aの所定の位置に第二の通電ブロック22の一端を半田20により固着し、第一の回路基板11の第一の接続回路12aの所定の位置に通電導体31および制御導体32の一端側を半田20により固着し、セラミック等の絶縁板の片面には第二の接続回路14aを形成する例えば銅(Cu)等の導電性金属箔、反対面にも同様の銅(Cu)等の導電性金属箔14bを貼着した第二の回路基板13の第二の接続回路14aを半導体素子側として第一の通電ブロック21および第二の通電ブロック22の上端に接触する状態で載置して半田20により固着し、第二の回路基板13の第二の接続回路14aの反対面にシリコーンゴム等の耐熱性と弾力性を備えた弾性部材25を載置し、この弾性部材25の上面に、締結用ボルト穴2aおよび接続端子31および接続端子33を挿通する導体挿通穴2b、2cを孔設し、導体挿通穴2b、2cに絶縁ブッシュ32、34を装着した加圧部材2を載置し、第一の回路基板11、半導体素子15および半導体素子16および第二の回路基板13を積層した外周部に枠体2を配置し、締結ボルト4により冷却板1と加圧部材2との間を適正な締付力で締め付ける。   In the configuration of FIG. 1, grease that enhances the heat transfer effect such as silicone is applied to the substrate mounting surface of the cooling plate 1, and a first connection circuit 12a is formed on one surface of an insulating plate such as ceramic. The first circuit board 11 on which the same conductive metal foil 12b such as copper (Cu) is adhered is placed on the opposite surface, and the first circuit board 11 of the first circuit board 11 is placed on the opposite side. The semiconductor element 15 and the semiconductor element 16 are placed at predetermined positions of the connection circuit 12a, and the back electrode 15a as the collector electrode and the back electrode 16a as the cathode electrode are fixed by the solder 20, and the first connection circuit One end side of the plurality of first current-carrying blocks 21 is fixed to the plurality of surface electrodes of the semiconductor element 15 and the semiconductor element 16 fixed to the semiconductor element 12 by the solder 20, and the second connection circuit 12 a is placed at a predetermined position in the first connection circuit 12 a. Of the current-carrying block 22 One end of the conductive conductor 31 and the control conductor 32 is fixed to a predetermined position of the first connection circuit 12a of the first circuit board 11 with the solder 20, and one end of an insulating plate such as ceramic is fixed. The second circuit board 13 is formed by attaching a conductive metal foil such as copper (Cu), for example, which forms the second connection circuit 14a, and a similar conductive metal foil 14b such as copper (Cu) on the opposite surface. The second connection circuit 14a is placed on the semiconductor element side in contact with the upper ends of the first energization block 21 and the second energization block 22 and fixed by the solder 20, and the second circuit board 13 An elastic member 25 having heat resistance and elasticity such as silicone rubber is placed on the opposite surface of the second connection circuit 14 a, and the fastening bolt hole 2 a, the connection terminal 31, and the connection terminal 33 are placed on the upper surface of the elastic member 25. Conductor insertion The holes 2b and 2c are formed, and the pressure member 2 with the insulating bushes 32 and 34 mounted on the conductor insertion holes 2b and 2c is placed, and the first circuit board 11, the semiconductor element 15, the semiconductor element 16, and the second The frame body 2 is arranged on the outer peripheral portion where the circuit board 13 is laminated, and the fastening plate 4 is used to fasten the cooling plate 1 and the pressure member 2 with an appropriate tightening force.

第一の回路基板11と第二の回路基板13の間の間隙には、第一の接続回路12a、第二の接続回路14aや第一の通電ブロック21、第二の通電ブロック22相互間の絶縁耐力を確保するためにシリコーンゲルなどの絶縁充填材7を充填する。
第一の回路基板11と第二の回路基板13との間に絶縁充填剤7を充填することにより内部の絶縁耐力が確保される
In the gap between the first circuit board 11 and the second circuit board 13, the first connection circuit 12a, the second connection circuit 14a, the first energization block 21, and the second energization block 22 are mutually connected. In order to ensure the dielectric strength, an insulating filler 7 such as silicone gel is filled.
By filling the insulating filler 7 between the first circuit board 11 and the second circuit board 13, the internal dielectric strength is ensured.

このように構成したことにより、弾性部材25を介して第一の回路基板11、半導体素子15、半導体素子16、第二の回路基板13に適正な押圧力が与えられ、弾性部材25の反発力により、第1の通電ブロック21および第二の通電ブロック22の半田20により固着した部分に適正な押圧力が与えられた状態が維持される。   With this configuration, an appropriate pressing force is applied to the first circuit board 11, the semiconductor element 15, the semiconductor element 16, and the second circuit board 13 through the elastic member 25, and the repulsive force of the elastic member 25. Thus, a state in which an appropriate pressing force is applied to the portions of the first energizing block 21 and the second energizing block 22 fixed by the solder 20 is maintained.

第一の通電ブロック21および第二の通電ブロック22の端部と第二の接続回路14aとの間は半田により固着しなくても、弾性部材25の反発力で常時押圧力が与えられているので、通電各接触部の通電機能は確保され、第二の接続回路14aとの接続部は必ずしも半田20による固着は必要でない。   Even if the end portions of the first energization block 21 and the second energization block 22 and the second connection circuit 14a are not fixed by solder, a pressing force is always applied by the repulsive force of the elastic member 25. Therefore, the energization function of each energization contact portion is ensured, and the connection portion with the second connection circuit 14a is not necessarily fixed by the solder 20.

半導体素子15の表面電極15bおよび半導体素子16の表面電極16bの表面には半田が濡れるように例えば最表面がニッケルとなるような金属膜が蒸着などの方法により処理されている。   For example, a metal film whose outermost surface is nickel is treated on the surfaces of the surface electrode 15b of the semiconductor element 15 and the surface electrode 16b of the semiconductor element 16 so as to wet the solder by a method such as vapor deposition.

また、各接続部を固着する半田20は、半導体素子15および半導体素子16の使用温度において固着状態が維持できる溶融温度の半田が使用される。例えば図2の構成では、Sn−Ag−Cuを主成分とし、厚さ0.15mmの半田を使用している。   Further, as the solder 20 for fixing each connection portion, a solder having a melting temperature capable of maintaining the fixed state at the use temperature of the semiconductor element 15 and the semiconductor element 16 is used. For example, in the configuration of FIG. 2, Sn—Ag—Cu is used as a main component and a solder having a thickness of 0.15 mm is used.

また、半導体素子の基材として、炭化シリコン(SiC)を用いた半導体素子では、最高使用温度が250℃程度の温度でも使用できるので、この場合の半田の材質は、Au−Sn系やAl−Si系のものが使用される。   In addition, a semiconductor element using silicon carbide (SiC) as a base material of the semiconductor element can be used even at a maximum use temperature of about 250 ° C. Therefore, the solder material in this case is Au—Sn or Al— Si-based ones are used.

第一の回路基板11および第二の回路基板13の実際の構成は、主として窒化アルミ(AlN)からなり厚さが0.635mmのセラミック板の両面に0.3mmの銅箔を貼着し、片面に第一の接続回路12aまたは第二の接続回路14aを形成している。
また、第二の回路基板13の大きさは、通電導体31および制御導体32を外部に導出する必要があるので、第一の回路基板11よりも小さくなっている。
The actual configuration of the first circuit board 11 and the second circuit board 13 is mainly composed of aluminum nitride (AlN), and a 0.3 mm copper foil is attached to both sides of a ceramic plate having a thickness of 0.635 mm, The first connection circuit 12a or the second connection circuit 14a is formed on one side.
The size of the second circuit board 13 is smaller than that of the first circuit board 11 because it is necessary to lead the conducting conductor 31 and the control conductor 32 to the outside.

半導体素子15の表面電極15bおよび半導体素子16の表面電極16bと第二の接続回路12aとの間を接続する第一の通電ブロック21は、直径2.0、長さ2.0mmの中実円形の棒状ブロックとし、軸方向が接続面に対して垂直方向に配置して両端面が半田20により固着される。
第一の回路基板11の第一の接続回路12aと第二の接続回路14aとの間を接続する第二の通電ブロック22は、直径2.0mm、長さ2.5mmの中実円形の棒状ブロックとし、軸方向が接続面に対して垂直方向に配置して両端面が半田20により固着される。
The first energization block 21 connecting the surface electrode 15b of the semiconductor element 15 and the surface electrode 16b of the semiconductor element 16 and the second connection circuit 12a is a solid circle having a diameter of 2.0 and a length of 2.0 mm. These rod-shaped blocks are arranged such that the axial direction is perpendicular to the connection surface, and both end surfaces are fixed by solder 20.
The second current-carrying block 22 that connects between the first connection circuit 12a and the second connection circuit 14a of the first circuit board 11 is a solid circular rod having a diameter of 2.0 mm and a length of 2.5 mm. It is set as a block, the axial direction is arranged in a direction perpendicular to the connection surface, and both end surfaces are fixed by solder 20.

通電導体31は、第一の接続回路12aの所定の位置に一端を半田20にて固着し、加圧部材2の導体挿通穴2bに絶縁ブッシュ33を装着し、その内径部に挿通して外部に導出し、制御導体32は、第一の接続回路12aの所定の位置に一端を半田20にて固着し、加圧部材2の導体挿通穴2cに絶縁ブッシュ34を装着し、その内径を挿通して外部に導出される。
絶縁ブッシュ32または絶縁ブッシュ34は接続導体31または33と加圧部材2との間の沿面絶縁距離を確保するために、例えば、通電導体31の場合には、図3(a)または(b)に示すように絶縁ブッシュ33に図3(a)の33aまたは図3(b)の33bように溝加工を施して沿面絶縁距離を長くすると沿面絶縁耐力を高くすることができる。
The conducting conductor 31 has one end fixed to a predetermined position of the first connection circuit 12a with the solder 20, and an insulating bush 33 is attached to the conductor insertion hole 2b of the pressurizing member 2, and is inserted into the inner diameter portion thereof to be externally connected. The control conductor 32 has one end fixed to a predetermined position of the first connection circuit 12a with the solder 20, the insulation bush 34 is attached to the conductor insertion hole 2c of the pressure member 2, and the inner diameter thereof is inserted. And derived to the outside.
The insulating bush 32 or the insulating bush 34 is used to secure a creeping insulation distance between the connecting conductor 31 or 33 and the pressing member 2. As shown in FIG. 3, the creeping dielectric strength can be increased by forming grooves on the insulating bush 33 as shown in 33a of FIG. 3A or 33b of FIG. 3B to increase the creeping insulation distance.

このように電力用半導体装置を構成すると、半導体素子間の接続回路が第一の回路基板11および第二の回路基板13に設けた第一の接続回路12aおよび第二の接続回路14aを形成する銅等の導電性金属箔の厚さを厚くすることが容易となり、第一の回路基板11と第二の回路基板13の間を接続する第二の通電導体22および半導体素子15の表面電極15b、半導体素子16の表面電極16bと第二の接続回路14aとの間を接続する第一の通電導体21は断面積は周囲に殆ど影響することなく大きくすることができるので、電力用半導体装置の寸法を大きくすることなく構成できるようになり、例えば通電電流が100Aを越える大電流用の電力用半導体装置でも容易に構成することができる。   When the power semiconductor device is configured in this way, the connection circuit between the semiconductor elements forms the first connection circuit 12a and the second connection circuit 14a provided on the first circuit board 11 and the second circuit board 13. It becomes easy to increase the thickness of the conductive metal foil such as copper, the second current-carrying conductor 22 connecting the first circuit board 11 and the second circuit board 13, and the surface electrode 15 b of the semiconductor element 15. Since the first conducting conductor 21 connecting the surface electrode 16b of the semiconductor element 16 and the second connection circuit 14a can be increased in cross-sectional area with little influence on the surroundings, the power semiconductor device For example, even a power semiconductor device for a large current having an energization current exceeding 100 A can be easily configured.

また、弾性部材により各接触部に押圧力が加えられているので、温度サイクルにより半田にて固着した部分にクラックが発生しても、押圧力により通電機能は確保されているので継続運転が可能な電力用半導体装置となる。
さらに、第一の通電ブロック21および第二の通電ブロック22の第二の接続回路14aへの接続は弾性部材25により常時加えられる押圧力により加圧されているので半田による固着をしないでも接触状態が確保される。
In addition, since the pressing force is applied to each contact part by the elastic member, even if a crack occurs in the part fixed by soldering due to the temperature cycle, the energizing function is secured by the pressing force, so continuous operation is possible It becomes a semiconductor device for electric power.
Further, since the connection of the first energization block 21 and the second energization block 22 to the second connection circuit 14a is pressurized by the pressing force constantly applied by the elastic member 25, it is in a contact state without being fixed by solder. Is secured.

実施の形態2.
実施の形態1の第一の通電ブロック21は直径2mmの銅材を長さ2mmの中実円形の棒状ブロックに切断した構成とし、第二の通電ブロック22は直径2mmの銅材を長さ2.5mmの中実円形棒状ブロックに切断した構成とし、第一の接続回路12aと第二の接続回路14aの所定の位置に配置する構成であったが、直径2mmの銅等の導電性材料を長さのバラツキなく加工することは高精度の加工技術を必要とする。
実施の形態2では、半導体素子の電極方面と回路基板に設けられた接続回路の位置の接続距離に一致する直径の銅材を使用するものである。
Embodiment 2. FIG.
The first energizing block 21 of the first embodiment has a configuration in which a copper material having a diameter of 2 mm is cut into a solid circular rod-like block having a length of 2 mm, and the second energizing block 22 has a length of 2 mm. .5 mm solid circular rod-shaped block cut and arranged at predetermined positions of the first connection circuit 12a and the second connection circuit 14a, but a conductive material such as copper having a diameter of 2 mm is used. Machining without length variation requires high-precision machining technology.
In the second embodiment, a copper material having a diameter that matches the connection distance between the electrode direction of the semiconductor element and the position of the connection circuit provided on the circuit board is used.

図4は実施の形態2の通電ブロック部分の構成図である。
図4(a)は半導体素子の表面電極上面に通電ブロックを載置した状態を示し、図4(b)は半導体素子の表面電極と回路基板に形成された接続回路との接続部の半田付けの状態を示す図である。
FIG. 4 is a configuration diagram of the energization block portion of the second embodiment.
FIG. 4A shows a state in which a current-carrying block is placed on the upper surface of the surface electrode of the semiconductor element, and FIG. 4B shows soldering of the connection portion between the surface electrode of the semiconductor element and the connection circuit formed on the circuit board. It is a figure which shows the state of.

実施の形態2の通電ブロック41は、図4(a)に示すとおり接続部の離隔距離の相当する直径の棒材を必要な長さに切断し、軸方向を接続面に対して平行に配置して表面電極16aまたは接続回路の所定の位置に半田20により固着する構成としたものである。図4(a)状態で両側を半田20にて固着した状態は図4(b)の状態となり、棒材の周囲に半田20が取り巻く状態となり必要な通電容量は確保される。   In the energizing block 41 of the second embodiment, as shown in FIG. 4A, a rod having a diameter corresponding to the separation distance of the connecting portion is cut to a required length, and the axial direction is arranged in parallel to the connecting surface. Thus, the surface electrode 16a or the connection circuit is fixed to a predetermined position by the solder 20. In the state shown in FIG. 4 (a), the state where both sides are fixed by the solder 20 is the state shown in FIG. 4 (b), and the solder 20 is surrounded around the bar material, so that a necessary energization capacity is secured.

このように通電ブロック41を横方向にして半導体素子の電極に載置して半田20にて固着する構成にすると、通電ブロックの長さの切断精度は必要でなくなり、切断加工が容易となり、生産性が向上する。   If the current-carrying block 41 is placed horizontally on the electrode of the semiconductor element and fixed by the solder 20 as described above, the cutting accuracy of the length of the current-carrying block is not necessary, and the cutting process is facilitated and the production is facilitated. Improves.

実施の形態3.
実施の形態2では、通電ブロックを銅等の中実円形棒状の導電性材料を切断し、軸方向を接続面に対して平行に配置して半田20により固着する構成としたが、実施の形態3は円筒状の導電材料を切断して円筒状の通電ブロックとしたものである。
Embodiment 3 FIG.
In the second embodiment, the current-carrying block is configured to cut a solid circular rod-shaped conductive material such as copper, and the axial direction is arranged parallel to the connection surface and fixed by the solder 20. Reference numeral 3 denotes a cylindrical energization block obtained by cutting a cylindrical conductive material.

図5は実施の形態3の通電ブロック部分の構成図であり、図5(a)は半導体素子の電極上面に通電ブロックを載置して半田付けした状態を示し、図5(b)は半導体素子の電極と基板に形成された接続回路の半田付けの状態を示す図である。   FIG. 5 is a configuration diagram of the energization block portion of the third embodiment. FIG. 5A shows a state in which the energization block is placed on the upper surface of the electrode of the semiconductor element and soldered, and FIG. It is a figure which shows the state of soldering of the connection circuit formed in the electrode and board | substrate of an element.

実施の形態3の通電ブロック51は、図5(a)に示すとおり接続部の離隔距離の相当する外径の銅等の円筒状の導電性材料を必要な長さに切断して通電ブロックとし、軸方向を接続面に対して平行に配置して表面電極16aまたは第一の接続回路12aの所定の位置に半田20により固着する構成としたものである。図5(a)状態で両側を半田20にて固着した状態は図5(b)の状態となり、導電性材料の周囲に半田20が取り巻く状態となり必要な通電容量は確保される。   As shown in FIG. 5A, the energization block 51 of the third embodiment is formed by cutting a cylindrical conductive material such as copper having an outer diameter corresponding to the separation distance of the connection portion into a necessary length. In this configuration, the axial direction is arranged in parallel to the connection surface, and the surface electrode 16a or the first connection circuit 12a is fixed to a predetermined position by the solder 20. The state in which both sides are fixed by the solder 20 in the state of FIG. 5A becomes the state of FIG. 5B, and the state in which the solder 20 is surrounded around the conductive material ensures the necessary energization capacity.

このように円筒状の銅材を切断した通電ブロック51を接続面に対して平行に配置して半田20にて固着する構成にすると、接続部の離隔距離のバラツキが大きい場合でも、離隔距離より少し太めの管状の銅材を使用することにより、第一の回路基板11と第二の回路基板13による押圧力により離隔距離に応じて変形して良好な接触状態が確保される。
また、実施の形態2と同様に、接続面に対して平行に配置するので、通電ブロックの長さの精度は必要でなくなり、切断加工が容易となり、生産性が向上する。
When the current-carrying block 51 obtained by cutting the cylindrical copper material is arranged parallel to the connection surface and fixed by the solder 20, the separation distance of the connection portion is larger than the separation distance. By using a slightly thicker tubular copper material, the first circuit board 11 and the second circuit board 13 are deformed according to the separation distance by the pressing force of the first circuit board 11 and the second circuit board 13 to ensure a good contact state.
Moreover, since it arrange | positions in parallel with a connection surface similarly to Embodiment 2, the precision of the length of an electricity supply block is no longer required, a cutting process becomes easy and productivity improves.

実施の形態4.
実施の形態2では、通電ブロックを銅等の円形棒状の導電材料を切断して接続面に対して平行に配置して半田にて固着する方法であり、実施の形態3は円筒状の銅材を切断して通電ブロックとしたものであったが、実施の形態4は、導電材料を球状の形成した球状の通電ブロックとしたものである。
Embodiment 4 FIG.
In the second embodiment, the current-carrying block is a method of cutting a circular bar-shaped conductive material such as copper, arranging it parallel to the connection surface and fixing it with solder, and the third embodiment is a cylindrical copper material. However, Embodiment 4 is a spherical energization block in which a conductive material is formed in a spherical shape.

図6は実施の形態4の通電ブロック部分の構成図である。
図6(a)は半導体素子の電極上面に球状の通電ブロックを載置した状態を示し、図6(b)は半導体素子の電極と基板に形成された接続回路の半田付けにより固着した状態を示す図である。
FIG. 6 is a configuration diagram of the energization block portion of the fourth embodiment.
FIG. 6A shows a state where a spherical energization block is placed on the upper surface of the electrode of the semiconductor element, and FIG. 6B shows a state where the electrode of the semiconductor element and the connection circuit formed on the substrate are fixed by soldering. FIG.

実施の形態4の通電ブロック61は、図6(a)に示すとおり接続部の離隔距離の相当する直径の銅等の導電材料を球状に形成して電極または接続回路の所定の位置に配置して半田20により固着している。通電ブロック61が半導体素子の電極と接続回路間に半田20にて固着された状態は図6(b)の状態となる。球状の通電ブロック61が半田20が取り巻く状態となり必要な通電容量は確保される。   In the energization block 61 of the fourth embodiment, as shown in FIG. 6A, a conductive material such as copper having a diameter corresponding to the separation distance of the connection portion is formed in a spherical shape and arranged at a predetermined position of the electrode or the connection circuit. It is fixed by solder 20. The state in which the energization block 61 is fixed between the electrodes of the semiconductor element and the connection circuit with the solder 20 is the state shown in FIG. The spherical energization block 61 is surrounded by the solder 20, and a necessary energization capacity is secured.

このように球状の通電ブロック61を使用すると、球状のほぼ全面に半田20が濡れた状態となり良好な接続状態が確保される。
球状の通電ブロックは、銅等の導電材料の一端を所定量溶融させて落下途中で溶融状態での表面張力により、球状に固化させる等の方法により製作すれば切断した場合に発生するかえりが発生することがなく容易に製作することができる。
When the spherical energization block 61 is used in this way, the solder 20 is wetted on almost the entire spherical surface, and a good connection state is ensured.
Spherical energizing blocks generate burr when they are cut if they are manufactured by a method such as melting one end of a conductive material such as copper and solidifying it into a spherical shape by surface tension in the molten state during dropping It can be easily manufactured without doing.

実施の形態5.
実施の形態1〜実施の形態4では、加圧部材2を板状の金属材料で構成したが、この場合は、通電導体31、制御導体32を加圧部材2を貫通して外部へ導出する構成であったが、制御導体31は通電容量を必要としないので、基板に半田で固着する必要性はない。
実施の形態5は、制御導体の接触部を押圧方式とした実施の形態である。
Embodiment 5 FIG.
In the first to fourth embodiments, the pressure member 2 is made of a plate-like metal material. In this case, the current-carrying conductor 31 and the control conductor 32 are led out through the pressure member 2. Although the configuration is such that the control conductor 31 does not require an energization capacity, there is no need to be fixed to the substrate with solder.
Embodiment 5 is an embodiment in which the contact portion of the control conductor is a pressing method.

図7は実施の形態5の構成を示す断面図である。図7の構成は、制御導体71の基板との接触部を針状に尖らせ、加圧部材2に装着した絶縁ブッシュ73の内径部の部分に押圧ばね72を設けて外部に導出する構成としている。絶縁ブッシュ73の内径部分は段付き穴を設け押圧ばね72が段差部分で支持され、加圧部材2を装着すると先端部が押圧ばね72の押し付け力により接触圧力が与えられる。図7の制御導体以外の部分は図2と同一である。   FIG. 7 is a cross-sectional view showing the configuration of the fifth embodiment. The configuration of FIG. 7 is a configuration in which the contact portion of the control conductor 71 with the substrate is pointed like a needle, and a pressing spring 72 is provided on the inner diameter portion of the insulating bush 73 attached to the pressing member 2 and is led out to the outside. Yes. The inner diameter portion of the insulating bush 73 is provided with a stepped hole, and the pressing spring 72 is supported by the step portion. When the pressing member 2 is mounted, a contact pressure is applied to the tip portion by the pressing force of the pressing spring 72. The parts other than the control conductor in FIG. 7 are the same as those in FIG.

このように構成すると、制御胴体71の部分の構成が簡単になって組立が容易となり、生産性が向上する。   If comprised in this way, the structure of the part of the control body 71 will become simple, an assembly will become easy, and productivity will improve.

実施の形態6.
実施の形態6は、実施の形態1〜5の加圧部材2を絶縁被覆形に形成したものである。
図8は実施の形態6の構成図である。この構成では加圧部材80を、金属板を所定の寸法に形成し、締付用ボルト穴および通電導体、制御導体の挿通穴を孔設して締付板とし、締結ボルト4の頭部が接する部分を除いた全面に絶縁部材82により覆った構成としたものである。
Embodiment 6 FIG.
In the sixth embodiment, the pressure member 2 of the first to fifth embodiments is formed in an insulating coating shape.
FIG. 8 is a configuration diagram of the sixth embodiment. In this configuration, the pressurizing member 80 is formed of a metal plate with a predetermined size, and is provided with a tightening bolt hole, a conducting conductor, and an insertion hole for a control conductor to form a tightening plate. The entire surface excluding the contact portion is covered with an insulating member 82.

このように構成すると、通電導体31および制御導体32の挿通部に絶縁ブッシュを設ける必要がなくなって組立が容易となる。   If comprised in this way, it will become unnecessary to provide an insulation bush in the insertion part of the conduction | electrical_connection conductor 31 and the control conductor 32, and an assembly will become easy.

実施の形態1の電力用半導体装置の外観を示した斜視図である。1 is a perspective view illustrating an appearance of a power semiconductor device according to a first embodiment. 図1のA−A部の断面図である。It is sectional drawing of the AA part of FIG. 絶縁ブッシュの具体的な構成図である。It is a specific block diagram of an insulation bush. 実施の形態2の通電ブロック部分の構成図である。FIG. 6 is a configuration diagram of a current-carrying block portion according to a second embodiment. 実施の形態3の通電ブロック部分の構成図である。FIG. 6 is a configuration diagram of an energization block portion according to a third embodiment. 実施の形態4の通電ブロック部分の構成図である。FIG. 6 is a configuration diagram of an energization block portion according to a fourth embodiment. 実施の形態5の電力用半導体装置の構成図である。FIG. 10 is a configuration diagram of a power semiconductor device according to a fifth embodiment. 実施の形態6の電力用半導体装置の構成図である。FIG. 10 is a configuration diagram of a power semiconductor device according to a sixth embodiment.

符号の説明Explanation of symbols

1 冷却板、2 加圧部材、3 枠体、4 締結ボルト、7 絶縁充填材、
11 第一の回路基板、12a 第一の接続回路、13 第二の回路基板、
14a 第二の接続回路、15,16 半導体素子、20 半田、
21 第一の通電ブロック、22 第二の通電ブロック、25 弾性部材、
31 通電導体、32 制御導体、33 絶縁ブッシュ、34 絶縁ブッシュ、
41 通電ブロック、51 通電ブロック、61 通電ブロック、71 制御導体、
72 押圧ばね、73 絶縁ブッシュ、80 加圧部材、81 締付板、
82 絶縁部材。
1 cooling plate, 2 pressure member, 3 frame body, 4 fastening bolt, 7 insulating filler,
11 First circuit board, 12a First connection circuit, 13 Second circuit board,
14a Second connection circuit, 15, 16 semiconductor element, 20 solder,
21 first energization block, 22 second energization block, 25 elastic member,
31 Conducting conductor, 32 Control conductor, 33 Insulating bush, 34 Insulating bush,
41 energizing block, 51 energizing block, 61 energizing block, 71 control conductor,
72 pressure spring, 73 insulating bush, 80 pressure member, 81 clamping plate,
82 Insulating member.

Claims (10)

表面および裏面に電極を備えた複数の半導体素子と、半導体素子で発生する熱を放熱する冷却板と、絶縁材で構成され、少なくとも片面に導電性金属箔が貼着されて第一の接続回路が形成され、該第一の接続回路の所定の位置に上記半導体素子の裏面電極が固着され、上記第一の接続回路の裏面が上記冷却板に固着された第一の回路基板と、一方が上記第一の接続回路に固着された上記半導体素子の複数の表面電極へそれぞれ固着された複数の第一の通電ブロックと、一方が上記第一の接続回路の所定の位置に固着され、上記第一の通電ブロックの高さに一致する高さに調整された複数の第二の通電ブロックと、絶縁材で構成され、少なくとも片面に導電性金属箔が貼着されて第二の接続回路が形成され、該第二の接続回路を上記複数の第一の通電ブロックおよび上記複数の第二の通電ブロックの端面に接触させた第二の回路基板と、該第二の回路基板の第二の接続回路が形成された反対面に配置された弾性部材と、該弾性部材の第二の回路基板側の反対面に配置された加圧部材と、該加圧部材と上記冷却板の間を締結する締結部材とを備え、上記冷却板と上記加圧部材との間を上記締結部材により締め付けることにより、上記弾性部材を介して上記第一の回路基板、上記複数の半導体素子、上記第一の通電ブロックおよび第二の通電ブロック、第二の回路基板それぞれに押圧力を加えたことを特徴とする電力用半導体装置。 A plurality of semiconductor elements provided with electrodes on the front and back surfaces, a cooling plate that dissipates heat generated in the semiconductor elements, and an insulating material, and a conductive metal foil is attached to at least one surface of the first connection circuit A first circuit board in which a back electrode of the semiconductor element is fixed to a predetermined position of the first connection circuit, and a back surface of the first connection circuit is fixed to the cooling plate; A plurality of first current-carrying blocks each fixed to a plurality of surface electrodes of the semiconductor element fixed to the first connection circuit, one of which is fixed to a predetermined position of the first connection circuit; It is composed of a plurality of second energizing blocks adjusted to a height that matches the height of one energizing block, and an insulating material, and a conductive metal foil is attached to at least one surface to form a second connection circuit. The second connection circuit is connected to the plurality of first A second circuit board brought into contact with the energization block and the end faces of the plurality of second energization blocks; an elastic member disposed on the opposite surface on which the second connection circuit of the second circuit board is formed; A pressure member disposed on the opposite surface of the elastic member on the second circuit board side; and a fastening member that fastens the pressure member and the cooling plate; and between the cooling plate and the pressure member. By pressing the fastening member with the fastening member, the pressing force is applied to the first circuit board, the plurality of semiconductor elements, the first conduction block, the second conduction block, and the second circuit board through the elastic member. A power semiconductor device characterized by the above. 上記第一の通電ブロックおよび第二の通電ブロックは、円形棒状の導電材料を所定の長さに切断し、軸方向が固着面に対して垂直方向に配置されていることを特徴とする請求項1記載の電力用半導体装置。 The first energization block and the second energization block are formed by cutting a circular rod-shaped conductive material into a predetermined length, and the axial direction is arranged in a direction perpendicular to the fixing surface. 1. A power semiconductor device according to 1. 上記第一の通電ブロックおよび第二の通電ブロックは、円形棒状の導電材料を所定の長さに切断し、軸方向が上記加圧部材の押圧方向に対して直交方向に配置されていることを特徴とする請求項1記載の電力用半導体装置。 Said 1st electricity supply block and 2nd electricity supply block cut | disconnect circular rod-shaped electrically-conductive material to predetermined length, and the axial direction is arrange | positioned in the orthogonal direction with respect to the pressing direction of the said pressurization member. The power semiconductor device according to claim 1, wherein: 上記第一の通電ブロックおよび第二の通電ブロックは、円筒状の導電材料を所定の長さに切断し、軸方向が上記加圧部材の押圧方向に対して直交方向に配置されていることを特徴とする請求項1記載の電力用半導体装置。 The first energization block and the second energization block are formed by cutting a cylindrical conductive material into a predetermined length, and the axial direction is arranged in a direction orthogonal to the pressing direction of the pressure member. The power semiconductor device according to claim 1, wherein: 上記第一の通電ブロックおよび第二の通電ブロックは、導電材料を所定の直径の球状に形成したことを特徴とする請求項1記載の電力用半導体装置。 2. The power semiconductor device according to claim 1, wherein the first energization block and the second energization block are formed of a conductive material in a spherical shape having a predetermined diameter. 上記第一の通電ブロックおよび上記第二の通電ブロックの上記半導体素子の電極または上記第一の接続回路への接続、および上記第二の接続回路への接続は半田により行われていることを特徴とする請求項1〜請求項5のいずれかに記載の電力用半導体装置。 The connection of the first energization block and the second energization block to the electrode of the semiconductor element or the first connection circuit and the connection to the second connection circuit are performed by solder. The power semiconductor device according to any one of claims 1 to 5. 上記第一の通電ブロックおよび上記第二の通電ブロックの上記半導体素子の電極または上記第一の接続回路への接続は半田により行われ、上記第二の接続回路への接続は、上記弾性部材により常時加えられる押圧力により接触することにより行われていることを特徴とする請求項1〜請求項5のいずれかに記載の電力用半導体装置。 The connection of the first energization block and the second energization block to the electrodes of the semiconductor element or the first connection circuit is performed by solder, and the connection to the second connection circuit is performed by the elastic member. 6. The power semiconductor device according to claim 1, wherein the power semiconductor device is contacted by a constantly applied pressing force. 上記電力用半導体装置には、制御導体の中間位置に押圧ばねを配置し、接触側の先端部が針状に形成された制御導体により、上記加圧部材に装着された絶縁ブッシュを貫通して外部に導出されていることを特徴とする請求項1〜請求項7のいずれかに記載の電力用半導体装置。 In the power semiconductor device, a pressing spring is disposed at an intermediate position of the control conductor, and the contact end of the contact side is formed in a needle shape so as to penetrate the insulating bush attached to the pressure member. The power semiconductor device according to claim 1, wherein the power semiconductor device is led out to the outside. 上記加圧部材は、所定寸法の金属板で形成した締付板に、締付面を除く全面を絶縁部材で覆ったことを特徴とする請求項1〜請求項6のいずれかに記載の電力用半導体装置。 7. The electric power according to claim 1, wherein the pressurizing member includes a clamping plate formed of a metal plate having a predetermined size and an entire surface excluding the clamping surface covered with an insulating member. Semiconductor device. 上記第一の回路基板と上記第二の回路基板の間の間隙に、絶縁性充填材を充填したことを特徴とする請求項1〜請求項9のいずれかに記載の電力用半導体装置。 The power semiconductor device according to claim 1, wherein an insulating filler is filled in a gap between the first circuit board and the second circuit board.
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Cited By (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009130163A (en) * 2007-11-26 2009-06-11 Fuji Electric Device Technology Co Ltd Semiconductor device
JP2011249636A (en) * 2010-05-28 2011-12-08 Yaskawa Electric Corp Semiconductor device and method of manufacturing the same
JP2012235128A (en) * 2011-05-03 2012-11-29 Alstom Transport Sa Apparatus for electrically interconnecting at least one electronic component and power supply unit including means for reducing loop inductance between first and second terminals
KR101235079B1 (en) 2012-09-28 2013-02-21 주식회사 프로이천 Connecting apparatus and method for electrical connecting between conductive members
JP2013042135A (en) * 2011-08-16 2013-02-28 General Electric Co <Ge> Power overlay structure with leadframe connections
CN103782379A (en) * 2011-09-09 2014-05-07 日本特殊陶业株式会社 Semiconductor module, and circuit board
JP2015198171A (en) * 2014-04-01 2015-11-09 富士電機株式会社 power semiconductor module
US9209099B1 (en) 2014-05-20 2015-12-08 Fuji Electric Co., Ltd. Power semiconductor module
JP2016009819A (en) * 2014-06-26 2016-01-18 三菱電機株式会社 Power semiconductor module and manufacturing method for the same
JP2016025237A (en) * 2014-07-22 2016-02-08 日産自動車株式会社 Power semiconductor module and mounting method thereof
DE102022104896A1 (en) 2021-03-29 2022-09-29 Mitsubishi Electric Corporation semiconductor device
KR20230000986A (en) * 2021-06-25 2023-01-03 주식회사 아모센스 Power module
KR20230000984A (en) * 2021-06-25 2023-01-03 주식회사 아모센스 Power module

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH113995A (en) * 1997-06-12 1999-01-06 Toshiba Corp Semiconductor device
JPH1187610A (en) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp Semiconductor device
JP2000174180A (en) * 1998-12-02 2000-06-23 Shibafu Engineering Kk Semiconductor device
JP2004303900A (en) * 2003-03-31 2004-10-28 Denso Corp Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH113995A (en) * 1997-06-12 1999-01-06 Toshiba Corp Semiconductor device
JPH1187610A (en) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp Semiconductor device
JP2000174180A (en) * 1998-12-02 2000-06-23 Shibafu Engineering Kk Semiconductor device
JP2004303900A (en) * 2003-03-31 2004-10-28 Denso Corp Semiconductor device

Cited By (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009130163A (en) * 2007-11-26 2009-06-11 Fuji Electric Device Technology Co Ltd Semiconductor device
JP2011249636A (en) * 2010-05-28 2011-12-08 Yaskawa Electric Corp Semiconductor device and method of manufacturing the same
JP2012235128A (en) * 2011-05-03 2012-11-29 Alstom Transport Sa Apparatus for electrically interconnecting at least one electronic component and power supply unit including means for reducing loop inductance between first and second terminals
JP2013042135A (en) * 2011-08-16 2013-02-28 General Electric Co <Ge> Power overlay structure with leadframe connections
CN103782379A (en) * 2011-09-09 2014-05-07 日本特殊陶业株式会社 Semiconductor module, and circuit board
KR101235079B1 (en) 2012-09-28 2013-02-21 주식회사 프로이천 Connecting apparatus and method for electrical connecting between conductive members
US9812431B2 (en) 2014-04-01 2017-11-07 Fuji Electric Co., Ltd. Power semiconductor module
JP2015198171A (en) * 2014-04-01 2015-11-09 富士電機株式会社 power semiconductor module
US9209099B1 (en) 2014-05-20 2015-12-08 Fuji Electric Co., Ltd. Power semiconductor module
JP2016009819A (en) * 2014-06-26 2016-01-18 三菱電機株式会社 Power semiconductor module and manufacturing method for the same
JP2016025237A (en) * 2014-07-22 2016-02-08 日産自動車株式会社 Power semiconductor module and mounting method thereof
DE102022104896A1 (en) 2021-03-29 2022-09-29 Mitsubishi Electric Corporation semiconductor device
US11804414B2 (en) 2021-03-29 2023-10-31 Mitsubishi Electric Corporation Semiconductor device comprising a lead electrode including a through hole
KR20230000986A (en) * 2021-06-25 2023-01-03 주식회사 아모센스 Power module
KR20230000984A (en) * 2021-06-25 2023-01-03 주식회사 아모센스 Power module
KR102611687B1 (en) * 2021-06-25 2023-12-08 주식회사 아모센스 Power module
KR102617224B1 (en) * 2021-06-25 2023-12-27 주식회사 아모센스 Power module

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