JP2011249636A - Semiconductor device and method of manufacturing the same - Google Patents

Semiconductor device and method of manufacturing the same Download PDF

Info

Publication number
JP2011249636A
JP2011249636A JP2010122391A JP2010122391A JP2011249636A JP 2011249636 A JP2011249636 A JP 2011249636A JP 2010122391 A JP2010122391 A JP 2010122391A JP 2010122391 A JP2010122391 A JP 2010122391A JP 2011249636 A JP2011249636 A JP 2011249636A
Authority
JP
Japan
Prior art keywords
wiring board
hole
metal sphere
semiconductor device
semiconductor chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010122391A
Other languages
Japanese (ja)
Inventor
Daisuke Yoshimi
太祐 吉見
Shoichiro Shimoike
正一郎 下池
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Yaskawa Electric Corp
Original Assignee
Yaskawa Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Yaskawa Electric Corp filed Critical Yaskawa Electric Corp
Priority to JP2010122391A priority Critical patent/JP2011249636A/en
Publication of JP2011249636A publication Critical patent/JP2011249636A/en
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1305—Bipolar Junction Transistor [BJT]
    • H01L2924/13055—Insulated gate bipolar transistor [IGBT]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]

Landscapes

  • Wire Bonding (AREA)

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which can maintain a constant interval between two wiring boards sandwiching a semiconductor chip and can determine the bonding positions of the two wiring boards with high accuracy, and to provide a manufacturing method thereof.SOLUTION: A first wiring board 10 mounting a semiconductor chip and a second wiring board 20 are provided, respectively, with a first hole 11 and a second hole 21 facing each other. Metal balls 30 are then placed in these holes and the contact parts of the first and second wiring boards 10, 20 and the metal balls 30 are bonded each other.

Description

本発明は、半導体装置、及び半導体装置の製造方法に関する。 The present invention relates to a semiconductor device and a method for manufacturing the semiconductor device.

パワーＭＯＳＦＥＴやＩＧＢＴ等を構成する半導体チップは、大電流の制御に使用されることから自己発熱により温度が大きく上昇する場合があり、放熱性の改善が求められている。そのため、２枚の配線基板の向かい合う面をそれぞれ実装面とし、その間に半導体チップが挟まれて配置され、その外側の両面から放熱されるように構成された半導体装置が提案されている。
そのような半導体装置の一例が特開平１０−５６１３１号公報に紹介されている。この公報に示された発明では、一方の配線基板の実装面に凸部を設け、他方の配線基板の実装面に上記凸部が嵌合する凹部を設けて、一方の凸部を他方の凹部に接合する。これにより、凸部がスペーサとなり２枚の配線基板の間隔が保持されるとともに、該２枚の配線基板の接合位置が決められる。 Since semiconductor chips constituting power MOSFETs, IGBTs, and the like are used for controlling a large current, the temperature may increase greatly due to self-heating, and improvement in heat dissipation is required. Therefore, there has been proposed a semiconductor device configured such that two facing surfaces of the two wiring boards are used as mounting surfaces, a semiconductor chip is disposed between them, and heat is radiated from both outer surfaces.
An example of such a semiconductor device is introduced in Japanese Patent Laid-Open No. 10-56131. In the invention disclosed in this publication, a convex portion is provided on the mounting surface of one wiring board, a concave portion in which the convex portion is fitted is provided on the mounting surface of the other wiring substrate, and one convex portion is replaced with the other concave portion. To join. As a result, the convex portion serves as a spacer, the distance between the two wiring boards is maintained, and the joining position of the two wiring boards is determined.

特開平１０−５６１３１JP-A-10-56131

半導体チップの実装不良を低減するには、該２枚の配線基板の実装面の間に半導体チップを配置する際、高い位置決め精度が要求される。このため、各実装面には、上記凹凸部の形状及び位置を高精度に加工する必要がある。しかしながら、上記特許文献の発明では、その高精度の加工には煩雑な作業を伴うとともに、該配線基板の広い範囲に加工を施す場合があり、製造時のコストが高くなるといったことから、さらに改善すべき課題となっている。 In order to reduce mounting defects of the semiconductor chip, high positioning accuracy is required when the semiconductor chip is disposed between the mounting surfaces of the two wiring boards. For this reason, it is necessary to process the shape and position of the uneven portion on each mounting surface with high accuracy. However, in the invention of the above-mentioned patent document, the high-precision processing involves complicated work, and processing may be performed on a wide range of the wiring board, which further increases the manufacturing cost. It is an issue that should be done.

そこで、本発明は、半導体チップを挟む２枚の配線基板の間隔を一定に保持するとともに、該２枚の配線基板の接合位置を高精度に決めることのできる半導体装置及び半導体装置の製造方法を提供することを目的とする。 SUMMARY OF THE INVENTION Accordingly, the present invention provides a semiconductor device and a method for manufacturing a semiconductor device that can maintain a constant interval between two wiring boards sandwiching a semiconductor chip and determine the bonding position of the two wiring boards with high accuracy. The purpose is to provide.

上記目的を達成するため、本発明は以下の構成を備える。
請求項１に記載の発明は、第１の孔部を有する第１の配線基板と、前記第１の孔部に対向する位置に第２の孔部を有する第２の配線基板と、前記第１及び第２の孔部の孔径よりも大きい径を有し、前記第１の配線基板と前記第２の配線基板との間、且つ前記第１の孔部及び前記第２の孔部に設置され、前記第１及び第２の配線基板とそれぞれ接合された少なくとも１つの金属球と、前記金属球の隣に間隔をおいて、前記第１の配線基板上に実装された第１の半導体チップとを備えたものである。
請求項２に記載の発明は、前記第１の配線基板上に、さらに第２の半導体チップが実装され、前記金属球は、前記第１の半導体チップと前記第２の半導体チップとの間に設置されたものである。
請求項３に記載の発明は、前記金属球は、一部が凸又は凹状に変形した略球形、又は端部が曲面を有する円柱形のいずれかを含む形状とするものである。
請求項４に記載の発明は、前記金属球は、銅コア材に半田層をコーティングした銅コア半田ボールからなるものである。
請求項５に記載の発明は、前記半導体装置は放熱部を備えており、前記金属球は、前記第１の配線基板または第２の配線基板を介して、前記放熱部と隣り合う位置に設けられたものである。
請求項６に記載の発明は、回転機器及び前記回転機器の動作を制御する制御部を備えた工作機械又はロボットの駆動装置において、前記制御部には請求項１又は２記載の半導体装置を備えたものである。
請求項７に記載の発明は、直流電力から交流電力を電気的に生成する回路を備えたインバータ装置において、前記回路には請求項１又は２記載の半導体装置を備えたものである。
請求項８に記載の発明は、第１の配線基板及び第２の配線基板を準備する工程と、前記第１及び第２の配線基板にそれぞれ第１の孔部及び第２の孔部を設ける工程と、前記第１又は第２の配線基板のいずれかに半導体チップを実装するとともに、前記第１又は第２の孔部の一方の孔部に金属球を設置して、前記金属球が設置された前記第１又は第２の配線基板の一方の配線基板と前記金属球とを接合材により接合する工程と、前記金属球を他方の孔部に設置することにより、前記第１の孔部と第２の孔部を対向させて前記第１の配線基板及び第２の配線基板の位置を整合する工程と、前記金属球と他方の配線基板とを接合材により接合する工程とを有するものである。 In order to achieve the above object, the present invention comprises the following arrangement.
The invention according to claim 1 is a first wiring board having a first hole, a second wiring board having a second hole at a position facing the first hole, and the first wiring board. The first and second holes have a diameter larger than that of the first and second holes, and are installed between the first wiring board and the second wiring board and in the first hole and the second hole. And at least one metal sphere bonded to each of the first and second wiring boards, and a first semiconductor chip mounted on the first wiring board at an interval next to the metal spheres It is equipped with.
According to a second aspect of the present invention, a second semiconductor chip is further mounted on the first wiring board, and the metal sphere is interposed between the first semiconductor chip and the second semiconductor chip. It is installed.
According to a third aspect of the present invention, the metal sphere has a shape including any one of a substantially spherical shape partially deformed into a convex shape or a concave shape, or a cylindrical shape whose end portion has a curved surface.
According to a fourth aspect of the present invention, the metal ball comprises a copper core solder ball in which a solder layer is coated on a copper core material.
According to a fifth aspect of the present invention, the semiconductor device includes a heat radiating portion, and the metal sphere is provided at a position adjacent to the heat radiating portion via the first wiring board or the second wiring board. It is what was done.
According to a sixth aspect of the present invention, there is provided a driving device for a machine tool or a robot provided with a rotating device and a control unit that controls the operation of the rotating device, and the control unit includes the semiconductor device according to the first or second aspect. It is a thing.
According to a seventh aspect of the present invention, there is provided an inverter device including a circuit that electrically generates alternating current power from direct current power, wherein the circuit includes the semiconductor device according to the first or second aspect.
The invention according to claim 8 is the step of preparing the first wiring board and the second wiring board, and the first hole portion and the second hole portion are provided in the first wiring board and the second wiring board, respectively. A semiconductor chip is mounted on either the first or second wiring board, and a metal sphere is installed in one of the first or second hole, and the metal sphere is installed A step of bonding one wiring board of the first or second wiring board and the metal sphere with a bonding material, and placing the metal sphere in the other hole, thereby providing the first hole. And a step of aligning the positions of the first wiring substrate and the second wiring substrate with the second hole facing each other, and a step of bonding the metal sphere and the other wiring substrate with a bonding material. It is.

本発明によれば、半導体チップを挟む２枚の配線基板の間隔を一定に保持するとともに、該２枚の配線基板の接合位置を高精度に決めることができる。 According to the present invention, the distance between two wiring boards sandwiching a semiconductor chip can be kept constant, and the joining position of the two wiring boards can be determined with high accuracy.

本発明の実施形態に係るインバータモジュールの模式図The schematic diagram of the inverter module which concerns on embodiment of this invention 本発明の実施形態に係るインバータモジュールの電気回路図Electrical circuit diagram of an inverter module according to an embodiment of the present invention 本発明の実施形態に係るインバータモジュールの製造工程を示す模式図The schematic diagram which shows the manufacturing process of the inverter module which concerns on embodiment of this invention

以下、本実施例では、パワーＭＯＳＦＥＴとなる半導体チップを搭載し、高周波大電流対応の３相インバータ用半導体装置（以下、「インバータモジュール」と称す）に適用した構成について、図１〜図３を用いて説明する。本実施形態で参酌する図面では、発明の理解を容易にするため各要素が模式的に示されており、説明に不要な構成については省略されることもある。また、前出の要素と同じ要素に同一符号を付すことにより、その説明が省略されることもある。 Hereinafter, in this embodiment, a semiconductor chip to be a power MOSFET is mounted, and a configuration applied to a semiconductor device for a three-phase inverter (hereinafter referred to as an “inverter module”) compatible with high frequency and large current is shown in FIGS. It explains using. In the drawings referred to in the present embodiment, each element is schematically shown in order to facilitate understanding of the invention, and components unnecessary for description may be omitted. Moreover, the description may be abbreviate | omitted by attaching | subjecting the same code | symbol to the same element as the above-mentioned element.

図１（ａ）は、インバータモジュール１の側断面図であり、第１相の構成について示されている。また、図１（ｂ）は、インバータモジュール１の全体を示す上面図である。さらに、図２は、図１のように構成されたインバータモジュール１の第１相における等価回路を示している。 FIG. 1A is a side sectional view of the inverter module 1 and shows the configuration of the first phase. FIG. 1B is a top view showing the entire inverter module 1. Further, FIG. 2 shows an equivalent circuit in the first phase of the inverter module 1 configured as shown in FIG.

インバータモジュール１は、第１の配線基板１０と第２の配線基板２０との間に挟まれて実装された第１の半導体チップ１００及び第２の半導体チップ２００を有している。さらに、インバータモジュール１は、第１の配線基板１０と第２の配線基板２０に接合された金属球３０を備えており、この金属球３０は半導体チップ１００と半導体チップ２００との間に配置されている。ちなみに、本実施例における第１の配線基板１０と第２の配線基板２０の間隔は、およそ５００μｍである。
また、第１の配線基板１０の下面及び第２の配線基板２０の上面には、第１の半導体チップ１００及び第２の半導体チップ２００で生じた熱を外部の大気または冷却水等の冷却媒体に放散するための放熱部４０が設置されている。
なお、第１及び第２の配線基板１０、２０は、第１及び第２の半導体チップ１００、２００との間に作用する熱応力の低減と放熱性の向上のために、窒化珪素もしくは窒化アルミニウムなどの低熱膨張係数、且つ、高熱伝導性のものが望ましいが、特にこれに限定されるものではない。 The inverter module 1 includes a first semiconductor chip 100 and a second semiconductor chip 200 that are sandwiched and mounted between a first wiring board 10 and a second wiring board 20. The inverter module 1 further includes a metal ball 30 bonded to the first wiring board 10 and the second wiring board 20, and the metal ball 30 is disposed between the semiconductor chip 100 and the semiconductor chip 200. ing. Incidentally, the distance between the first wiring board 10 and the second wiring board 20 in this embodiment is about 500 μm.
Further, on the lower surface of the first wiring substrate 10 and the upper surface of the second wiring substrate 20, heat generated in the first semiconductor chip 100 and the second semiconductor chip 200 is transferred to an external air or a cooling medium such as cooling water. A heat dissipating part 40 for dissipating the light is installed.
The first and second wiring boards 10 and 20 are made of silicon nitride or aluminum nitride in order to reduce thermal stress acting on the first and second semiconductor chips 100 and 200 and improve heat dissipation. A material having a low thermal expansion coefficient and high thermal conductivity such as the above is desirable, but not particularly limited thereto.

第１の半導体チップ１００及び第２の半導体チップ２００は、第１の配線基板１０と第２の配線基板２０の間に、次のように接合されている。
公知の方法により矩形板状に形成された第１及び第２の半導体チップ１００、２００の上面には、ドレイン電極１０１、２０１が配置され、下面にはソース電極１０２、２０２、及びゲート電極１０３、２０３がそれぞれ配置されている。この場合、ドレイン電極１０１、２０１、及びソース電極１０２、２０２は主電極となり、ゲート電極１０３、２０３は制御電極となる。また、ドレイン電極１０１、２０１は、第２の配線基板２０の電極パターン２２、２３と半田５２で接合され、ソース電極１０２、２０２は第１の配線基板１０の電極パターン１２、１３と、ゲート電極１０３、２０３は電極パターン１４、１５と半田５０によりそれぞれ接合されている。 The first semiconductor chip 100 and the second semiconductor chip 200 are bonded between the first wiring board 10 and the second wiring board 20 as follows.
Drain electrodes 101 and 201 are disposed on the upper surfaces of the first and second semiconductor chips 100 and 200 formed in a rectangular plate shape by a known method, and the source electrodes 102 and 202 and the gate electrode 103 are disposed on the lower surface. 203 are arranged. In this case, the drain electrodes 101 and 201 and the source electrodes 102 and 202 are main electrodes, and the gate electrodes 103 and 203 are control electrodes. The drain electrodes 101 and 201 are joined to the electrode patterns 22 and 23 of the second wiring board 20 by solder 52, and the source electrodes 102 and 202 are joined to the electrode patterns 12 and 13 of the first wiring board 10 and the gate electrode. 103 and 203 are joined to the electrode patterns 14 and 15 by solder 50, respectively.

金属球３０は、第１の配線基板１０と第２の配線基板２０の間に、次のように接合されている。
第１の配線基板１０及び第２の配線基板２０には、それぞれ第１の孔部１１、及び第２の孔部２１が設けられており、それらの中心線上に球の中心が位置するように金属球３０が設置されている。金属球３０は、第１及び第２の配線基板１０、２０の間隔を一定に保持するスペーサとしての機能を有しており、第１及び第２の孔部１１、２１の孔径は金属球３０の径よりも小さい寸法となっている。また、第１の孔部１１及び第２の孔部２１の孔径は、同じ寸法であっても異なる寸法であっても支障はない。なお、本実施例では第１及び第２の孔部１１、２１は、それぞれの配線基板が貫通されて形成されており、該貫通孔の断面形状は円形であるが、金属球３０が安定して設置されるのであれば、配線基板が貫通されなくとも、凹状あるいは溝状に形成されても良い。
また、第１及び第２の配線基板１０、２０における金属球３０を挟む側の面において、第１の孔部１１及び第２の孔部２１の周囲には、電極パターン１２と導通する電極パターン１６、及び電極パターン２３と導通する電極パターン２４が設けられている。電極パターン１６及び電極パターン２４は、金属球３０とそれぞれ半田５１、５３により接合されており、電極パターン１２と電極パターン２３は電気的に接続されて導通状態となっている。
なお、金属球３０は、一部が凸又は凹状に変形した略球形、又は端部が曲面を有する円柱形の略球形状であっても良く、電極パターン１６及び電極パターン２４と金属球３０を半田５１、５３で接合する際、接合強度を高めるために半田５１、５３が付着した部分は小さな凹凸ができる場合があるが、所定の接合強度、通電容量、絶縁距離、及び基板間隔が確保されるように接合されていれば特に支障はない。
さらに、金属球３０について、銅コア材に半田層をコーティングした銅コア半田ボールは、高精度寸法の銅コア材に高精度の厚さで半田がコーティングされているので、第１の配線基板１０と第２の配線基板２０との間隔を高い精度で保持することができる。また、半田付けの作業及び半田付着量の調整が容易になるとともに、半田付け性のばらつきが減少し、接合強度が安定する。 The metal sphere 30 is bonded between the first wiring board 10 and the second wiring board 20 as follows.
The first wiring board 10 and the second wiring board 20 are provided with a first hole portion 11 and a second hole portion 21, respectively, so that the center of the sphere is located on the center line thereof. A metal ball 30 is installed. The metal sphere 30 has a function as a spacer that keeps the distance between the first and second wiring boards 10 and 20 constant, and the hole diameter of the first and second hole portions 11 and 21 is the metal sphere 30. The dimension is smaller than the diameter. Moreover, the hole diameter of the 1st hole part 11 and the 2nd hole part 21 does not have a trouble, even if it is the same dimension or a different dimension. In the present embodiment, the first and second holes 11 and 21 are formed by penetrating the respective wiring boards, and the cross-sectional shape of the through holes is circular, but the metal sphere 30 is stable. If the wiring board is not installed, the wiring board may be formed in a concave shape or a groove shape without being penetrated.
In addition, on the surface of the first and second wiring boards 10 and 20 on the side sandwiching the metal sphere 30, an electrode pattern that is electrically connected to the electrode pattern 12 is provided around the first hole portion 11 and the second hole portion 21. 16 and an electrode pattern 24 that is electrically connected to the electrode pattern 23 is provided. The electrode pattern 16 and the electrode pattern 24 are joined to the metal ball 30 by solders 51 and 53, respectively, and the electrode pattern 12 and the electrode pattern 23 are electrically connected and are in a conductive state.
The metal sphere 30 may have a substantially spherical shape with a part deformed into a convex shape or a concave shape, or a substantially spherical shape with a cylindrical shape having a curved end portion, and the electrode pattern 16 and the electrode pattern 24 and the metal sphere 30 may be When bonding with the solders 51 and 53, there may be small irregularities on the portions to which the solders 51 and 53 are attached in order to increase the bonding strength. However, a predetermined bonding strength, current carrying capacity, insulation distance, and substrate spacing are ensured. If it is joined so that there is no particular problem.
Further, as for the metal ball 30, the copper core solder ball in which the copper core material is coated with the solder layer is coated with the solder with a high precision thickness on the copper core material with a high precision dimension. And the second wiring board 20 can be held with high accuracy. In addition, the soldering operation and the adjustment of the solder adhesion amount are facilitated, the variation in solderability is reduced, and the bonding strength is stabilized.

図１（ｂ）において、３相のインバータモジュールは、第１の半導体チップ１００と第２の半導体チップ２００との間に金属球３０を配置した第１相と同様の構成を３列平行に配置することにより第２及び第３相の配置を行う。このように配置することにより、第１の配線基板１０及び第２の配線基板２０との間隔は一定に保持されるとともにその接合強度は強固になる。また、実装スペースを小さくできるので、インバータモジュールの小型化に寄与することができる。
一方、金属球３０は、第１の配線基板１０又は第２の配線基板２０を介して、温度差の生じ易い放熱部４０と隣り合う位置に配置されており、第１及び第２の配線基板１０、２０が熱によって膨張・収縮する影響を最小限に防止することができる。
なお、本実施例では、第１の半導体チップ１００と第２の半導体チップ２００との間に１個の金属球３０を設置しているが、複数の金属球３０を設置することにより、第１の配線基板と第２の配線基板２０との接合強度がさらに向上し、その間隔を安定して保持することができる。また、電流容量の増加にも対応することができる。 In FIG. 1B, the three-phase inverter module has a configuration similar to the first phase in which the metal balls 30 are arranged between the first semiconductor chip 100 and the second semiconductor chip 200 arranged in three rows in parallel. By doing so, the second and third phases are arranged. By arranging in this way, the distance between the first wiring board 10 and the second wiring board 20 is kept constant and the bonding strength is strengthened. Further, since the mounting space can be reduced, it is possible to contribute to downsizing of the inverter module.
On the other hand, the metal sphere 30 is disposed at a position adjacent to the heat radiating portion 40 where a temperature difference is likely to occur via the first wiring board 10 or the second wiring board 20, and the first and second wiring boards. The effects of expansion and contraction of 10 and 20 due to heat can be prevented to a minimum.
In the present embodiment, one metal sphere 30 is installed between the first semiconductor chip 100 and the second semiconductor chip 200. However, by installing a plurality of metal spheres 30, the first The bonding strength between the second wiring board 20 and the second wiring board 20 is further improved, and the interval can be stably maintained. Further, it is possible to cope with an increase in current capacity.

図２において、電極パターン２２から電極パターン１３に至る電気回路が構成されており、上述したようにソース電極１０２、電極パターン１２、１６、金属球３０、電極パターン２４、２３、及びドレイン電極２０１は電気的に同電位である。
また、第１の半導体チップ１００と第２の半導体チップ２００との間の中間電位にあるインバータモジュール１の出力端子６０が、同電位であるソース電極１０２からドレイン電極２０１のいずれかに接続されている。これは第２及び第３相についても同様である。 In FIG. 2, an electric circuit from the electrode pattern 22 to the electrode pattern 13 is configured. As described above, the source electrode 102, the electrode patterns 12, 16, the metal sphere 30, the electrode patterns 24, 23, and the drain electrode 201 are Electrically the same potential.
In addition, the output terminal 60 of the inverter module 1 that is at an intermediate potential between the first semiconductor chip 100 and the second semiconductor chip 200 is connected to one of the source electrode 102 and the drain electrode 201 that are at the same potential. Yes. The same applies to the second and third phases.

以下、図１及び図２に示されたインバータモジュールの製造方法について、（１）配線基板の準備工程、（２）孔部の加工工程、（３）半導体の実装・金属球の設置工程、（４）配線基板位置整合工程、及び（５）接合工程を、図３に基づいて各工程毎に説明する。 In the following, the method for manufacturing the inverter module shown in FIGS. 1 and 2 includes (1) a wiring board preparation step, (2) a hole processing step, (3) a semiconductor mounting / metal ball installation step, ( 4) The wiring board position alignment step and (5) the bonding step will be described for each step based on FIG.

（１）配線基板の準備工程
図３（ａ）において、第１の配線基板１０及び第２の配線基板２０は、窒化珪素もしくは窒化アルミニウム等の板材がベースとなり、第１の半導体チップ１００、第２の半導体チップ２００を実装する側の面に、銅、タングステン、アルミニウム、銀、モリブデン、またはその他の導体からなる電極パターン１２、１３、１４、１５、１６、２２、２３、２４が施されて配線基板が準備される。 (1) Preparation Step of Wiring Board In FIG. 3A, the first wiring board 10 and the second wiring board 20 are based on a plate material such as silicon nitride or aluminum nitride. Electrode patterns 12, 13, 14, 15, 16, 22, 23, 24 made of copper, tungsten, aluminum, silver, molybdenum, or other conductors are applied to the surface on which the semiconductor chip 200 of 2 is mounted. A wiring board is prepared.

（２）孔部の加工工程
図３（ｂ）において、第１の配線基板１０及び第２の配線基板２０の金属球３０が設置される位置にそれぞれ第１の孔部１１及び第２の孔部２１が設けられる。本実施例では、第１の半導体チップ１００及び第２の半導体チップ２００が設置される中間に金属球３０が設置されるため、各半導体チップが所定の位置に実装できるように決められた位置に設定された寸法の孔を設ける。前述したように、それぞれの配線基板を貫通させて形成しても良いが、金属球３０が安定して設置されるのであれば、配線基板を貫通しなくとも、凹状あるいは溝状に形成されても良い。
なお、電極パターン１６及び２４の形状については特に限定しないが、孔の周囲に円形に構成することにより、金属球３０との接合面積が広くなり接合強度が向上する。 (2) Hole processing step In FIG. 3B, the first hole 11 and the second hole are respectively provided at positions where the metal balls 30 of the first wiring board 10 and the second wiring board 20 are installed. A part 21 is provided. In this embodiment, since the metal ball 30 is installed in the middle where the first semiconductor chip 100 and the second semiconductor chip 200 are installed, each semiconductor chip is placed at a predetermined position so that it can be mounted at a predetermined position. A hole with a set size is provided. As described above, each wiring board may be formed so as to penetrate therethrough. However, if the metal sphere 30 is stably installed, it is formed in a concave shape or a groove shape without penetrating the wiring board. Also good.
The shape of the electrode patterns 16 and 24 is not particularly limited. However, by forming the electrode patterns 16 and 24 in a circle around the hole, the bonding area with the metal sphere 30 is increased and the bonding strength is improved.

（３）半導体の実装・金属球の設置工程
図３（ｃ）において、第１及び第２の半導体チップ１００、２００に施されたソース電極１０２、２０２、及びゲート電極１０３、２０３を、第１の配線基板１０の所定の電極パターン１２、１３、１４、１５とそれぞれ接合する。この場合、ソース電極１０２、２０２、及びゲート電極１０３、２０３、もしくは各電極パターン上に予め直径が数十μｍ程度の半田ボールを用いて半田バンプ（半田５０）を形成しておくとこれらを容易に接合することができる。
また、予め電極パターン１６に半田ペースト（半田５１）を塗布しておき、第１の孔部１１に金属球３０を設置する。金属球３０の一部が第１の孔部１１に嵌るように設置されることにより、金属球３０の設置位置が決められる。
その後、半田の溶融点を超える温度でリフローを行うことにより、第１及び第２の半導体チップ１００、２００、及び金属球３０は、それぞれ第１の配線基板１０と半田５０、５１により接合される。
上記の金属球３０については、本実施例では、各半導体チップの実装高さが５００μｍ程度であり、第１の配線基板１０と第２の配線基板２０との間隔を同寸法に保持するため、予め、第１及び第２の孔部の径を考慮し、その間隔が保持できる直径を有する金属球３０を選定しておく。また、銅コアの周囲に数十μｍの鉛フリー半田コーティングが施された銅コア半田ボールのような複合材料を用いることにより、半田ペーストを塗布する作業を省略することができる。
なお、本実施例では、第１及び第２の半導体チップ１００、２００の実装を金属球３０を設置する前に行ったが、作業の効率及び信頼性等を考慮することにおいてその順序は自由に変更することができる。 (3) Mounting of Semiconductor / Installation Process of Metal Ball In FIG. 3C, the source electrodes 102 and 202 and the gate electrodes 103 and 203 applied to the first and second semiconductor chips 100 and 200 are replaced with the first. Are bonded to predetermined electrode patterns 12, 13, 14, and 15 of the wiring board 10, respectively. In this case, if solder bumps (solder 50) are formed in advance on the source electrodes 102 and 202 and the gate electrodes 103 and 203, or each electrode pattern using solder balls having a diameter of about several tens of micrometers, these can be easily performed. Can be joined.
In addition, a solder paste (solder 51) is applied to the electrode pattern 16 in advance, and the metal ball 30 is placed in the first hole portion 11. The installation position of the metal ball 30 is determined by installing the metal ball 30 so that a part of the metal ball 30 fits into the first hole portion 11.
Thereafter, by performing reflow at a temperature exceeding the melting point of the solder, the first and second semiconductor chips 100 and 200 and the metal ball 30 are bonded to the first wiring board 10 and the solders 50 and 51, respectively. .
For the metal sphere 30, in this embodiment, the mounting height of each semiconductor chip is about 500 μm, and the distance between the first wiring board 10 and the second wiring board 20 is maintained at the same dimension. In advance, the diameter of the first and second holes is taken into consideration, and the metal sphere 30 having a diameter that can maintain the interval is selected. Further, by using a composite material such as a copper core solder ball having a lead-free solder coating of several tens of μm around the copper core, the operation of applying the solder paste can be omitted.
In the present embodiment, the first and second semiconductor chips 100 and 200 are mounted before the metal ball 30 is installed. However, the order thereof can be freely determined in consideration of work efficiency and reliability. Can be changed.

（４）配線基板の位置整合工程
図３（ｄ）において、ドレイン電極１０１、２０１の上面、またはそれらと接合される第２の配線基板２０の電極パターン２２、２３にリボン半田（半田５２）を配置し、金属球３０または第２の配線基板２０の電極パターン２４に半田ペースト（半田５３）を配置する。次に、第２の孔部２１に金属球３０が設置されるように第２の配線基板２０を重ねる。第２の孔部２１及び金属球３０は、少なくともそれぞれの相ごとに複数設けられているので、各相の第２の孔部２１に金属球３０が設置されることにより、ドレイン電極１０１、２０１の上面と第２の配線基板２０の電極パターン２２、２３はそれぞれ対向する位置に整合される。このように、第１の配線基板１０と第２の配線基板２０は、容易に高い精度で位置決めが行われる。
なお、上記で用いた半田５２、５３は、前工程で用いた半田５０、５１よりも融点の低い半田材を使用することが、その後のリフロー時に前工程の半田の溶融を防止する上で好ましい。 (4) Wiring board position alignment process In FIG. 3D, ribbon solder (solder 52) is applied to the upper surfaces of the drain electrodes 101 and 201 or the electrode patterns 22 and 23 of the second wiring board 20 joined thereto. The solder paste (solder 53) is placed on the metal ball 30 or the electrode pattern 24 of the second wiring board 20. Next, the second wiring board 20 is stacked so that the metal sphere 30 is installed in the second hole portion 21. Since the second hole 21 and the plurality of metal spheres 30 are provided at least for each phase, the drain electrodes 101 and 201 are provided by installing the metal sphere 30 in the second hole 21 of each phase. And the electrode patterns 22 and 23 of the second wiring board 20 are aligned at positions facing each other. As described above, the first wiring board 10 and the second wiring board 20 are easily positioned with high accuracy.
The solders 52 and 53 used above are preferably solder materials having a melting point lower than that of the solders 50 and 51 used in the previous step, in order to prevent melting of the solder in the previous step during subsequent reflow. .

（５）接合工程
図３（ｅ）において、半田５２、５３の溶融点よりも高く、半田５０、５１の融点よりも低い温度により再度リフローを行う。
以上により、ドレイン電極１０１、２０１と電極パターン２２、２３がそれぞれ接合され、金属球３０と電極パターン２４が接合されてインバータモジュール１が形成される。 (5) Joining step In FIG. 3E, reflow is performed again at a temperature higher than the melting point of the solders 52 and 53 and lower than the melting point of the solders 50 and 51.
Thus, the drain electrodes 101 and 201 and the electrode patterns 22 and 23 are joined, and the metal sphere 30 and the electrode pattern 24 are joined to form the inverter module 1.

（３）の半導体の実装・金属球の設置工程において、金属球３０は、第２の孔部２１に設置して第２の配線基板２０と接合しても良く、この場合は、（４）の配線基板の位置整合工程において、第１の孔部１１に金属球３０が設置されるように第２の配線基板２０を重ねて第１の配線基板１０と第２の配線基板２０の位置決めを行う。その後、ドレイン電極１０１、２０１が第２の配線基板２０と接合されるのと同時に、金属球３０と第１の配線基板１０とが接合される。このときの半田材の選定及びリフロー温度は適宜調整すれば良い。 In the semiconductor mounting / metal sphere installation step of (3), the metal sphere 30 may be installed in the second hole portion 21 and joined to the second wiring board 20. In this case, (4) In the position alignment process of the wiring board, the first wiring board 10 and the second wiring board 20 are positioned by overlapping the second wiring board 20 so that the metal balls 30 are installed in the first holes 11. Do. Thereafter, the metal electrodes 30 and the first wiring substrate 10 are bonded simultaneously with the drain electrodes 101 and 201 being bonded to the second wiring substrate 20. The selection of the solder material and the reflow temperature at this time may be adjusted as appropriate.

その後、さらにモジュールの補強を行うために、第１の配線基板１０と第２の配線基板２０との間の空隙に絶縁樹脂を封入することもある。また、第１の配線基板１０の下面及び第２の配線基板２０の上面に放熱部４０を設けることにより、半導体チップから発熱した熱を効率的に外部に放散することができる。さらに、金属球３０を、第１の配線基板１０又は第２の配線基板２０を介して、温度差の生じ易い放熱部４０と隣り合う位置に配置することにより、基板の強度がさらに向上する。このため、熱膨張・収縮による配線基板の反り等の形状の変形を最小限に防止することができる。 Thereafter, in order to further reinforce the module, an insulating resin may be sealed in the gap between the first wiring board 10 and the second wiring board 20. Further, by providing the heat radiating portion 40 on the lower surface of the first wiring substrate 10 and the upper surface of the second wiring substrate 20, the heat generated from the semiconductor chip can be efficiently dissipated to the outside. Further, the strength of the substrate is further improved by arranging the metal ball 30 at a position adjacent to the heat radiating portion 40 where the temperature difference is likely to occur via the first wiring substrate 10 or the second wiring substrate 20. For this reason, deformation of the shape such as warping of the wiring board due to thermal expansion / contraction can be prevented to a minimum.

本発明に関する上述の詳細な説明を添付図面と併せて参酌すれば、第１の配線基板１０と第２の配線基板２０に設けた第１の孔部１１及び第２の孔部２１に、金属球３０を設置するといった単純な形状且つ容易な作業により、半導体チップを挟む２枚の配線基板の間隔を一定に保持するとともに、該２枚の配線基板の接合位置を高精度に決めることができる。各孔部または金属球３０のサイズを変更することにより、２枚の配線基板の間隔を容易に調整することもできる。
また、金属球３０を電気回路の一部として適用することにより、電流容量の増加にも容易に対応でき、実装スペースを小さくできるので、インバータモジュールの小型化にも寄与することができる。さらに、金属球３０は、一部が凸又は凹状に変形した略球形、又は端部が曲面を有する円柱形の略球形状であっても良いので、材料の選定が容易になり、コスト面においても安価になる。なお、金属球３０については、銅コア材に半田層をコーティングした銅コア半田ボールを用いることにより、該２枚の配線基板の間隔を高い精度で保持することができるとともに、半田付けの作業及び半田付着量の調整が容易になり、安定した強固な半田接合を行うことができるので、信頼性の向上にも寄与することとなる。
さらに、金属球３０を、第１の配線基板１０又は第２の配線基板２０を介して、温度差の生じ易い放熱部４０と隣り合う位置に配置することにより、基板の接合強度が向上し、熱膨張・収縮による配線基板の反り等の形状の変形を最小限に防止することができる。 When the above detailed description of the present invention is taken in conjunction with the accompanying drawings, the first hole portion 11 and the second hole portion 21 provided in the first wiring board 10 and the second wiring board 20 are made of metal. With a simple shape and easy work such as installing the sphere 30, the distance between the two wiring boards sandwiching the semiconductor chip can be kept constant, and the joining position of the two wiring boards can be determined with high accuracy. . By changing the size of each hole or metal ball 30, the distance between the two wiring boards can be easily adjusted.
Further, by applying the metal ball 30 as a part of the electric circuit, it is possible to easily cope with an increase in current capacity and to reduce the mounting space, which can contribute to the downsizing of the inverter module. Furthermore, the metal sphere 30 may have a substantially spherical shape with a part deformed into a convex shape or a concave shape, or a substantially spherical shape with a cylindrical shape with a curved end portion. Will also be cheaper. As for the metal balls 30, by using a copper core solder ball in which a copper core material is coated with a solder layer, the distance between the two wiring boards can be maintained with high accuracy, and soldering work and Adjustment of the amount of solder adhesion is facilitated, and stable and strong solder bonding can be performed, which contributes to improvement in reliability.
Furthermore, by arranging the metal ball 30 at a position adjacent to the heat radiating portion 40 where the temperature difference is likely to occur via the first wiring board 10 or the second wiring board 20, the bonding strength of the board is improved, It is possible to minimize deformation of the shape such as warping of the wiring board due to thermal expansion / contraction.

本実施形態では、パワーＭＯＳＦＥＴを備えるインバータモジュールを構成する半導体装置について説明した。上述する説明を参酌すれば、ＩＧＢＴやその他の半導体デバイスにより構成される半導体装置についても同じように構成することができ、同様の効果が得られる。 In this embodiment, the semiconductor device which comprises an inverter module provided with power MOSFET was demonstrated. In consideration of the above description, a semiconductor device including an IGBT and other semiconductor devices can be configured in the same manner, and the same effect can be obtained.

また、本発明により、高発熱環境下における良好な放熱性、配線基板同士の高い接合強度や高い位置決め精度等から得られる高い信頼性、及びコンパクト性等が要求される分野への適用が可能となる。
例えば、高周波大電流対応のインバータへの適用、耐振動性やコンパクトさが要求される車載用インバータへの適用が実現できる。あるいは、耐熱性、耐振動性及びコンパクト性が要求されるロボットアームの内部に制御用の半導体装置として、本発明の半導体装置を搭載することも可能になる。 In addition, according to the present invention, it is possible to apply to fields that require good heat dissipation in a high heat generation environment, high reliability obtained from high bonding strength between wiring boards, high positioning accuracy, etc., and compactness. Become.
For example, the present invention can be applied to an inverter for high frequency and large current, and to an in-vehicle inverter that requires vibration resistance and compactness. Alternatively, the semiconductor device of the present invention can be mounted as a control semiconductor device inside a robot arm that requires heat resistance, vibration resistance, and compactness.

本発明は、工作機械、ロボット、一般産業機械等に使用されるサーボドライブ装置、インバータ装置、または一般的なスイッチング電源等の電力変換装置を構成する半導体装置に適用できる。 The present invention can be applied to a semiconductor device constituting a power conversion device such as a servo drive device, an inverter device, or a general switching power source used in a machine tool, a robot, a general industrial machine, or the like.

１ インバータモジュール
１０ 第１の配線基板
２０ 第２の配線基板
３０ 金属球
４０ 放熱部
５０ 半田
６０ 出力端子
１００ 第１の半導体チップ
２００ 第２の半導体チップ
DESCRIPTION OF SYMBOLS 1 Inverter module 10 1st wiring board 20 2nd wiring board 30 Metal sphere 40 Heat radiation part 50 Solder 60 Output terminal 100 1st semiconductor chip 200 2nd semiconductor chip

上記課題を解決するため、本発明の一の観点によれば、第１の孔部を有する第１の配線基板と、前記第１の孔部に対向する位置に第２の孔部を有する第２の配線基板と、前記第１及び第２の孔部の孔径よりも大きい径を有し、前記第１の配線基板と前記第２の配線基板との間、且つ前記第１の孔部及び前記第２の孔部に設置され、前記第１及び第２の配線基板とそれぞれ接合された少なくとも１つの金属球と、前記金属球の隣に間隔をおいて、前記第１の配線基板上に実装された第１の半導体チップとを備えた半導体装置が適用される。
また、前記第１の配線基板上に、さらに第２の半導体チップが実装され、前記金属球は、前記第１の半導体チップと前記第２の半導体チップとの間に設置されてもよい。
また、前記半導体装置は放熱部を備えており、前記金属球は、前記第１の配線基板または第２の配線基板を介して、前記放熱部と隣り合う位置に設けられてもよい。
また、前記金属球は、一部が凸又は凹状に変形した略球形、又は端部が曲面を有する円柱形のいずれかを含む形状としてもよい。
また、前記金属球は、銅コア材に半田層をコーティングした銅コア半田ボールからなるものであってもよい。
また、回転機器及び前記回転機器の動作を制御する制御部を備えた工作機械又はロボットの駆動装置において、前記制御部には請求項１〜５のいずれかに記載の半導体装置を備えてもよい。
また、直流電力から交流電力を電気的に生成する回路を備えたインバータ装置において、前記回路には請求項１〜５のいずれかに記載の半導体装置を備えてもよい。
また、本発明の他の観点によれば、第１の配線基板及び第２の配線基板を準備する工程と、前記第１及び第２の配線基板にそれぞれ第１の孔部及び第２の孔部を設ける工程と、前記第１又は第２の配線基板のいずれかに半導体チップを実装するとともに、前記第１又は第２の孔部の一方の孔部に金属球を設置して、前記金属球が設置された前記第１又は第２の配線基板の一方の配線基板と前記金属球とを接合材により接合する工程と、前記金属球を他方の孔部に設置することにより、前記第１の孔部と第２の孔部を対向させて前記第１の配線基板及び第２の配線基板の位置を整合する工程と、前記金属球と他方の配線基板とを接合材により接合する工程とを有する半導体装置の製造方法が適用される。 In order to solve the above problems, according to one aspect of the present invention, a first wiring board having a first hole and a second hole having a second hole at a position opposite to the first hole. Two wiring boards and a diameter larger than the hole diameters of the first and second holes, between the first wiring board and the second wiring board, and between the first holes and At least one metal sphere installed in the second hole and bonded to each of the first and second wiring boards, and on the first wiring board with an interval next to the metal sphere. A semiconductor device including a mounted first semiconductor chip is applied.
Further, the first wiring board is further a second semiconductor chip is mounted, the metallic ball may be disposed between the first semiconductor chip and the second semiconductor chip.
The semiconductor device may include a heat dissipation portion, and the metal sphere may be provided at a position adjacent to the heat dissipation portion via the first wiring board or the second wiring board.
The metal ball is substantially spherical portion is deformed in a convex or concave shape, or the end portion may be a shape including one of a cylindrical shape having a curved surface.
The metal ball may it der made of copper core solder balls coated with solder layer on the copper core member.
Moreover, in the drive device of the machine tool or robot provided with the control part which controls operation | movement of the rotating equipment and the said rotating equipment, the said control part may be provided with the semiconductor device in any one of Claims 1-5. .
Moreover, the inverter apparatus provided with the circuit which produces | generates alternating current power from direct current power may be provided with the semiconductor device in any one of Claims 1-5 in the said circuit .
According to another aspect of the present invention, a step of preparing a first wiring board and a second wiring board, and a first hole portion and a second hole in the first wiring board and the second wiring board, respectively. A step of providing a portion, mounting a semiconductor chip on either the first or second wiring board, and installing a metal ball in one hole portion of the first or second hole portion, A step of bonding one wiring board of the first or second wiring board on which the sphere is installed and the metal sphere with a bonding material; and installing the metal sphere in the other hole, thereby A step of aligning the positions of the first wiring board and the second wiring board with the hole part and the second hole part facing each other, and a step of joining the metal sphere and the other wiring board with a bonding material; A method for manufacturing a semiconductor device having the above is applied.

Claims (8)

第１の孔部を有する第１の配線基板と、
前記第１の孔部に対向する位置に第２の孔部を有する第２の配線基板と、
前記第１及び第２の孔部の孔径よりも大きい径を有し、前記第１の配線基板と前記第２の配線基板との間、且つ前記第１の孔部及び前記第２の孔部に設置され、前記第１及び第２の配線基板とそれぞれ接合された少なくとも１つの金属球と、
前記金属球の隣に間隔をおいて、前記第１の配線基板上に実装された第１の半導体チップとを備えたことを特徴とする半導体装置。 A first wiring board having a first hole;
A second wiring board having a second hole at a position facing the first hole;
The first and second hole portions have a diameter larger than the hole diameters of the first and second hole portions, between the first wiring substrate and the second wiring substrate, and between the first hole portion and the second hole portion. And at least one metal sphere bonded to each of the first and second wiring boards,
A semiconductor device comprising: a first semiconductor chip mounted on the first wiring board at an interval next to the metal sphere. 前記第１の配線基板上に、さらに第２の半導体チップが実装され、前記金属球は、前記第１の半導体チップと前記第２の半導体チップとの間に設置されたことを特徴とする半導体装置。 A second semiconductor chip is further mounted on the first wiring board, and the metal sphere is disposed between the first semiconductor chip and the second semiconductor chip. apparatus. 前記金属球は、一部が凸又は凹状に変形した略球形、又は端部が曲面を有する円柱形のいずれかを含む形状であることを特徴とする請求項１又は２記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the metal sphere has a shape including any one of a substantially spherical shape partially deformed into a convex shape or a concave shape, or a cylindrical shape whose end portion has a curved surface. 前記金属球は、銅コア材に半田層をコーティングした銅コア半田ボールからなることを特徴とする請求項１又は２記載の半導体装置。 3. The semiconductor device according to claim 1, wherein the metal sphere is made of a copper core solder ball obtained by coating a copper core material with a solder layer. 前記半導体装置は放熱部を備えており、前記金属球は、前記第１の配線基板または第２の配線基板を介して、前記放熱部と隣り合う位置に設けられたことを特徴とする請求項１又は２記載の半導体装置。 The semiconductor device includes a heat dissipating part, and the metal sphere is provided at a position adjacent to the heat dissipating part via the first wiring board or the second wiring board. 3. The semiconductor device according to 1 or 2. 回転機器及び前記回転機器の動作を制御する制御部を備えた工作機械又はロボットの駆動装置において、前記制御部には請求項１又は２記載の半導体装置を備えたことを特徴とする駆動装置。 3. A driving apparatus for a machine tool or a robot provided with a rotating device and a control unit for controlling the operation of the rotating device, wherein the control unit includes the semiconductor device according to claim 1 or 2. 直流電力から交流電力を電気的に生成する回路を備えたインバータ装置において、前記回路には請求項１又は２記載の半導体装置を備えたことを特徴とするインバータ装置。 An inverter device comprising a circuit that electrically generates AC power from DC power, wherein the circuit comprises the semiconductor device according to claim 1. 第１の配線基板及び第２の配線基板を準備する工程と、
前記第１及び第２の配線基板にそれぞれ第１の孔部及び第２の孔部を設ける工程と、
前記第１又は第２の配線基板のいずれかに半導体チップを実装するとともに、前記第１又は第２の孔部の一方の孔部に金属球を設置して、前記金属球が設置された前記第１又は第２の配線基板の一方の配線基板と前記金属球とを接合材により接合する工程と、
前記金属球を他方の孔部に設置することにより、前記第１の孔部と第２の孔部を対向させて前記第１の配線基板及び第２の配線基板の位置を整合する工程と、
前記金属球と他方の配線基板とを接合材により接合する工程とを有することを特徴とする半導体装置の実装方法。 Preparing a first wiring board and a second wiring board;
Providing a first hole and a second hole in the first and second wiring boards, respectively;
The semiconductor chip is mounted on either the first or second wiring board, a metal sphere is installed in one of the first or second hole, and the metal sphere is installed. Bonding one wiring board of the first or second wiring board and the metal sphere with a bonding material;
A step of aligning the positions of the first wiring board and the second wiring board by placing the metal sphere in the other hole portion so that the first hole portion and the second hole portion are opposed to each other;
A method of mounting a semiconductor device, comprising the step of bonding the metal sphere and the other wiring board with a bonding material.
JP2010122391A 2010-05-28 2010-05-28 Semiconductor device and method of manufacturing the same Pending JP2011249636A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2010122391A JP2011249636A (en) 2010-05-28 2010-05-28 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2010122391A JP2011249636A (en) 2010-05-28 2010-05-28 Semiconductor device and method of manufacturing the same

Publications (1)

Publication Number Publication Date
JP2011249636A true JP2011249636A (en) 2011-12-08

Family

ID=45414507

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010122391A Pending JP2011249636A (en) 2010-05-28 2010-05-28 Semiconductor device and method of manufacturing the same

Country Status (1)

Country Link
JP (1) JP2011249636A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014144477A (en) * 2013-01-30 2014-08-14 Hitachi Metals Ltd Connection structure of conductive member, connection method for conductive member, and optical module
CN107567657A (en) * 2015-05-08 2018-01-09 敏捷电源开关三维集成Apsi3D Semiconductor power device and the method for assembling semiconductor power device
JP2020113782A (en) * 2015-05-08 2020-07-27 アジャイル・パワー・スイッチ・３・ディー−インテグレイション・エイ・ピー・エス・アイ・３・ディー Method of assembling semiconductor power device

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03295266A (en) * 1990-04-12 1991-12-26 Hitachi Ltd High integrated semiconductor device
JP2007287833A (en) * 2006-04-14 2007-11-01 Mitsubishi Electric Corp Power semiconductor device

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03295266A (en) * 1990-04-12 1991-12-26 Hitachi Ltd High integrated semiconductor device
JP2007287833A (en) * 2006-04-14 2007-11-01 Mitsubishi Electric Corp Power semiconductor device

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014144477A (en) * 2013-01-30 2014-08-14 Hitachi Metals Ltd Connection structure of conductive member, connection method for conductive member, and optical module
CN107567657A (en) * 2015-05-08 2018-01-09 敏捷电源开关三维集成Apsi3D Semiconductor power device and the method for assembling semiconductor power device
JP2018515941A (en) * 2015-05-08 2018-06-14 アジャイル・パワー・スイッチ・３・ディー−インテグレイション・エイ・ピー・エス・アイ・３・ディー Semiconductor power device and method for assembling semiconductor power device
US20180286814A1 (en) * 2015-05-08 2018-10-04 Agile Power Switch 3D - Integration Apsi3D Semiconductor power device and a method of assembling a semiconductor power device
US10714428B2 (en) 2015-05-08 2020-07-14 Agile Power Switch 3D—Integration Apsi3D Semiconductor power device and a method of assembling a semiconductor power device
JP2020113782A (en) * 2015-05-08 2020-07-27 アジャイル・パワー・スイッチ・３・ディー−インテグレイション・エイ・ピー・エス・アイ・３・ディー Method of assembling semiconductor power device

Similar Documents

Publication Publication Date Title
JP5975180B2 (en) Semiconductor module
JP4613077B2 (en) Semiconductor device, electrode member, and method for manufacturing electrode member
JP4438489B2 (en) Semiconductor device
JP4635564B2 (en) Semiconductor device
JP4973059B2 (en) Semiconductor device and power conversion device
WO2014115561A1 (en) Semiconductor device
JP2007184525A (en) Electronic apparatus
JP5930980B2 (en) Semiconductor device and manufacturing method thereof
CN109698179B (en) Semiconductor device and method for manufacturing semiconductor device
JP4575034B2 (en) Inverter device
WO2023221970A1 (en) Power module, power supply system, vehicle, and photovoltaic system
JP2013021371A (en) Semiconductor device and semiconductor device manufacturing method
JP6200759B2 (en) Semiconductor device and manufacturing method thereof
WO2020105476A1 (en) Semiconductor device
US10566308B2 (en) Semiconductor device manufacturing method and soldering support jig
JP2011249636A (en) Semiconductor device and method of manufacturing the same
JP5619232B2 (en) Semiconductor device and method for manufacturing electrode member
JP5840102B2 (en) Power semiconductor device
JP2011023748A (en) Electronic apparatus
WO2021100747A1 (en) Power semiconductor device, method for manufacturing same, and power conversion apparatus
JP2019083292A (en) Semiconductor device
JP5485833B2 (en) Semiconductor device, electrode member, and method for manufacturing electrode member
JP2006140403A (en) Manufacturing method and manufacturing device for semiconductor device
US20220384321A1 (en) Semiconductor module and method for fabricating the same
JP5482536B2 (en) Semiconductor manufacturing method

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20120307

RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20120316

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20121001

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20130226

A521 Written amendment

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20130417

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20130730