JP2013171891A - Semiconductor device, semiconductor module, and semiconductor module manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a semiconductor device which reduces thermal resistance in a section from a semiconductor chip to a radiator and also restrains a variation in the thickness of an insulation layer caused by a metal block assembly error, thereby making it possible to improve heat radiation performance.SOLUTION: A semiconductor device comprises: a semiconductor chip 40 having an emitter electrode and a collector electrode respectively on both faces and a control electrode on at least one of the faces; an emitter plate 50 made of metal, which is joined to the emitter electrode of the semiconductor chip; a collector plate 60 made of metal, which is joined to the collector electrode of the semiconductor chip; a connection terminal connected to the control electrode via thin metal wire; and a mold resin 80 which seals the semiconductor chip, the emitter plate, the collector plate and part of the connection terminal, leaving an emitter conductive face 52 perpendicular to the bonded surface of the emitter plate with the semiconductor chip and a collector conductive face 62 perpendicular to the bonded surface of the collector plate with the semiconductor chip exposed.

Description

  Embodiments described herein relate generally to a semiconductor device, a semiconductor module, and a method for manufacturing a semiconductor module.

  In an electric vehicle or the like, an inverter device using a power semiconductor device is used. In a power semiconductor device, a power semiconductor module is mounted on a substrate that also serves as a cooler, and is sealed with a resin or the like.

  The power semiconductor module needs to remove the heat loss generated in the semiconductor chip when switching a large current and keep the chip temperature below the operable temperature. For this reason, it is necessary to reduce the thermal resistance from the semiconductor chip to the cooler. In addition, since the operating voltage is as high as several hundred volts to several thousand volts, an insulating layer having a high withstand voltage is required. A material having high thermal conductivity is used for the insulating layer. However, since the thermal resistance is higher than that of a metal material, it becomes an obstacle to heat dissipation performance.

  In order to solve such a problem, a structure is known in which heat is transferred to a cooler through metal blocks arranged on both sides of a semiconductor chip, thereby cooling with high efficiency.

JP 2010-161131 A Japanese Patent No. 4575034

  The semiconductor device having the above-described cooling structure has the following problems. That is, the metal block has a complicated shape, the distance to the cooler becomes long, and the heat dissipation performance decreases, and the height of the adhesion surface of the metal block to the resin insulation sheet due to the assembly error between adjacent metal blocks Since the variation occurs, there is a problem that the thickness of the insulating resin sheet layer varies and the heat dissipation performance is deteriorated.

  Accordingly, to provide a semiconductor device capable of reducing the thermal resistance from the semiconductor chip to the cooler and suppressing the thickness variation of the insulating resin sheet due to the assembly error of the metal block, thereby improving the heat dissipation performance. It is aimed.

  A semiconductor chip having an emitter electrode and a collector electrode on both sides and a control electrode on at least one side, a metal emitter plate joined to the emitter electrode of the semiconductor chip, and the collector electrode of the semiconductor chip A metal-made collector plate joined to the control electrode, a connection terminal connected to the control electrode via a thin metal wire, the semiconductor chip, the emitter plate, the collector plate, and a part of the connection terminal, A mold resin for exposing and sealing the emitter conductive surface perpendicular to the bonding surface of the emitter plate with the semiconductor chip and the collector conductive surface of the collector plate perpendicular to the bonding surface with the semiconductor chip; The area of the emitter conduction surface is larger than the area of the emitter electrode of the semiconductor chip, and the area of the collector conduction surface is the semiconductor chip. Larger than the area of the collector electrode, the area of the collector conduction surface being greater than the area of the emitter conductive surface.

The perspective view which shows the semiconductor module which concerns on 1st Embodiment. The longitudinal cross-sectional view which shows the semiconductor module. The longitudinal cross-sectional view which shows the semiconductor device. Explanatory drawing which shows the positional relationship of each part in the semiconductor device. The top view which shows the cooling plate which comprises the semiconductor module. Explanatory drawing which shows the manufacturing process of the same semiconductor device. Explanatory drawing which shows the manufacturing process of the same semiconductor device. Explanatory drawing which shows the manufacturing process of the same semiconductor module. FIG. 3 is an explanatory diagram showing a relationship between emitter thickness / collector thickness and chip operating temperature in the semiconductor device. The description which shows the relationship between the area | region of the collector conduction surface / switching element area and chip | tip operating temperature in the semiconductor device. The longitudinal cross-sectional view which shows the function of the semiconductor module. The top view which shows the inverter apparatus with which the semiconductor device was integrated. The longitudinal cross-sectional view which shows the semiconductor module which concerns on the 2nd Embodiment of this invention. The bottom view which shows the same semiconductor device. The longitudinal cross-sectional view which shows the semiconductor package which comprises the semiconductor module which concerns on the 3rd Embodiment of this invention. The bottom view which shows the same semiconductor device. Explanatory drawing which shows the manufacturing process of the same semiconductor device. Explanatory drawing which shows the manufacturing process of the same semiconductor module. The longitudinal cross-sectional view which shows the principal part of the semiconductor module which concerns on the 4th Embodiment of this invention.

(First embodiment)
FIG. 1 is a perspective view showing a semiconductor module 10 according to the first embodiment, FIG. 2 is a longitudinal sectional view showing the semiconductor module 10, and FIG. 3 is a longitudinal sectional view showing a semiconductor device 30 constituting the semiconductor module 10. 4 is an explanatory view showing the positional relationship of each part in the semiconductor device 30, FIG. 5 is a plan view showing a cooling plate 20 constituting the semiconductor module 10, FIG. 6 is an explanatory view showing a manufacturing process of the semiconductor module 10, and FIG. FIG. 8 is an explanatory view showing the manufacturing process of the semiconductor module 10, FIG. 9 is a longitudinal sectional view showing the function of the semiconductor module 10, and FIG. 10 is an inverter device in which the semiconductor module 10 is incorporated. FIG.

  As shown in FIGS. 1 and 2, the semiconductor module 10 includes a cooling plate 20, two semiconductor devices 30 provided on the cooling plate 20, and solder for mounting the semiconductor device 30 on the cooling plate 20. And a joining portion 100 made of a material.

  As shown in FIGS. 2 and 3, the cooling plate 20 includes an aluminum metal plate 21, an insulating layer 22 formed on the metal plate 21, and a copper foil formed on the insulating layer 22. Metal wiring 23 is provided. As will be described later, the metal wiring 23 is sandwiched and joined with one of the insulating material 22 and one of the emitter conductive surface 52 and the collector conductive surface 62. As an example of the thickness, the metal plate 21 is 3 mm, the insulating layer 22 is 0.1 mm, and the metal wiring 23 is 0.2 mm.

  As shown in FIG. 3, the semiconductor device 30 includes a semiconductor chip 40 having a principal surface placed in a vertical direction, a copper emitter plate 50, a copper collector plate 60, connection terminals 73, and the like. The semiconductor chip 40, the emitter plate 50, the collector plate 60, and a mold resin 80 for sealing a part of the connection terminals 73 are provided. Note that an emitter conductive surface 52 described later of the emitter plate 50 and a collector conductive surface 62 of the collector plate 60 are exposed from the mold resin 80 to the outside.

  As shown in FIGS. 3 and 4, the semiconductor chip 40 is a set of switching elements 40 a and freewheeling diodes 45, and the switching elements 40 a include a first main surface 41 and a second main surface 42. The first main surface 41 is provided with an emitter electrode 41a and a control electrode 41b, and the second main surface 42 is provided with a collector electrode 42a.

  An emitter plate 50 is connected to the emitter electrode 41a from the emitter electrode 41a side in the order of a conductive bonding material 43a such as solder, a spacer 43b made of copper, and a bonding material 43c. A connection portion 72 (to be described later) of the connection terminal 73 is connected to the control electrode 41b through an aluminum wire (metal thin wire) 41c. In addition, the bonding material 43a, the conductive spacer 43b, and the bonding material 43c are collectively indicated by reference numeral 43 as appropriate.

  The copper spacer 43b has a function of preventing contact between the emitter plate 50 and the insulating portion other than the emitter electrode 41a of the switching element 40a. By forming the emitter plate 50 and the spacer 43b as separate parts, the shape of the emitter plate can be a rectangular parallelepiped that can be easily processed, so that the processing accuracy can be improved and the manufacturing yield can be improved.

  A collector plate 60 is connected to the collector electrode 42a from the collector electrode 42a side through a bonding material 44. The emitter plate 50 is formed in a rectangular parallelepiped shape, and has an electrode surface (bonding surface) 51 facing the semiconductor chip 40 and an emitter conductive surface (conduction surface) perpendicular to the electrode surface 51 and facing the cooling plate 20. 52. Both the electrode surface (joint surface) 51 and the emitter conductive surface (conduction surface) 52 are formed so as to be conductive by abutting against opposing members.

  The free-wheeling diode 45 is an element for flowing an induced current during switching. A positive electrode is formed on the first main surface 46, a negative electrode 46b is formed on the second main surface, and the positive electrode is connected to the emitter plate 50. Negative electrode 46 b is connected to collector plate 60.

  Of the switching element 40a and the freewheeling diode 45, the amount of heat generated by the switching element is large, and attention must be paid to the chip operating temperature. Therefore, the heat dissipation of the semiconductor chip 40 will be mainly described with respect to the switching element 40a.

  The collector plate 60 is formed in a rectangular parallelepiped shape, and includes an electrode surface 61 that faces the semiconductor chip 40, and an emitter conductive surface 62 that is perpendicular to the electrode surface (joint surface) 61 and faces the cooling plate 20. ing. Both the electrode surface (joint surface) 61 and the emitter conductive surface (conduction surface) 62 are formed so as to be conductive by abutting against opposing members.

  The connection terminal 73 is a part of the lead frame 70. The lead frame 70 protrudes from the support portion 71 supported by the emitter plate 50, the connection portion 72 connected to the control electrode 41b described above, and the molding resin 80, and a connection terminal (used for connection to an external terminal or the like). (Lead) 73 and a connecting portion 74 for connecting them together (see FIG. 4). The connecting portion 74 is cut off when the product is completed.

  Next, the manufacturing process of the semiconductor module 10 will be described with reference to FIGS. 4 and 5 show the positional relationship between the respective parts of the semiconductor device 30 and the cooling plate 20. A portion 23 a indicated by a two-dot chain line in FIG. 5 indicates a portion for attaching the power terminal E.

  As shown in FIG. 6, the support portion 71 of the lead frame 70 is joined to the emitter plate 50 by ultrasonic joining. On the other hand, the collector electrode 42a is mounted on the collector plate 60 via the bonding material 44 (no bonding is performed). Next, the spacer 43b is mounted via the bonding material 43a (no bonding is performed). Next, the emitter plate 50 to which the support portion 71 is attached is mounted on the spacer 43b via the bonding material 43c (no bonding is performed). By using the following reflow apparatus, the semiconductor chip 40, the spacer 43b, the emitter plate 50, and the collector plate 60 are collectively heated in an inert atmosphere or a reducing atmosphere to melt and solidify the bonding materials 43a and 44. Join. And the control electrode 41b and the connection part 72 are connected with the wire 41c by the wire 41c.

  As shown in FIG. 7, a part of the semiconductor chip 40, the emitter plate 50, the collector plate 60, and the lead frame 70 is resin-sealed by a transfer molding method to form a mold resin 80. In FIG. 7, for the sake of convenience, the semiconductor chip 40, the emitter plate 50, the collector plate 60, the lead frame 70, and the like are indicated by solid lines. At this time, the emitter conductive surface 52 of the emitter plate 50 and the collector conductive surface 62 of the collector plate 60 are exposed to the outside. Next, the mold resin 80 is ground so that the emitter conductive surface 52 and the collector conductive surface 62 are in the same plane. Then, the connecting portion 74 of the lead frame 70 is cut to form the connection terminal 73.

  As shown in FIG. 8, the solder paste P is applied on the metal wiring 23 of the cooling plate 20, the semiconductor device 30 is positioned, and put into a reflow furnace. The solder paste P is melted and solidified to form the joint 100, and the cooling plate 20 and the semiconductor device 30 are integrated.

  According to the semiconductor module 10 configured as described above, the heat generated by the semiconductor chip 40 is transmitted to the emitter plate 50 and the collector plate 60, and the junction 100, via the emitter conductive surface 52 and the collector conductive surface 62. It is transmitted to the metal wiring 23, the insulating layer 22, and the metal plate 21 to enable heat dissipation. For this reason, it is possible to cool from both surfaces of the semiconductor chip 40 with high efficiency. In addition, since the area contributing to heat transfer of the insulating layer 22 increases due to the heat dissipation effect of the metal wiring 23, the thermal resistance between the semiconductor chip 40 and the metal plate 21 can be reduced.

  In this structure, as shown in FIG. 9A, the heat radiation efficiency can be improved by designing the emitter conductive surface area / collector conductive surface area ratio between 0.25 and 0.75. This is because the emitter electrode of the switching element requires an insulating region around the periphery to ensure a withstand voltage, whereas the collector electrode 42a is equal to the chip area, so the area of the emitter electrode is smaller than the collector electrode, This is because the amount of heat radiation on the emitter electrode side is smaller than that on the collector electrode side. Therefore, by increasing the ratio of the conductive surfaces of the collector plate, the heat flow rates on the collector plate side and the emitter plate side are made uniform, and the heat radiation efficiency is improved.

In the present embodiment, the emitter electrode area / chip area of the switching element is 0.5. Based on this design value, a simulation of the operating temperature of the semiconductor chip was performed when the thickness ratio of the emitter plate to the collector plate, that is, the area ratio of the exposed surface was changed. It is preferable that the emitter electrode area / chip area ratio of the switching element is designed so that the emitter plate thickness / collector plate thickness ratio is within a range of ± 50% of the emitter electrode area / chip area ratio. It can be seen that heat dissipation performance can be obtained. In particular, the emitter plate thickness / collector plate thickness is 0.6, the chip operating temperature is minimum, and the maximum heat dissipation performance is obtained. In the present embodiment, this value is used as a design value. In the figure, G indicates the current design value. Here, when the ratio of the emitter electrode area to the semiconductor chip area is QA, and the ratio of the emitter plate thickness to the collector plate thickness is QB,
The relationship is QA × 0.5 ≦ QB ≦ 2 × QA.

  FIG. 9B shows the result of simulating the relationship between the collector plate thickness and the chip operating temperature. Here, the collector plate width was fixed to 40 mm and the collector plate was increased to change the ratio of the collector conductive surface area / switching element area. It can be seen that as the area of the collector conducting surface, that is, the collector plate thickness increases, the heat dissipation performance improves and the operating temperature of the semiconductor chip decreases. It can also be seen that when the collector conductive surface area / switching element area is increased from 2.6 to 4.6, the slope of the operating temperature drop is reduced to 30% or less. This is because the increase in the collector plate thickness greatly contributes to the improvement of the heat dissipation performance. However, if the collector conduction surface area / switching element area is increased to 4.6, the effect of improving the heat dissipation performance is reduced, and the large size due to the increase in the size of the device. It shows that the shortcomings of increasing the weight and weight appear. Based on this knowledge, in this structure, by setting the ratio of the collector conductive surface area / switching element area between 2.0 and 4.0, it is possible to achieve both high heat dissipation performance and reduction in size and weight of the device. I am letting.

  Further, as shown in FIG. 9C, in this structure, since the solder material joint 100 absorbs the height variation due to the assembly error between the emitter plate 50 and the collector plate 60, the thickness of the insulating layer 22 is the outer shape of the semiconductor device. It is easy to keep thin and constant without depending on accuracy. Thus, since the film thickness of the insulating layer, which is the material having the highest thermal resistance in the heat radiation path, can be set to the minimum necessary film thickness, high heat radiation performance can be realized.

  An inverter device using the semiconductor module of the present invention is shown in FIG. A cooling plate 210 and a plurality of semiconductor devices 30 arranged in two rows in a plane on the cooling plate 210 are provided. These semiconductor devices 30 include a semiconductor device array 220 connected to an external power generation motor, a semiconductor device array 230 connected to an external drive motor, and a semiconductor device array 240 connected to an external booster. Yes. Note that the number and connection form of the semiconductor device 30 arrays in each of the semiconductor device arrays 220 to 240 are appropriately determined according to the amount of current flowing.

  Here, the positive motor side and the negative electrode side are each formed of one semiconductor device, and the generator motor unit is formed in parallel to form a three-phase AC circuit. Since the drive motor unit and the booster unit have a large amount of current, two semiconductor devices are connected in parallel on the positive electrode side and the negative electrode side, respectively, and the drive motor unit forms a three-phase AC circuit by connecting these three in parallel. Yes.

  The pattern of the metal wiring 23 on the cooling plate is formed by forming the positive, negative, U-phase, V-phase, and W-phase metal wirings of the power generation unit obliquely with respect to the alignment direction of the semiconductor device array. It is possible to share the negative electrode of the phase and the positive electrode of the V phase and the U phase, and the circuit can be configured with only planar wiring. Furthermore, the inverter by sharing the negative electrode of the power generation unit U phase and the drive unit W phase, the positive electrode of the W phase and the V phase of the drive unit, the negative electrode of the drive unit V and U phases, the positive electrode of the drive unit U phase and the boost unit Therefore, it is possible to improve the reliability.

  In addition, by forming an inverter device by combining a plurality of semiconductor devices and cooling plates in this way, it is possible to respond to changes in the output capacity and the number of output terminals only by changing the metal wiring pattern on the cooling plate. Design becomes easy.

(Second Embodiment)
FIG. 11 is a longitudinal sectional view showing a semiconductor device 30 constituting a semiconductor module 10A according to the second embodiment of the present invention, and FIG. 12 is a bottom view showing the semiconductor device 30. In these drawings, the same functional parts as those in FIG. 2 described above are denoted by the same reference numerals, and detailed description thereof is omitted.

  As shown in FIG. 12, protrusions 81 are provided at the four corners of the mold resin 80 on the cooling plate 20 side. On the other hand, an engaging portion 24 is formed adjacent to the metal wiring 23 on the upper surface of the insulating layer 22. In addition to the engaging portion 24, a concave portion 22a may be provided on the upper surface of the insulating layer 22.

  Thus, in the semiconductor module 10A, the same effects as those of the semiconductor module 10 described above can be obtained. In addition, since the protrusion 81 is provided, the thickness of the joint portion 100 can be controlled. Further, the engaging portion 24 engages with the above-described protrusion 81 and restricts movement in the direction along the surface of the cooling plate 20. For this reason, when the cooling plate 20 and the semiconductor device 30 are assembled, it is possible to prevent positional deviation, and it is possible to improve yield and reliability.

(Third embodiment)
FIG. 13 is a longitudinal sectional view showing a semiconductor device 30 constituting a semiconductor module 10B according to a third embodiment of the present invention, FIG. 14 is a bottom view showing the semiconductor device 30, and FIG. 15 shows a manufacturing process of the semiconductor module 10B. FIG. 16 is an explanatory view showing a manufacturing process of the semiconductor module 10B. In these drawings, the same functional parts as those in FIGS. 6 to 8 and FIGS. 11 and 12 are denoted by the same reference numerals, and detailed description thereof is omitted.

  As shown in FIGS. 13 and 14, the semiconductor module 10 </ b> C includes a protrusion 81 and a wall-like protrusion 82 that partitions the emitter conductive surface 52 and the collector conductive surface 62. In addition, an adhesive 25 is applied between the metal wirings 23 of the cooling plate 20, and the wall-shaped protrusion 82 and the adhesive 25 are joined.

  Next, the manufacturing process of the semiconductor module 10 will be described with reference to FIGS. The joining of the semiconductor chip 40, the emitter plate 50, the collector plate 60, and the lead frame 70 is the same as in FIG.

  Next, as shown in FIG. 15, a part of the semiconductor chip 40, the emitter plate 50, the collector plate 60, and the lead frame 70 is resin-sealed to form a mold resin 80. At this time, the emitter conductive surface 52 of the emitter plate 50 and the collector conductive surface 62 of the collector plate 60 are exposed to the outside. Then, the connecting portion 74 of the lead frame 70 is cut to form the connection terminal 73.

  As shown in FIG. 16, a solder paste P is applied on the metal wiring 23 of the cooling plate 20, and an adhesive 25 is applied between the metal wirings 23. The submodule 30 is positioned and put into a reflow furnace. The solder paste P is melted and solidified to form the joint portion 100, and the cooling plate 20 and the submodule 30 are integrated, and at the same time, the adhesive 25 is heated and cured.

  According to the semiconductor module 10B configured as described above, the same effects as those of the semiconductor modules 10 and 10A can be obtained, and creeping discharge between the metal wiring 23 and between the emitter conductive surface 52 and the collector conductive surface 62 can be suppressed. And the withstand voltage is improved.

(Fourth embodiment)
FIG. 17 is a longitudinal sectional view showing a main part of a semiconductor module 10C according to the fourth embodiment of the present invention. In this figure, the same functional parts as those in FIG. 2 described above are denoted by the same reference numerals, and detailed description thereof is omitted.

  In the semiconductor module 10C, the gap between the bottom surface of the submodule 30 and the cooling plate 20 is sealed with a resin 300 in which epoxy and silica powder are mixed. Such a configuration has the same effect as that of the semiconductor module 10 described above, and also has an effect of suppressing creeping discharge between the metal wirings 23 and between the emitter conductive surface 52 and the collector conductive surface 62, and withstand voltage is reduced. improves.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are included in the invention described in the claims and the equivalents thereof.

  DESCRIPTION OF SYMBOLS 10, 10A, 10B, 10C ... Semiconductor module, 20 ... Cooling plate, 21 ... Metal plate, 22 ... Insulating layer, 23 ... Metal wiring, 30 ... Semiconductor device, 40 ... Semiconductor chip, 50 ... Emitter plate, 52 ... Emitter conduction Surface, 60 ... Collector plate, 62 ... Collector conductive surface, 70 ... Lead frame, 71 ... Support portion, 72 ... Connection portion, 73 ... Connection terminal, 74 ... Connection portion, 80 ... Mold resin, 100 ... Joint portion, 200 ... Inverter device, 300 ... resin.

Claims (9)

A semiconductor chip having an emitter electrode and a collector electrode on each side, and a control electrode on at least one side;
A metal-made emitter plate joined to the emitter electrode of the semiconductor chip;
A collector plate made of a metal material joined to the collector electrode of the semiconductor chip;
A connection terminal connected to the control electrode via a thin metal wire;
The semiconductor chip, the emitter plate, the collector plate, and a part of the connection terminal are connected to the emitter conductive surface perpendicular to the junction surface of the emitter plate with the semiconductor chip and the semiconductor chip of the collector plate. A mold resin that seals by exposing the collector conductive surface perpendicular to the bonding surface,
The area of the emitter conduction surface is larger than the area of the emitter electrode of the semiconductor chip, the area of the collector conduction surface is larger than the area of the collector electrode of the semiconductor chip, and the area of the collector conduction surface is larger than the area of the emitter conduction surface. A semiconductor device characterized by being large. A semiconductor chip having an emitter electrode and a collector electrode on each side, and a control electrode on at least one side;
A metal-made emitter plate joined to the emitter electrode of the semiconductor chip;
A collector plate made of a metal material joined to the collector electrode of the semiconductor chip;
A connection terminal connected to the control electrode via a thin metal wire;
The semiconductor chip, the emitter plate, the collector plate, and a part of the connection terminal are connected to the emitter conductive surface perpendicular to the junction surface of the emitter plate with the semiconductor chip and the semiconductor chip of the collector plate. A mold resin that seals by exposing the collector conductive surface perpendicular to the bonding surface,
The area of the emitter conduction surface is larger than the area of the emitter electrode of the semiconductor chip, the area of the collector conduction surface is larger than the area of the collector electrode of the semiconductor chip,
When the ratio of the emitter electrode area to the semiconductor chip area is QA, and the ratio of the emitter plate thickness to the collector plate thickness is QB,
A semiconductor device characterized in that QA × 0.5 ≦ QB ≦ 2 × QA. A semiconductor chip having an emitter electrode and a collector electrode on each side, and a control electrode on at least one side;
A metal-made emitter plate joined to the emitter electrode of the semiconductor chip;
A collector plate made of a metal material joined to the collector electrode of the semiconductor chip;
A connection terminal connected to the control electrode via a thin metal wire;
The semiconductor chip, the emitter plate, the collector plate, and a part of the connection terminal are connected to the emitter conductive surface perpendicular to the junction surface of the emitter plate with the semiconductor chip and the semiconductor chip of the collector plate. A mold resin that exposes and seals the collector conductive surface perpendicular to the bonding surface, and the area of the emitter conductive surface is larger than the area of the emitter electrode of the semiconductor chip, and the area of the collector conductive surface is the semiconductor A semiconductor device characterized in that it is larger than the area of the collector electrode of the chip, and the area of the collector conduction surface is larger than the area of the emitter conduction surface;
A plurality of the semiconductor devices are mounted, a cooling plate made of a metal material, an insulating material provided on the cooling plate, a cooler having metal wiring provided on the insulating material,
A semiconductor module, wherein the emitter conduction surface of the semiconductor device and the metal wiring of the cooler are joined by a metal joining material.   4. The semiconductor module according to claim 3, wherein the semiconductor device includes a protrusion that restricts a distance between the resin sealing portion and the insulating material toward the cooling plate.   The semiconductor module according to claim 3, wherein the insulating material has a recess into which the protrusion is inserted.   4. The semiconductor module according to claim 3, wherein the mold resin is formed toward the cooling plate side, and includes a wall-like protrusion that partitions the emitter conductive surface and the collector conductive surface. .   A sealing resin which is formed between the mold resin and the cooling plate and seals at least a junction between the emitter conductive surface of the emitter plate and the collector conductive surface of the collector plate and the metal wiring; The semiconductor module according to claim 3. A semiconductor chip having an emitter electrode and a collector electrode on both sides and a control electrode on at least one side, a metal emitter plate joined to the emitter electrode of the semiconductor chip, and the collector electrode of the semiconductor chip A metal-made collector plate joined to the control electrode, a connection terminal connected to the control electrode via a thin metal wire, the semiconductor chip, the emitter plate, the collector plate, and a part of the connection terminal, A semiconductor comprising a mold resin for exposing and sealing an emitter conductive surface perpendicular to a bonding surface of the emitter plate with the semiconductor chip and a collector conductive surface of the collector plate perpendicular to the bonding surface with the semiconductor chip. A plurality of semiconductor devices, a metal cooling plate, an insulating material provided on the cooling plate, and an insulating material provided on the insulating material. It was a method for manufacturing a semiconductor module and a condenser with a metal wire,
Join the emitter plate and lead frame by welding or ultrasonic bonding,
The semiconductor chip is aligned on the collector plate, mounted via a bonding material,
Position the emitter plate on the semiconductor chip, mount it via a bonding material,
Cooling after melting the bonding material by heating in an inert atmosphere or a reducing atmosphere, bonding the collector plate, the semiconductor chip, the emitter plate,
Using an ultrasonic bonding method, the control electrode of the semiconductor chip and the lead frame are connected by the metal thin wire,
The transfer plate method is used to seal the collector plate, the semiconductor chip, the lead frame, and the emitter plate using the mold resin.
A method of manufacturing a semiconductor module, wherein unnecessary portions of the lead frame are cut and removed by punching to form the connection terminals. A plurality of the semiconductor devices are mounted on the metal wiring of the cooler via a metal bonding material,
9. The method of manufacturing a semiconductor module according to claim 8, wherein the semiconductor device and the cooler are joined by heating in an inert atmosphere or a reducing atmosphere to melt the joining material and then cooling.

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