JPH07226422A - Package of electronic component - Google Patents

Package of electronic component

Info

Publication number
JPH07226422A
JPH07226422A JP3914094A JP3914094A JPH07226422A JP H07226422 A JPH07226422 A JP H07226422A JP 3914094 A JP3914094 A JP 3914094A JP 3914094 A JP3914094 A JP 3914094A JP H07226422 A JPH07226422 A JP H07226422A
Authority
JP
Japan
Prior art keywords
package
electronic component
substrate
spacer
component package
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP3914094A
Other languages
Japanese (ja)
Inventor
Soichi Imamura
宗一 今村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sumitomo Electric Industries Ltd
Original Assignee
Sumitomo Electric Industries Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sumitomo Electric Industries Ltd filed Critical Sumitomo Electric Industries Ltd
Priority to JP3914094A priority Critical patent/JPH07226422A/en
Publication of JPH07226422A publication Critical patent/JPH07226422A/en
Withdrawn legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/1012Auxiliary members for bump connectors, e.g. spacers
    • H01L2224/10152Auxiliary members for bump connectors, e.g. spacers being formed on an item to be connected not being a semiconductor or solid-state body
    • H01L2224/10165Alignment aids
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/8112Aligning
    • H01L2224/81136Aligning involving guiding structures, e.g. spacers or supporting members
    • H01L2224/81138Aligning involving guiding structures, e.g. spacers or supporting members the guiding structures being at least partially left in the finished device
    • H01L2224/81141Guiding structures both on and outside the body
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/303Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components

Abstract

PURPOSE:To provide a package for an electronic device, which can be positioned laterally with a proper distance to a circuit board by spacers even while bumps are melted in mounting operation. CONSTITUTION:An electronic device in a package 2 is mounted on a circuit board 1. The package and the circuit board are separated by spacers 22, and the device is connected to the board through bumps that melt at a predetermined temperature.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】本発明は電子部品パッケージに関
する。より詳細には、本発明は、ボールグリッドアレイ
型等のバンプを介して基板上に実装される電子部品パッ
ケージの新規な構成に関する。
FIELD OF THE INVENTION The present invention relates to electronic component packages. More specifically, the present invention relates to a novel structure of an electronic component package mounted on a substrate via a ball grid array type bump or the like.

【0002】[0002]

【従来の技術】はんだ等により形成され、所定の温度で
溶融するバンプを備えた電子部品パッケージがある。こ
の種のパッケージは、加熱してバンプが軟化あるいは溶
融した状態で基板上に載置され、基板上の金属電極にバ
ンプを固着させることにより実装される。従って、固着
後のバンプは、パッケージと基板との電気的な接続と同
時に、パッケージの物理的な支持も担っている。
2. Description of the Related Art There is an electronic component package having bumps formed of solder or the like and melting at a predetermined temperature. This type of package is mounted on a substrate in a state where the bump is softened or melted by heating and the bump is fixed to a metal electrode on the substrate. Therefore, the bumps after being fixed not only electrically connect the package and the substrate, but also physically support the package.

【0003】図4は、このような種類の電子部品パッケ
ージにおける実装時のバンプの状態を示す図である。
FIG. 4 is a diagram showing a state of bumps when mounting in an electronic component package of this kind.

【0004】同図に示すように、基板1上には溶融時の
バンプ21に対して濡れ性のよい電極11が形成されてお
り、実装時に一旦溶融したバンプは、パッケージ2の下
面と電極11との両方に固着される。
As shown in the figure, an electrode 11 having good wettability is formed on the substrate 21 when the bump 21 is melted. The bump once melted at the time of mounting is the lower surface of the package 2 and the electrode 11. And fixed to both.

【0005】[0005]

【発明が解決しようとする課題】ところで、この種のパ
ッケージの実装において、図5(a) に示すように、パッ
ケージの位置ずれが生じることがある。しかし、内部の
バンプを目視することはできないので、一旦実装したパ
ッケージの位置ずれを検査することはできない。従っ
て、生じているずれの程度を計ることが難しく、出荷で
きる製品の歩留りは真の歩留りよりも低くなる。尚、一
旦実装したパッケージは、後で修正することは非常に困
難である。
By the way, in the mounting of this type of package, the package may be displaced as shown in FIG. 5 (a). However, since it is not possible to visually check the internal bumps, it is not possible to inspect the displacement of the package once mounted. Therefore, it is difficult to measure the degree of deviation that has occurred, and the yield of products that can be shipped is lower than the true yield. Incidentally, it is very difficult to modify the package once mounted later.

【0006】更に、固着後のバンプはパッケージを充分
に固定できる強度を有しているが、実装時に溶融してい
るバンプは物理的な支持力は全くない。このため、前述
のような水平方向のずれが生じたり、図5(b) に示すよ
うなパッケージの傾斜が生じる。パッケージが傾斜した
場合、パッケージの低いところではバンプが側方にはみ
出すので短絡などを生じる可能性が高くなる。また、傾
斜して実装されたパッケージでは、電極周辺の基板ある
いはバンプそのものに応力集中を生じるので、クラック
や断線の原因になる場合もある。
Further, although the bumps after fixing have a strength enough to fix the package, the bumps which are melted at the time of mounting have no physical supporting force. As a result, the horizontal displacement as described above occurs and the package tilts as shown in FIG. 5B. When the package is tilted, the bumps protrude to the side at a low portion of the package, and thus a short circuit or the like is likely to occur. Further, in a package mounted in a tilted manner, stress concentration occurs on the substrate around the electrodes or on the bump itself, which may cause cracks or disconnection.

【0007】そこで、本発明は、上記従来技術の問題を
解決し、バンプを使用して実装する電子部品パッケージ
であって、良好な実装が容易な新規な電子部品パッケー
ジを提供することをその目的としている。
[0007] Therefore, an object of the present invention is to solve the above-mentioned problems of the prior art and to provide a novel electronic component package which is mounted by using bumps and which is easy to satisfactorily mount. I am trying.

【0008】[0008]

【課題を解決するための手段】本発明に従うと、所定の
温度で溶融するバンプを介して基板上に実装される電子
部品パッケージにおいて、該パッケージの下面に、該パ
ッケージと該基板との間隔に対応した高さを有する突起
状のスペーサが装着されていることを特徴とする電子部
品パッケージが提供される。
According to the present invention, in an electronic component package mounted on a substrate through a bump that melts at a predetermined temperature, a package is provided on a lower surface of the package with a space between the package and the substrate. There is provided an electronic component package having a protrusion-shaped spacer having a corresponding height attached thereto.

【0009】[0009]

【作用】本発明に係る電子部品パッケージは、パッケー
ジの下面と基板との間隔を規定するスペーサを具備して
いる点にその主要な特徴がある。
The electronic component package according to the present invention is characterized mainly in that the electronic component package is provided with the spacer that defines the distance between the lower surface of the package and the substrate.

【0010】即ち、本発明に係る電子部品パッケージ
は、その下面と基板との適正な間隔と同じ高さを有する
突起状のスペーサを自身の下面に備えている。従って、
実装時にバンプが溶融した状態でも、パッケージはスペ
ーサを介して基板に支持され、パッケージが傾斜するこ
とがない。
That is, the electronic component package according to the present invention is provided on its lower surface with a protruding spacer having the same height as the proper distance between the lower surface and the substrate. Therefore,
Even when the bumps are melted during mounting, the package is supported by the substrate through the spacer, and the package does not tilt.

【0011】更に、本発明の好ましい態様に従うと、基
板上のパッケージの実装位置に穴あるいは段差を設け、
スペーサの先端と当接あるいは嵌合させることにより、
水平方向の位置決めも完全になる。
Further, according to a preferred embodiment of the present invention, a hole or a step is provided at a mounting position of the package on the substrate,
By abutting or fitting with the tip of the spacer,
Horizontal positioning is also perfect.

【0012】即ち、例えば基板上の所定の位置に穴を形
成する一方、スペーサの先端に径の小さな小突起を設
け、この小突起を基板の穴に挿通することにより、パッ
ケージは水平方向に位置決めされる。更に、小突起とス
ペーサ本体との段差が、穴の周囲で基板に当接するの
で、基板に対するパッケージの高さも規定され、バンプ
が溶融状態のときでも、パッケージはずれも傾斜も生じ
ない。
That is, for example, a hole is formed at a predetermined position on the substrate, and a small protrusion having a small diameter is provided at the tip of the spacer, and the small protrusion is inserted into the hole of the substrate to position the package horizontally. To be done. Further, since the step between the small protrusion and the spacer body abuts on the substrate around the hole, the height of the package with respect to the substrate is regulated, and even when the bump is in a molten state, the package is neither displaced nor tilted.

【0013】また、基板表面に段差を形成し、スペーサ
下端近傍の側面をこの段差に当接させることにより、上
記の場合と同様の機能を実現することもできる。
Further, by forming a step on the surface of the substrate and bringing the side surface near the lower end of the spacer into contact with this step, the same function as in the above case can be realized.

【0014】以下、図面を参照して本発明をより具体的
に説明するが、以下の開示は本発明の一実施例に過ぎ
ず、本発明の技術的範囲を何ら限定するものではない。
Hereinafter, the present invention will be described more specifically with reference to the drawings, but the following disclosure is merely an example of the present invention and does not limit the technical scope of the present invention.

【0015】[0015]

【実施例】図1は、本発明に係る電子部品パッケージの
全体的な構成を示す図である。
1 is a diagram showing the overall structure of an electronic component package according to the present invention.

【0016】同図に示すように、この電子部品パッケー
ジ2はバンプグリッドアレイ型のパッケージで、その下
面にマトリックス状に配置されたバンプ21と、パッケー
ジ2の端部近傍に配置された複数のスペーサ22とを備え
ている。ここで、スペーサ22は3本以上あることが好ま
しい。
As shown in FIG. 1, the electronic component package 2 is a bump grid array type package, in which the bumps 21 are arranged in a matrix on the lower surface of the package and a plurality of spacers are arranged near the ends of the package 2. 22 and. Here, it is preferable that there are three or more spacers 22.

【0017】以上のように構成されたパッケージ2を基
板1に実装するとき、バンプ21が溶融した状態でも、ス
ペーサ22が基板の表面に当接するので、パッケージ2と
基板1との間隔はスペーサ22の高さによって規定され
る。
When the package 2 constructed as described above is mounted on the substrate 1, the spacers 22 contact the surface of the substrate even when the bumps 21 are melted. Therefore, the space between the package 2 and the substrate 1 is the spacer 22. Stipulated by the height of

【0018】図2は、本発明に係る電子部品パッケージ
の他の実施態様を、拡大して示すスペーサの形状により
示す図である。
FIG. 2 is a view showing another embodiment of the electronic component package according to the present invention in an enlarged shape of the spacer.

【0019】同図に示すように、このパッケージ2で
は、スペーサ23の側面に段差が形成されており、所定の
径のスペーサ23aの下端に径の小さな小突起23bが装着
された形状となっている。また、このパッケージを実装
する基板1には、小突起23bの径と実質的に同じ内径の
穴13が形成されている。
As shown in the figure, in this package 2, a step is formed on the side surface of the spacer 23, and a small projection 23b having a small diameter is attached to the lower end of the spacer 23a having a predetermined diameter. There is. In addition, a hole 13 having an inner diameter substantially the same as the diameter of the small protrusion 23b is formed in the substrate 1 on which this package is mounted.

【0020】以上のように構成されたパッケージを実装
する場合、小突起23bの先端を穴13に挿通することによ
り、パッケージの水平方向の位置決めがなされる。ま
た、スペーサ23の段差が穴13の周囲で基板の表面に当接
するので、パッケージ2と基板1との間隔はスペーサ本
体23aの高さにより規定される。
When the package configured as described above is mounted, the package is positioned in the horizontal direction by inserting the tip of the small protrusion 23b into the hole 13. Further, since the step of the spacer 23 contacts the surface of the substrate around the hole 13, the distance between the package 2 and the substrate 1 is defined by the height of the spacer body 23a.

【0021】図3は、本発明に係る電子部品パッケージ
のさらに他の実施態様を示す図である。
FIG. 3 is a view showing still another embodiment of the electronic component package according to the present invention.

【0022】図3(a) に示すように、このパッケージ2
では、スペーサ22の形状は、図1に示したものと全く同
じである。一方、この態様では、基板の表面に段差13が
形成されており、スペーサ22の先端近傍では、スペーサ
22の側面が段差13に当接するように構成されている。ま
た、この段差13は、図3(b) に示すように、L字状の形
状を有しており、この段差13の入隅部にスペーサ22を当
接させることにより、パッケージの水平方向の位置決め
がなされる。
As shown in FIG. 3 (a), this package 2
Then, the shape of the spacer 22 is exactly the same as that shown in FIG. On the other hand, in this aspect, the step 13 is formed on the surface of the substrate, and the spacer 22 is formed near the tip of the spacer 22.
The side surface of 22 is configured to abut the step 13. As shown in FIG. 3 (b), the step 13 has an L-shape, and the spacer 22 is brought into contact with the corner of the step 13 so that the step of the horizontal direction of the package can be improved. Positioning is done.

【0023】[0023]

【発明の効果】以上説明したように本発明に係る電子部
品パッケージは、その下面にスペーサを備えているの
で、実装時にバンプが溶融した状態でも、基板との間隔
が適切に維持される。また、基板側にも対応した段差、
穴などを設けることにより、水平方向の位置決めをスペ
ーサによって行うことができるので、パッケージのずれ
や傾斜に起因する不良の発生はほぼ根絶される。
As described above, since the electronic component package according to the present invention is provided with the spacer on the lower surface thereof, the space between the electronic component package and the substrate can be properly maintained even when the bumps are melted during mounting. Also, a step corresponding to the substrate side,
By providing a hole or the like, the spacer can be positioned in the horizontal direction, so that the occurrence of defects due to the displacement or inclination of the package can be substantially eliminated.

【図面の簡単な説明】[Brief description of drawings]

【図1】本発明に係る電子部品パッケージの全体の構成
を示す図である。
FIG. 1 is a diagram showing an overall configuration of an electronic component package according to the present invention.

【図2】本発明に係る電子部品パッケージにおけるスペ
ーサの他の構成例を示す図である。
FIG. 2 is a diagram showing another configuration example of a spacer in the electronic component package according to the present invention.

【図3】本発明に係る電子部品パッケージにおけるスペ
ーサの更に他の構成例を示す図である。
FIG. 3 is a diagram showing still another configuration example of the spacer in the electronic component package according to the present invention.

【図4】パッケージの実装状態でのバンプの様子を拡大
して示す図である。
FIG. 4 is an enlarged view showing a state of bumps in a package mounted state.

【図5】実装時に生じるバンプの変形を示す図である。FIG. 5 is a diagram showing deformation of bumps that occur during mounting.

【符号の説明】[Explanation of symbols]

1・・・電子部品パッケージ、 2・・・基板、11・・
・電極、 12・・・穴、13・・・段差、
21・・・バンプ、22、23・・・スペー
1 ... Electronic component package, 2 ... Substrate, 11 ...
・ Electrodes, 12 ... holes, 13 ... steps,
21 ... Bumps, 22, 23 ... Spacers

Claims (3)

【特許請求の範囲】[Claims] 【請求項1】所定の温度で溶融するバンプを介して基板
上に実装される電子部品パッケージにおいて、該パッケ
ージの下面に、該パッケージと該基板との間隔に対応し
た高さを有する突起状のスペーサが装着されていること
を特徴とする電子部品パッケージ。
1. An electronic component package mounted on a substrate via a bump that melts at a predetermined temperature, wherein a protrusion-like shape having a height corresponding to a distance between the package and the substrate is provided on a lower surface of the package. An electronic component package having a spacer attached.
【請求項2】請求項1に記載された電子部品パッケージ
において、前記スペーサの先端に、該スペーサよりも径
の小さな小突起が形成されており、該小突起が前記基板
上に形成された穴に挿通され、該スペーサと該小突起と
の間の段差が該基板の表面に当接するように構成されて
いることを特徴とする電子部品パッケージ。
2. The electronic component package according to claim 1, wherein a small protrusion having a diameter smaller than that of the spacer is formed at a tip of the spacer, and the small protrusion is a hole formed on the substrate. An electronic component package, wherein the electronic component package is inserted into the substrate, and the step between the spacer and the small protrusion is in contact with the surface of the substrate.
【請求項3】請求項1に記載された電子部品パッケージ
において、前記スペーサの先端近傍が、前記基板上の実
装位置に形成された段差に対して側面で当接するように
構成されていることを特徴とする電子部品パッケージ。
3. The electronic component package according to claim 1, wherein the vicinity of the tip of the spacer is configured to come into contact with a step formed at a mounting position on the substrate at a side surface. Characteristic electronic component package.
JP3914094A 1994-02-14 1994-02-14 Package of electronic component Withdrawn JPH07226422A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3914094A JPH07226422A (en) 1994-02-14 1994-02-14 Package of electronic component

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3914094A JPH07226422A (en) 1994-02-14 1994-02-14 Package of electronic component

Publications (1)

Publication Number Publication Date
JPH07226422A true JPH07226422A (en) 1995-08-22

Family

ID=12544810

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3914094A Withdrawn JPH07226422A (en) 1994-02-14 1994-02-14 Package of electronic component

Country Status (1)

Country Link
JP (1) JPH07226422A (en)

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US7215020B2 (en) 2003-10-29 2007-05-08 Denso Corporation Semiconductor device having metal plates and semiconductor chip
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JP2011009410A (en) * 2009-06-25 2011-01-13 Mitsubishi Electric Corp Semiconductor module
JP2011134949A (en) * 2009-12-25 2011-07-07 Mitsubishi Electric Corp Semiconductor device
JP2011146625A (en) * 2010-01-18 2011-07-28 Mitsubishi Electric Corp High-frequency circuit board device
JP2011181787A (en) * 2010-03-03 2011-09-15 Hitachi Automotive Systems Ltd Power semiconductor device
JP2013140870A (en) * 2012-01-05 2013-07-18 Mitsubishi Electric Corp Power semiconductor device
JP2013171891A (en) * 2012-02-17 2013-09-02 Toshiba Corp Semiconductor device, semiconductor module, and semiconductor module manufacturing method
JP2013232654A (en) * 2013-06-05 2013-11-14 Denso Corp Electronic control device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7215020B2 (en) 2003-10-29 2007-05-08 Denso Corporation Semiconductor device having metal plates and semiconductor chip
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