JP2011211018A - Semiconductor module - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain efficient cooling performance in a semiconductor module.SOLUTION: A thickness of a portion at a side bonded to a copper block 9a of an upper arm in a heat sink 10b is made larger than that of a heat sink 10a, and a thickness of a heat sink 10c is made larger than that of a portion at a side bonded to a semiconductor chip 8b of a lower arm in the heat sink 10b. Thus, thermal diffusion in heat dissipation from a semiconductor chip 8a and the semiconductor chip 8b and thermal diffusion in heat dissipation from the copper block 9a and a copper block 9b are made nearly the same size within one plane exposed from an encapsulating resin unit 12 of the heat sinks 10a to 10c. Then, the area of the thermal diffusion corresponds to the area of a portion contributing to the heat dissipation, thus optimizing the area of the portion contributing to the heat dissipation by setting the size of the thermal diffusion in each unit to be the same, and hence obtaining efficient cooling performance.

Description

  The present invention relates to a semiconductor module in which a semiconductor chip on which a semiconductor power element is radiated by a heat radiating plate and a heat radiating plate are resin-sealed to form an integrated structure, for example, an upper arm (high side element) And a 2-in-1 structure in which two semiconductor power elements of the lower arm (low-side element) are sealed in one resin-sealed part, or a 1-in-1 structure semiconductor module in which one semiconductor power element is sealed in a resin-sealed part It is preferable to apply.

  Conventionally, Patent Document 1 discloses a semiconductor module having a 2-in-1 structure in which an upper arm and a lower arm each provided with a semiconductor power element are connected in series. This semiconductor module includes an IGBT (insulated gate type field effect transistor) as a semiconductor power element, and each of the upper arm and the lower arm has a heat sink via a copper block on the emitter side of the semiconductor chip on which the IGBT is formed. And a radiator plate on the collector side, and each radiator plate is resin-sealed in a state of being exposed from the sealing resin portion.

Japanese Patent No. 4192396

  In the semiconductor module described above, the emitter side of the semiconductor chip is electrically connected to the heat sink through a copper block that is one size smaller than the semiconductor chip. This is because a surface of the semiconductor chip on the emitter side has a bonding region with a pad for connection to the gate electrode, an outer peripheral region provided with a withstand voltage structure such as a guard ring, and the like. The copper block is connected only to an active region of the semiconductor chip that is different from the bonding region and the outer peripheral region, that is, a portion (a region where the emitter electrode is formed) provided in the central portion of the semiconductor chip. For this reason, the copper block is configured with a size slightly smaller than that of the semiconductor chip.

  Here, as shown in the sectional view shown in FIG. 10, the heat generated in the IGBT is transmitted from the semiconductor chip J1 to the heat radiating plate J3 via the narrow copper block J2 on the emitter side, and on the collector side. The heat is transmitted directly from the wide semiconductor chip J1 to the heat radiating plate J4. At this time, since the sizes of the heating elements connected to the heat radiation plates J3 and J4, that is, the copper block J2 and the semiconductor chip J1, are different, the thermal diffusion is different between the emitter side and the collector side.

  However, conventionally, the thicknesses of the radiator side and the collector side radiator plates are the same regardless of thermal diffusion. For example, as described in Patent Document 1, in the case of a structure in which the front and back surfaces of a semiconductor chip are turned upside down with an upper arm and a lower arm, the emitter side of one semiconductor chip faces the front side, and the other semiconductor chip has a collector side Arranged with the back side facing. In this case, since the emitter of the upper arm and the collector of the lower arm are electrically connected, the heat sink to which they are connected is a single structure, but the collector of the upper arm and the lower arm Each of the heat sinks to which the emitters are connected is provided. In such a structure, each heat sink has the same thickness. For this reason, compared with the heat diffusion in the heat sink to which the upper arm collector is bonded, the heat diffusion in the heat sink to which the upper arm copper block is bonded becomes narrower or the lower arm collector is bonded. Compared with the heat diffusion in the heat sink, the heat diffusion in the heat sink to which the copper block of the lower arm is joined may be narrowed.

  Further, in the case of a 2-in-1 structure in which the direction of the semiconductor chip is the same between the upper arm and the lower arm, one heat dissipation plate to which the emitter and the collector of the semiconductor chip of the upper arm are respectively connected is provided. One heat sink to which the emitter and collector of the semiconductor chip are connected is also provided. Since the thickness of each of these heat sinks is the same, heat diffusion at the heat sink to which the upper arm copper block is bonded is also compared to heat diffusion at the heat sink to which the upper arm collector is bonded. In some cases, the thermal diffusion at the heat radiating plate to which the lower arm copper block is bonded becomes narrower as compared with the heat diffusion at the heat radiating plate to which the lower arm collector is bonded. Furthermore, the same thing occurs for a 1 in 1 structure semiconductor module in which only one semiconductor power element is resin-sealed with a heat sink because the thickness of the heat sink to which the emitter and collector are connected is the same. It was.

  Therefore, there is a possibility that a difference in thermal diffusion occurs between the front and back surfaces of the semiconductor chip and the cooling performance may be impaired. Therefore, it is desired to obtain a more efficient cooling performance.

  In view of the above, an object of the present invention is to provide an efficient cooling performance in a semiconductor module in which a heat sink is provided on the front and back surfaces of a semiconductor chip on which a semiconductor power element is formed.

  In order to achieve the above object, the invention according to claim 1 is a semiconductor module in which the surfaces of the first and second semiconductor chips (8a, 8b) are arranged facing opposite sides, and the first heat radiating plate. Compared to (10a), the thickness of the portion of the second heat radiating plate (10b) on the side joined to the first metal block (9a) is increased, and the second semiconductor of the second heat radiating plate (10b). The third heat radiating plate (10c) is thicker than the portion to be joined to the chip (8b).

  As described above, the thickness of the portion of the second heat radiating plate (10b) on the side joined to the first metal block (9a) becomes thicker than the first heat radiating plate (10a), and the second heat radiating plate (10b). Among them, the third heat radiating plate (10c) is made thicker than the thickness of the portion to be joined to the second semiconductor chip (8b). For this reason, in the 1st-3rd heat sink (10a-10c) one surface exposed from the sealing resin part (12), at the time of the heat radiation from the 1st, 2nd semiconductor chip (8a, 8b). Thermal diffusion and thermal diffusion during heat radiation from the first and second metal blocks (9a, 9b) can be made substantially the same. Since heat diffusion corresponds to the area contributing to heat dissipation, it is possible to optimize the area of the portion contributing to heat dissipation by making the heat diffusion in each part the same size. For this reason, efficient cooling performance is obtained.

  For example, as described in claim 2, portions of the first heat radiating plate (10a) and the second heat radiating plate (10b) joined to the second semiconductor chip (8b) have the same thickness, and the second heat radiating plate The part joined to the first metal block (9a) in (10b) and the third heat radiating plate (10c) have the same thickness.

  The invention according to claim 3 is a semiconductor module in which the surfaces of the first and second semiconductor chips (8a, 8b) are arranged in the same direction, and the first heat radiating plate (10d) is the second heat radiating plate. The third heat radiating plate (10f) is thicker than the plate (10e), and the third heat radiating plate (10f) is thicker than the fourth heat radiating plate (10g).

  With such a configuration, the first and second semiconductor chips (8a, 8b) are within one surface exposed from the sealing resin portion (12) of the first to fourth heat radiation plates (10d to 10g). The heat diffusion during heat dissipation and the heat diffusion during heat dissipation from the first and second blocks (9a, 9b) can be made substantially the same. Since heat diffusion corresponds to the area contributing to heat dissipation, it is possible to optimize the area of the portion contributing to heat dissipation by making the heat diffusion in each part the same size. For this reason, efficient cooling performance is obtained.

  For example, as described in claim 4, the first radiator plate (10d) and the third radiator plate (10f) have the same thickness, and the second radiator plate (10e) and the fourth radiator plate (10g) have the same thickness. It can be a thickness.

  The invention according to claim 5 is a semiconductor module provided with only one semiconductor chip (8) on which a vertical semiconductor power element (6) is formed, and the first heat radiating plate (10h) is better. It is characterized by being thicker than the second heat radiating plate (10i).

  With such a configuration, thermal diffusion at the time of heat radiation from the semiconductor chip (8) within one surface of the first and second heat radiation plates (10h, 10i) exposed from the sealing resin portion (12). And the thermal diffusion at the time of heat dissipation from the metal block (9) can be made into the substantially same size. Since heat diffusion corresponds to the area contributing to heat dissipation, it is possible to optimize the area of the portion contributing to heat dissipation by making the heat diffusion in each part the same size. For this reason, efficient cooling performance is obtained.

  In addition, the code | symbol in the bracket | parenthesis of each said means shows the correspondence with the specific means as described in embodiment mentioned later.

1 is a circuit diagram of an inverter 1 according to a first embodiment of the present invention. 1 is a perspective view of an inverter 1 according to a first embodiment. It is sectional drawing of the inverter 1 shown in FIG. 2 is a cross-sectional view of a semiconductor module 4. FIG. It is a front view of the semiconductor module 4 shown in FIG. It is an exploded view of the semiconductor module 4 shown in FIG. 2 is a front view of a semiconductor chip 8. FIG. It is sectional drawing of the semiconductor module 4 concerning 2nd Embodiment of this invention. It is sectional drawing of the semiconductor module 4 concerning 3rd Embodiment of this invention. It is sectional drawing which showed the heat dissipation structure in the conventional semiconductor module.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following embodiments, the same or equivalent parts are denoted by the same reference numerals in the drawings.

(First embodiment)
A first embodiment of the present invention will be described. In this embodiment, an inverter having a cooling mechanism will be described as an example of a semiconductor device provided with a semiconductor module according to an embodiment of the present invention.

  FIG. 1 is a circuit diagram of the inverter 1, FIG. 2 is a perspective view of the inverter 1, and FIG. 3 is a cross-sectional view of the inverter 1. FIG. 3 corresponds to a cross section when the inverter 1 is cut in a plane perpendicular to the vertical direction of the drawing in FIG.

  As shown in FIG. 1, the inverter 1 is for AC driving a three-phase motor 3 that is a load based on a DC power source 2, and has a configuration in which upper and lower arms connected in series are connected in parallel for three phases. An intermediate potential between the upper arm and the lower arm is applied to the U-phase, V-phase, and W-phase of the three-phase motor 3 while being sequentially switched. One phase of the upper arm and the lower arm in the inverter 1 is made into one semiconductor module 4, and the three semiconductor modules 4 are arranged in the cooling mechanism 5 as shown in FIGS. 1 is configured.

  As shown in FIG. 1, each upper arm and each lower arm is constituted by an IGBT 6 that is a semiconductor power element and a free wheel diode (hereinafter referred to as FWD) 7. In this embodiment, the IGBT 6 and the FWD 7 are formed in the same semiconductor chip 8 (see FIG. 3), and the anode and the cathode of the FWD 7 are electrically connected to the emitter and the collector of the IGBT 6. And the positive terminal P, the negative terminal N, and the output terminal O of the upper arm of each semiconductor module 4 are extended so that it may protrude outside from the semiconductor module 4, as shown in FIG. The positive and negative terminals of the DC power source 2 and the three-phase motor 3 are connected to the positive terminal P, the negative terminal N, and the output terminal O, respectively, so that the circuit configuration shown in FIG.

  As shown in FIGS. 2 and 3, each semiconductor module 4 has a plate shape, and the front and back surfaces are sandwiched and fixed in the cooling mechanism 5. The cooling mechanism 5 is formed of a metal such as aluminum having a high thermal conductivity, and includes a plurality of plates 5a, fins 5b, a refrigerant introduction port 5c, a refrigerant discharge port 5d, and the like as shown in FIG. The plurality of plates 5a and the fins 5b are joined by brazing or welding in a state where the two plates 5a and the one fin 5b are paired and the one plate 5a is sandwiched by the two plates 5a. Thus, a refrigerant passage 5e is formed through which a refrigerant such as cooling water flows. The fins 5b have a waved shape in the direction perpendicular to the paper surface of FIG. 3, and the crests and valleys of the waved fins 5b come into contact with the two plates 5a sandwiching the fins 5b, so that the horizontal direction of the paper surface A plurality of refrigerant passages 5e are formed.

  A communication hole is formed in a portion of each plate 5a and fin 5b that intersects with the refrigerant introduction port 5c and the refrigerant discharge port 5d, and each refrigerant passage 5e formed by each plate 5a and the fin 5b serves as a refrigerant introduction port 5c. And the refrigerant discharge port 5d. For this reason, the refrigerant introduced from the refrigerant introduction port 5c is discharged through the refrigerant discharge port 5d after passing through each refrigerant passage 5e as shown by the arrow in FIG.

  In the cooling mechanism 5 configured as described above, a gap is provided between each set of the two plates 5a and the single fin 5b, and each semiconductor module 4 is sandwiched between the gaps to insulate. It is fixed via a member or the like. Thereby, the inverter 1 provided with the three semiconductor modules 4, ie, three phases, is comprised.

  Next, the detailed structure of the semiconductor module 4 provided in the inverter 1 configured as described above will be described. 4 to 6 are views showing the semiconductor module 4. FIG. 4 is a sectional view, FIG. 5 is a front view, and FIG. 6 is an exploded view. 4 corresponds to the A-A ′ cross-sectional view of FIG. 5.

  As shown in FIGS. 4 to 6, the semiconductor module 4 includes a semiconductor chip 8, a copper block 9, a heat sink 10, a gate terminal 11, and the like, and these include a sealing resin portion 12 as shown in FIG. 4. It is set as the integrated structure by resin-sealing.

  Two semiconductor chips 8 are provided, one of which is an upper arm semiconductor chip 8a and the other is a lower arm semiconductor chip 8b, both of which have the same structure in which an IGBT 6 and an FWD 7 are formed. The IGBTs 6 and FWDs 7 formed on the semiconductor chips 8a and 8b are configured as vertical elements that allow current to flow in the direction perpendicular to the substrate.

  FIG. 7 is a front view of the semiconductor chip 8. On the surface side of the semiconductor chip 8, a pad 8c electrically connected to the emitter of the IGBT 6 and the anode of the FWD 7 and a pad 8d connected to the gate of the IGBT 6 are formed. The central region of the semiconductor chip 8 on which the pad 8c is formed is an active region where a large current when the IGBT 6 is turned on or a reflux current flows through the FWD 7, and the periphery thereof is provided with a withstand voltage structure such as a guard ring. The pad 8d that is the outer peripheral region and is connected to the gate is drawn out and arranged on the outer peripheral region side. On the other hand, although not shown, a pad electrically connected to the collector of the IGBT 6 and the cathode of the FWD is formed on the entire back surface of the semiconductor chip 8.

  For example, as shown in FIG. 7, the semiconductor chip 8 has a size of 12.8 mm × 12.8 mm and an active area of 10.7 mm × 11.4 mm. The width of the side where the pad 8d is arranged in the outer peripheral area surrounding the active area with four sides is 1.4 mm, and the width of the side where no other pad 8d is arranged is 0.7 mm. Has been.

  The copper block 9 corresponds to a metal block, and two copper blocks 9 are provided. One copper block 9a is connected to the emitter of the IGBT 6 and the anode of the FWD 7 in the semiconductor chip 8a of the upper arm, and the other copper block 9b is connected to the bottom. The semiconductor chip 8b of the arm is connected to the emitter of the IGBT 6 and the anode of the FWD 7. The copper block 9 has the same area as the active region of the semiconductor chip 8, that is, the same size as the pad 8c, and is connected to the pad 8c via solder or the like (not shown). For this reason, the copper block 9 has a size slightly smaller than the semiconductor chip 8. Specifically, the surface of the copper block 9 facing the semiconductor chip 8 is 10.7 mm × 11.4 mm. The thickness of the copper block 9 is 1.7 mm.

  The heat radiating plate 10 is made of a metal having a high thermal conductivity, for example, copper. The heat radiating plate 10 has a role of transferring heat generated by the semiconductor chip 8 and a current path of the IGBT 6 and the FWD 7 formed on the semiconductor chip 8. Play a role. In the case of the present embodiment, as the heat radiating plate 10, three heat radiating plates 10a to 10c are provided. The heat sink 10a is connected to the collector of the IGBT 6 and the cathode of the FWD 7 in the upper-arm semiconductor chip 8a via solder or the like. The heat radiating plate 10a is provided with a positive terminal P. The heat sink 10b is connected to the collector of the IGBT 6 and the cathode of the FWD 7 in the upper arm copper block 9a and the lower arm semiconductor chip 8b via solder or the like. The heat sink 10b is provided with an output terminal O. The heat sink 10c is connected to the copper block 9b of the lower arm via solder or the like. The heat sink 10c is provided with a negative terminal N.

  In this embodiment, the thickness of these heat sinks 10a to 10c is changed from the conventional one so that more efficient cooling performance can be obtained. The detailed structure of the heat sinks 10a to 10c will be described later.

  As shown in FIGS. 5 and 6, the gate terminal 11 includes an upper arm gate terminal 11a and a lower arm gate terminal 11b, each of which is composed of a plurality of terminals. The gate terminals 11a and 11b are electrically connected to the gates of the IGBTs 6 in the semiconductor chips 8a and 8b of the upper arm and the lower arm by being connected to the pads 8d by bonding wires (not shown).

  Each part comprised in this way is arrange | positioned in order on the heat sink 10b in which the gate terminals 11a and 11b are arrange | positioned, as FIG. 6 shows. That is, on the upper arm side, the copper block 9a, the semiconductor chip 8a, and the heat radiating plate 10a are sequentially stacked and joined on the heat radiating plate 10b, and on the lower arm side, the semiconductor chip 8b, the copper block 9b, and the heat radiating on the heat radiating plate 10b. The plates 10c are sequentially stacked and joined. In a state in which the respective parts are stacked in this manner, they are installed in a molding die (not shown) or the like and are resin-sealed by the sealing resin part 12. And on the surface of the semiconductor module 4, the heat radiating plates 10 a and 10 c are exposed by making one surface of the sealing resin portion 12 and the heat radiating plates 10 a and 10 c flush with each other. And the heat sink 10b is exposed by making the heat sink 10b flush with each other. In addition, the positive terminal P, the negative terminal N, and the output terminal O are drawn from one side of the sealing resin portion 12, and the gate terminals 11a and 11b are drawn from the side opposite to the side. With this configuration, the semiconductor module 4 is configured. In the semiconductor module 4 configured in this way, as shown in FIGS. 3 and 4, the lower arm is arranged on the upstream side of the refrigerant flow in the cooling mechanism 5 and the upper arm is arranged on the downstream side. Thus, the cooling mechanism 5 is assembled.

  In the semiconductor module 4 configured as described above, the positive terminal P is connected to the positive electrode of the DC power supply 2, the output terminal O is connected to the three-phase motor 3, and the negative terminal N is connected to the negative electrode of the DC power supply 2. Then, based on the application of the gate voltage to the gate of the IGBT 6, the three-phase motor is repeatedly performed by sequentially turning on the IGBT 6 of the upper arm of one phase and turning off the IGBT 6 of the lower arm of the other phase. 3 is formed to supply an alternating current to the three-phase motor 3. Specifically, by turning on the IGBT 6 of the upper arm, a path for supplying current from the positive terminal P to the three-phase motor 3 through the heat sink 10a → semiconductor chip 8a → copper block 9a → heat sink 10b and output terminal O is configured. To do. Further, by turning on the IGBT 6 of the lower arm, a path for flowing current from the three-phase motor 3 from the output terminal O through the heat sink 10b → the semiconductor chip 8b → the copper block 9b → the heat sink 10b and the negative terminal N is configured. . When such an operation is performed, the semiconductor chips 8a and 8b in the semiconductor module 4 generate heat as a large current flows through the IGBT 6 and the FWD 7. However, since this heat is radiated through the heat radiating plates 10a to 10c and is cooled by the cooling mechanism 5, it is possible to suppress the excessive temperature rise of the semiconductor chips 8a and 8b.

  Next, a detailed structure such as the thickness of the heat dissipation plates 10a to 10c described above will be described. In the present embodiment, the heat radiating plate 10a is configured by a square plate, and the positive terminal P is formed so as to protrude from one side of the square plate. The heat radiating plate 10c is also composed of a square plate, and a negative electrode terminal N is formed so as to protrude from one side of the square plate. The centers of the semiconductor chip 8a and the copper block 9b are aligned and joined to the centers of the heat sink 10a and the heat sink 10c. Moreover, the heat sink 10b is made into the rectangular shape, and the output terminal O is formed so that it may protrude from the one side. The heat sink 10b is not less than the size of the heat sink 10a and the heat sink 10c combined.

  Although the heat sink 10a and the heat sink 10c have the same size in the width direction (the size in the horizontal direction in FIG. 4 and the size in the direction perpendicular to the paper), the thickness of the heat sink 10c is larger than that of the heat sink 10a. It is trying to become. Further, the heat radiating plate 10b is provided with a step, and the thickness of the portion of the heat radiating plate 10b on the side where the upper arm is bonded to the copper block 9a is the thickness of the portion on the side where the lower arm is bonded to the semiconductor chip 8b. It is made thicker than the thickness. The thickness of the heat sink 10a and the heat sink 10b on the side where the lower arm is bonded to the semiconductor chip 8b is equal to the thickness of the heat sink 10c and the heat sink 10b on the side where the upper arm copper block 9a is bonded. Are of equal thickness. That is, the thickness of the portion of the heat radiating plate 10b on the side joined to the copper block 9a of the upper arm is thicker than the heat radiating plate 10a, and the portion of the heat radiating plate 10b on the side joined to the semiconductor chip 8b of the lower arm. The heat radiating plate 10c is thicker than the thickness.

  For example, the thermal diffusion when heat conduction occurs can be considered to be 45 degrees as shown by the broken line in FIG. For this reason, it is considered that thermal diffusion occurs by spreading by a width equal to the thickness of the heat radiating plate 10a. In consideration of this, the thickness of the heat radiating plates 10a to 10c is set so that the heat diffusion is accommodated in one surface of the heat radiating plate 10a and the heat radiating plate 10c exposed from the sealing resin portion 12.

  That is, since there is a difference in size between the semiconductor chip 8a and the copper block 9b in the left-right direction in FIG. 4, assuming that the thicknesses of the heat sinks 10a to 10c are all the same, based on the difference, Will be different. For example, the heat diffusion in the heat dissipation plates 10a and 10b during heat dissipation from the semiconductor chips 8a and 8b is larger than the heat diffusion in the heat dissipation plates 10b and 10c during heat dissipation from the copper blocks 9a and 9b. However, since this heat diffusion becomes wider as the thickness of the heat sink 10 is increased, it is possible to increase the heat diffusion of the heat sinks 10b and 10c during heat dissipation from the copper blocks 9a and 9b according to the thickness. Become. For this reason, by setting it as the above size, in the one surface exposed from the sealing resin part 12 among the heat sinks 10a-10c, the thermal diffusion at the time of the heat radiation from the semiconductor chips 8a and 8b, and the copper block The thermal diffusion at the time of heat radiation from 9a and 9b can be made substantially the same size.

  Specifically, the thickness difference between the heat sink 10a and the heat sink 10b on the side where the upper arm copper block 9a is bonded and the heat sink 10b is bonded to the lower arm semiconductor chip 8b. It is preferable that the difference in thickness between the side portion and the heat radiating plate 10c is about ½ times the difference between the widths of the semiconductor chips 8a and 8b and the copper blocks 9a and 9b in the horizontal direction in FIG.

  As described above, the thickness of the portion of the heat radiating plate 10b on the side where the upper arm is bonded to the copper block 9a is thicker than the heat radiating plate 10a, and the heat radiating plate 10b is bonded to the lower arm semiconductor chip 8b. The heat radiating plate 10c is thicker than the thickness of the portion on the side. For this reason, in one surface exposed from the sealing resin part 12 among the heat sinks 10a to 10c, heat diffusion during heat dissipation from the semiconductor chips 8a and 8b and heat diffusion during heat dissipation from the copper blocks 9a and 9b. Can be almost the same size. And since the area of thermal diffusion corresponds to the area of the part contributing to heat dissipation, by optimizing the area of the part contributing to heat dissipation by making the thermal diffusion in each part the same size as in this embodiment. It becomes possible to plan. For this reason, it becomes possible to obtain efficient cooling performance.

  Moreover, since such a structure can be realized only by changing the thickness of the heat radiating plates 10a to 10c from the conventional one while keeping the use area of the heat radiating plates 10a to 10c the same as the conventional one, the use of the heat radiating plates 10a to 10c is used. Even without increasing the area, it is possible to obtain efficient cooling performance.

  In addition, although the usage area of heat sink 10a-10c may be made the same as the past, cooling performance is determined by the total area of the part which contributes to heat radiation in each of the front and back surfaces of semiconductor chips 8a and 8b. For this reason, if the total area of the portions contributing to heat dissipation in the front and back surfaces of the semiconductor chips 8a and 8b is larger than the conventional one, even if the use area of the heat sinks 10a to 10c is made smaller than the conventional one. The above effects can be obtained. On the contrary, even if it is wider than the conventional case, compared with the case where the heat radiating plates 10a to 10c have the same thickness, since the area of the part contributing to heat radiation can be optimized, the above effect can be obtained. .

(Second Embodiment)
A second embodiment of the present invention will be described. In the present embodiment, the structure of the semiconductor module 4 is changed with respect to the first embodiment, and the others are the same as those in the first embodiment, and therefore only different parts will be described.

  FIG. 8 is a cross-sectional view of the semiconductor module 4 of the present embodiment. As shown in this figure, the semiconductor module 4 of this embodiment also has a 2-in-1 structure, but the surface of the semiconductor chips 8a, 8b is directed in the same direction between the upper arm and the lower arm. .

  In the semiconductor module 4 of this embodiment, the emitter of the IGBT 6 of the upper-arm semiconductor chip 8a and the anode of the FWD 7 are connected to the heat sink 10d through the copper block 9a, and the collector of the IGBT 6 and the FWD 7 of the semiconductor chip 8a. The cathode is connected to the heat sink 10e. In addition, the emitter of the IGBT 6 and the anode of the FWD 7 of the lower-arm semiconductor chip 8b are connected to the heat sink 10f via the copper block 9b, and the collector of the IGBT 6 and the cathode of the FWD 7 of the semiconductor chip 8b are connected to the heat sink 10g. Has been. And the surface on the opposite side to the 1st, 2nd semiconductor chips 8a and 8b among each heat sink 10d-10g is exposed from the sealing resin part 12, and in the sealing resin part 12, the heat sink 10d and the heat sink 10 g is electrically connected via the connection wiring 13. The connection wiring 13 is connected to the heat radiating plate 10d and the heat radiating plate 10g by welding or soldering.

  In such a configuration, the heat sinks 10d and 10f connected to the copper blocks 9a and 9b are made thicker than the heat sinks 10e and 10g connected to the semiconductor chips 8a and 8b in both the upper and lower arms. ing. Specifically, the size and thickness of the heat sinks 10d and 10f are the same as those of the heat sink 10c described in the first embodiment, and the size and thickness of the heat sinks 10e and 10g are the same as those of the heat sink 10a described in the first embodiment. It is the same.

  With such a configuration, heat diffusion during heat radiation from the semiconductor chips 8a and 8b and heat radiation from the copper blocks 9a and 9b in one surface exposed from the sealing resin portion 12 of the heat radiation plates 10d to 10g. The thermal diffusion at the time can be made about the same size. And since thermal diffusion corresponds to the area contributing to heat dissipation, it is possible to optimize the area of the portion contributing to heat dissipation by making the thermal diffusion in each part the same as in this embodiment. . For this reason, efficient cooling performance is obtained.

(Third embodiment)
A third embodiment of the present invention will be described. In the present embodiment, the structure of the semiconductor module 4 is changed with respect to the first embodiment, and the others are the same as those in the first embodiment, and therefore only different parts will be described.

  FIG. 9 is a cross-sectional view of the semiconductor module 4 of the present embodiment. As shown in this figure, the semiconductor module 4 of the present embodiment has a 1 in 1 structure.

  In the semiconductor module 4 of this embodiment, the emitter of the IGBT 6 and the anode of the FWD 7 of the semiconductor chip 8 are connected to the heat sink 10h through the copper block 9, and the collector of the IGBT 6 and the cathode of the FWD 7 are connected to the heat sink 10i. Has been. And the surface on the opposite side to the semiconductor chip 8 among each heat sink 10h, 10i is exposed from the sealing resin part 12. FIG.

  In such a configuration, the thickness of the heat sink 10 h connected to the copper block 9 is made thicker than the thickness of the heat sink 10 i connected to the semiconductor chip 8. Specifically, the size and thickness of the heat sink 10h are the same as the heat sink 10c described in the first embodiment, and the size and thickness of the heat sink 10i are the same as the heat sink 10a described in the first embodiment. .

  With such a configuration, heat diffusion during heat dissipation from the semiconductor chip 8 and heat diffusion during heat dissipation from the copper block 9 within one surface exposed from the sealing resin portion 12 of the heat dissipation plates 10h and 10i. Can be almost the same size. And since thermal diffusion corresponds to the area of the part contributing to heat dissipation, it is possible to optimize the area contributing to heat dissipation by making the thermal diffusion in each part the same as in this embodiment. Become. For this reason, efficient cooling performance is obtained.

(Other embodiments)
In the above embodiment, the inverter 1 that drives the three-phase motor 3 has been described. However, the semiconductor device is not limited to the inverter 1, and any semiconductor device that includes at least the semiconductor module 4 can be used. Also, the semiconductor module 4 shown in the first to third embodiments can be applied. For example, the semiconductor module 4 shown in the first to third embodiments can be applied to a converter or the like.

  Moreover, although the said embodiment demonstrated what integrated IGBT6 and FWD7 in the semiconductor chip 8, this invention is applicable also to the structure by which these are each another chips | tips.

  Moreover, although IGBT was mentioned as an example as a semiconductor power element, this invention is applicable also to the case where another element, for example, power MOSFET etc., are used.

DESCRIPTION OF SYMBOLS 1 Inverter 2 DC power supply 3 Three-phase motor 4 Semiconductor module 5 Cooling mechanism 6 IGBT
7 FWD
8 Semiconductor chip 9 Copper block 10 Heat sink 11 Gate terminal 12 Sealing resin part

Claims (5)

A first semiconductor chip (8a) having an upper arm having a front surface and a back surface and forming a semiconductor power element (6); and a second semiconductor chip (8b) forming a lower arm;
The current of the semiconductor power element (6) of the first semiconductor chip (8a) is formed on the surface side of the first semiconductor chip (8a) and is smaller than the first semiconductor chip (8a). A first metal block (9a) joined to the active region through which the
A first heat radiating plate (10a) joined to the back surface of the first semiconductor chip (8a);
Second heat radiation bonded to the surface of the first metal block (9a) opposite to the surface bonded to the first semiconductor chip (8a) and bonded to the back surface of the second semiconductor chip (8b). A plate (10b);
A current of the semiconductor power element (6) of the second semiconductor chip (8b) formed on the surface side of the second semiconductor chip (8b) and having a smaller size than the second semiconductor chip (8b). A second metal block (9b) joined to the active region through which the
A third heat radiating plate (10c) bonded to a surface opposite to the surface bonded to the second semiconductor chip (8b) in the second metal block (9b);
Resin-sealing part for sealing the first and second semiconductor chips (8a, 8b), the first and second metal blocks (9a, 9b) and the first to third heat sinks (10a to 10c) 12)
Of the first to third heat radiating plates (10a to 10c), the surface opposite to the first and second semiconductor chips (8a, 8b) is exposed from the resin sealing portion (12),
Compared with the first heat radiating plate (10a), the thickness of the portion of the second heat radiating plate (10b) to be joined to the first metal block (9a) is increased.
The third heat radiating plate (10c) is thicker than the portion of the second heat radiating plate (10b) on the side bonded to the second semiconductor chip (8b). module. Of the first heat radiating plate (10a) and the second heat radiating plate (10b), the portion joined to the second semiconductor chip (8b) has the same thickness,
The portion of the second heat radiating plate (10b) joined to the first metal block (9a) and the third heat radiating plate (10c) have the same thickness. Semiconductor module. A first semiconductor chip (8a) having an upper arm having a front surface and a back surface and forming a semiconductor power element (6); and a second semiconductor chip (8b) forming a lower arm;
The current of the semiconductor power element (6) of the first semiconductor chip (8a) is formed on the surface side of the first semiconductor chip (8a) and is smaller than the first semiconductor chip (8a). A first metal block (9a) joined to the active region through which the
A first heat radiating plate (10d) joined to a surface opposite to the surface joined to the first semiconductor chip (8a) in the first metal block (9a);
A second heat radiating plate (10e) joined to the back surface of the first semiconductor chip (8a);
A current of the semiconductor power element (6) of the second semiconductor chip (8b) formed on the surface side of the second semiconductor chip (8b) and having a smaller size than the second semiconductor chip (8b). A second metal block (9b) joined to the active region through which the
A third heat radiating plate (10f) bonded to a surface opposite to the surface bonded to the second semiconductor chip (8b) in the second metal block (9b);
A fourth heat radiating plate (10g) bonded to the back surface of the second semiconductor chip (8b);
Resin sealing portion (sealing portion) for sealing the first and second semiconductor chips (8a, 8b), the first and second metal blocks (9a, 9b) and the first to fourth heat radiation plates (10d to 10g). 12)
The first heat radiating plate (10d) is thicker than the second heat radiating plate (10e), and the third heat radiating plate (10f) is thicker than the fourth heat radiating plate (10g). A featured semiconductor module.   The first radiator plate (10d) and the third radiator plate (10f) have the same thickness, and the second radiator plate (10e) and the fourth radiator plate (10g) have the same thickness. The semiconductor module according to claim 3. A semiconductor chip (8) having a front surface and a back surface, on which a semiconductor power element (6) is formed;
Formed on the surface side of the semiconductor chip (8), smaller in size than the semiconductor chip (8), and bonded to an active region in the semiconductor chip (8) through which the current of the semiconductor power element (6) flows. A metal block (9) to be made;
A first heat radiating plate (10h) bonded to a surface opposite to the surface bonded to the semiconductor chip (8) in the metal block (9);
A second heat radiating plate (10i) bonded to the back surface of the semiconductor chip (8);
A resin sealing portion (12) for sealing the semiconductor chip (8), the metal block (9), and the first and second heat radiating plates (10h, 10i);
The surface opposite to the semiconductor chip (8) of the first and second heat radiating plates (10h, 10i) is exposed from the resin sealing portion (12),
The semiconductor module according to claim 1, wherein the first heat radiation plate (10h) is thicker than the second heat radiation plate (10i).

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