JP2004289154A - 超浅型接合のための接合狭小化用相補インプラント - Google Patents

超浅型接合のための接合狭小化用相補インプラント Download PDF

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Publication number
JP2004289154A
JP2004289154A JP2004079351A JP2004079351A JP2004289154A JP 2004289154 A JP2004289154 A JP 2004289154A JP 2004079351 A JP2004079351 A JP 2004079351A JP 2004079351 A JP2004079351 A JP 2004079351A JP 2004289154 A JP2004289154 A JP 2004289154A
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JP
Japan
Prior art keywords
junction
dopant
semiconductor substrate
ultra
narrowing
Prior art date
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Abandoned
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JP2004079351A
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English (en)
Japanese (ja)
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JP2004289154A5 (enExample
Inventor
Amitabh Jain
ジャイン アミタバ
Stephanie W Butler
ダブリュー、バトラー ステファニー
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Texas Instruments Inc
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Texas Instruments Inc
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Publication date
Application filed by Texas Instruments Inc filed Critical Texas Instruments Inc
Publication of JP2004289154A publication Critical patent/JP2004289154A/ja
Publication of JP2004289154A5 publication Critical patent/JP2004289154A5/ja
Abandoned legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26506—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors
    • H01L21/26513—Bombardment with radiation with high-energy radiation producing ion implantation in group IV semiconductors of electrically active species
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26—Bombardment with radiation
    • H01L21/263—Bombardment with radiation with high-energy radiation
    • H01L21/265—Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/2658—Bombardment with radiation with high-energy radiation producing ion implantation of a molecular ion, e.g. decaborane
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0223—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate
    • H10D30/0227—Manufacture or treatment of FETs having insulated gates [IGFET] having source and drain regions or source and drain extensions self-aligned to sides of the gate having both lightly-doped source and drain extensions and source and drain regions self-aligned to the sides of the gate, e.g. lightly-doped drain [LDD] MOSFET or double-diffused drain [DDD] MOSFET
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • Computer Hardware Design (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Toxicology (AREA)
  • Health & Medical Sciences (AREA)
  • Spectroscopy & Molecular Physics (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2004079351A 2003-03-21 2004-03-19 超浅型接合のための接合狭小化用相補インプラント Abandoned JP2004289154A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/393,749 US6808997B2 (en) 2003-03-21 2003-03-21 Complementary junction-narrowing implants for ultra-shallow junctions

Publications (2)

Publication Number Publication Date
JP2004289154A true JP2004289154A (ja) 2004-10-14
JP2004289154A5 JP2004289154A5 (enExample) 2007-04-12

Family

ID=32824912

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004079351A Abandoned JP2004289154A (ja) 2003-03-21 2004-03-19 超浅型接合のための接合狭小化用相補インプラント

Country Status (4)

Country Link
US (2) US6808997B2 (enExample)
EP (1) EP1460680B1 (enExample)
JP (1) JP2004289154A (enExample)
DE (1) DE602004031065D1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010103687A1 (ja) * 2009-03-09 2010-09-16 株式会社 東芝 半導体装置およびその製造方法

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050260838A1 (en) * 2002-05-10 2005-11-24 Varian Semiconductor Equipment Associates, Inc. Methods and systems for dopant profiling
US6767809B2 (en) * 2002-11-19 2004-07-27 Silterra Malayisa Sdn. Bhd. Method of forming ultra shallow junctions
CN1253929C (zh) * 2003-03-04 2006-04-26 松下电器产业株式会社 半导体装置及其制造方法
US20060017079A1 (en) * 2004-07-21 2006-01-26 Srinivasan Chakravarthi N-type transistor with antimony-doped ultra shallow source and drain
US7482255B2 (en) * 2004-12-17 2009-01-27 Houda Graoui Method of ion implantation to reduce transient enhanced diffusion
CN101207020B (zh) * 2006-12-22 2010-09-29 中芯国际集成电路制造(上海)有限公司 形成超浅结的方法
US8664073B2 (en) 2007-03-28 2014-03-04 United Microelectronics Corp. Method for fabricating field-effect transistor
US7888223B2 (en) * 2007-03-28 2011-02-15 United Microelectronics Corp. Method for fabricating P-channel field-effect transistor (FET)
US20090065820A1 (en) * 2007-09-06 2009-03-12 Lu-Yang Kao Method and structure for simultaneously fabricating selective film and spacer
US8232605B2 (en) * 2008-12-17 2012-07-31 United Microelectronics Corp. Method for gate leakage reduction and Vt shift control and complementary metal-oxide-semiconductor device
US8178430B2 (en) * 2009-04-08 2012-05-15 International Business Machines Corporation N-type carrier enhancement in semiconductors
US8269275B2 (en) * 2009-10-21 2012-09-18 Broadcom Corporation Method for fabricating a MOS transistor with reduced channel length variation and related structure
US8564063B2 (en) 2010-12-07 2013-10-22 United Microelectronics Corp. Semiconductor device having metal gate and manufacturing method thereof
CN102637646B (zh) * 2011-02-10 2014-04-23 上海宏力半导体制造有限公司 存储器制备方法
US8772118B2 (en) 2011-07-08 2014-07-08 Texas Instruments Incorporated Offset screen for shallow source/drain extension implants, and processes and integrated circuits
US9455321B1 (en) 2015-05-06 2016-09-27 United Microelectronics Corp. Method for fabricating semiconductor device

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH1079506A (ja) * 1996-02-07 1998-03-24 Matsushita Electric Ind Co Ltd 半導体装置およびその製造方法
KR0183645B1 (ko) 1996-03-26 1999-03-20 이대원 다층 구조의 도금층을 구비한 반도체 리드 프레임
WO1997042652A1 (en) 1996-05-08 1997-11-13 Advanced Micro Devices, Inc. Control of junction depth and channel length using generated interstitial gradients to oppose dopant diffusion
US5793090A (en) 1997-01-10 1998-08-11 Advanced Micro Devices, Inc. Integrated circuit having multiple LDD and/or source/drain implant steps to enhance circuit performance
US6069062A (en) 1997-09-16 2000-05-30 Varian Semiconductor Equipment Associates, Inc. Methods for forming shallow junctions in semiconductor wafers
US6037640A (en) * 1997-11-12 2000-03-14 International Business Machines Corporation Ultra-shallow semiconductor junction formation
US6087247A (en) 1998-01-29 2000-07-11 Varian Semiconductor Equipment Associates, Inc. Method for forming shallow junctions in semiconductor wafers using controlled, low level oxygen ambients during annealing
US6355543B1 (en) 1998-09-29 2002-03-12 Advanced Micro Devices, Inc. Laser annealing for forming shallow source/drain extension for MOS transistor
US6180476B1 (en) 1998-11-06 2001-01-30 Advanced Micro Devices, Inc. Dual amorphization implant process for ultra-shallow drain and source extensions
KR100318459B1 (ko) 1998-12-22 2002-02-19 박종섭 티타늄폴리사이드게이트전극형성방법
AU781979B2 (en) * 2000-01-26 2005-06-23 Carl Zeiss Vision Australia Holdings Ltd Anti-static, anti-reflection coating
US6265255B1 (en) 2000-03-17 2001-07-24 United Microelectronics Corp. Ultra-shallow junction formation for deep sub-micron complementary metal-oxide-semiconductor
US6358823B1 (en) 2000-04-12 2002-03-19 Institut Fuer Halbleiterphysik Frankfurt (Oder) Gmbh. Method of fabricating ion implanted doping layers in semiconductor materials and integrated circuits made therefrom
JP2002076332A (ja) * 2000-08-24 2002-03-15 Hitachi Ltd 絶縁ゲート型電界効果トランジスタ及びその製造方法
US6534373B1 (en) * 2001-03-26 2003-03-18 Advanced Micro Devices, Inc. MOS transistor with reduced floating body effect
US6458643B1 (en) * 2001-07-03 2002-10-01 Macronix International Co. Ltd. Method of fabricating a MOS device with an ultra-shallow junction
CN1253929C (zh) * 2003-03-04 2006-04-26 松下电器产业株式会社 半导体装置及其制造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2010103687A1 (ja) * 2009-03-09 2010-09-16 株式会社 東芝 半導体装置およびその製造方法
JP2012099510A (ja) * 2009-03-09 2012-05-24 Toshiba Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
DE602004031065D1 (de) 2011-03-03
US20050042848A1 (en) 2005-02-24
EP1460680B1 (en) 2011-01-19
EP1460680A2 (en) 2004-09-22
US20040185633A1 (en) 2004-09-23
US6808997B2 (en) 2004-10-26
US7345355B2 (en) 2008-03-18
EP1460680A3 (en) 2005-08-17

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