JP2004128484A - 半導体集積回路装置およびその製造方法 - Google Patents
半導体集積回路装置およびその製造方法 Download PDFInfo
- Publication number
- JP2004128484A JP2004128484A JP2003207584A JP2003207584A JP2004128484A JP 2004128484 A JP2004128484 A JP 2004128484A JP 2003207584 A JP2003207584 A JP 2003207584A JP 2003207584 A JP2003207584 A JP 2003207584A JP 2004128484 A JP2004128484 A JP 2004128484A
- Authority
- JP
- Japan
- Prior art keywords
- wiring
- dummy
- insulating film
- integrated circuit
- circuit device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
Images
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/01—Manufacture or treatment
- H10W20/071—Manufacture or treatment of dielectric parts thereof
- H10W20/092—Manufacture or treatment of dielectric parts thereof by smoothing the dielectric parts
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W20/00—Interconnections in chips, wafers or substrates
- H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
Landscapes
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Integrated Circuits (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2003207584A JP2004128484A (ja) | 1997-03-31 | 2003-08-14 | 半導体集積回路装置およびその製造方法 |
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8101397 | 1997-03-31 | ||
| JP2003207584A JP2004128484A (ja) | 1997-03-31 | 2003-08-14 | 半導体集積回路装置およびその製造方法 |
Related Parent Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP03338898A Division JP3638778B2 (ja) | 1997-03-31 | 1998-02-16 | 半導体集積回路装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2004128484A true JP2004128484A (ja) | 2004-04-22 |
| JP2004128484A5 JP2004128484A5 (https=) | 2005-09-29 |
Family
ID=32299890
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2003207584A Withdrawn JP2004128484A (ja) | 1997-03-31 | 2003-08-14 | 半導体集積回路装置およびその製造方法 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP2004128484A (https=) |
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100552935C (zh) * | 2006-10-09 | 2009-10-21 | 日月光半导体制造股份有限公司 | 基板条与基板结构以及其制造方法 |
| JP2010093235A (ja) * | 2008-09-11 | 2010-04-22 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
| WO2014042234A1 (ja) * | 2012-09-11 | 2014-03-20 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置 |
| JP2016031939A (ja) * | 2014-07-25 | 2016-03-07 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
-
2003
- 2003-08-14 JP JP2003207584A patent/JP2004128484A/ja not_active Withdrawn
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN100552935C (zh) * | 2006-10-09 | 2009-10-21 | 日月光半导体制造股份有限公司 | 基板条与基板结构以及其制造方法 |
| JP2010093235A (ja) * | 2008-09-11 | 2010-04-22 | Nec Electronics Corp | 半導体装置および半導体装置の製造方法 |
| WO2014042234A1 (ja) * | 2012-09-11 | 2014-03-20 | ピーエスフォー ルクスコ エスエイアールエル | 半導体装置 |
| JP2016031939A (ja) * | 2014-07-25 | 2016-03-07 | 富士通セミコンダクター株式会社 | 半導体装置の製造方法 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3638778B2 (ja) | 半導体集積回路装置およびその製造方法 | |
| KR100545865B1 (ko) | 반도체 장치 및 그 제조 방법 | |
| US6255697B1 (en) | Integrated circuit devices including distributed and isolated dummy conductive regions | |
| JP3902507B2 (ja) | 半導体素子のリペアヒューズ開口方法 | |
| JP2004048025A (ja) | 半導体集積回路装置 | |
| JP5600280B2 (ja) | 半導体集積回路装置 | |
| JP2006128709A (ja) | 半導体集積回路装置およびその製造方法 | |
| JP2004128484A (ja) | 半導体集積回路装置およびその製造方法 | |
| US20050014330A1 (en) | Method of planarizing an interlayer dielectric layer | |
| KR102864465B1 (ko) | 웨이퍼 평탄화 방법 및 이에 의한 이미지 센서 | |
| JPH10284702A (ja) | 半導体集積回路装置およびその製造方法 | |
| JPH11261023A (ja) | 半導体装置及びその製造方法 | |
| TW202443874A (zh) | 影像感測器積體晶片及形成其的方法 | |
| KR20070056672A (ko) | 반도체 소자의 층간 절연막 패턴 형성 방법 | |
| KR20040015437A (ko) | 하드 마스크를 이용한 반도체 소자의 제조 방법 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050422 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20060117 |
|
| A761 | Written withdrawal of application |
Free format text: JAPANESE INTERMEDIATE CODE: A761 Effective date: 20060316 |