JP2003338516A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法Info
- Publication number
- JP2003338516A JP2003338516A JP2002145333A JP2002145333A JP2003338516A JP 2003338516 A JP2003338516 A JP 2003338516A JP 2002145333 A JP2002145333 A JP 2002145333A JP 2002145333 A JP2002145333 A JP 2002145333A JP 2003338516 A JP2003338516 A JP 2003338516A
- Authority
- JP
- Japan
- Prior art keywords
- film
- plating
- electrode
- semiconductor device
- plating solution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/071—Connecting or disconnecting
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
- H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
- H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
- H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/01—Manufacture or treatment
- H10W72/019—Manufacture or treatment of bond pads
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/221—Structures or relative sizes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/241—Dispositions, e.g. layouts
- H10W72/242—Dispositions, e.g. layouts relative to the surface, e.g. recessed, protruding
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/251—Materials
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
- H10W72/29—Bond pads specially adapted therefor
Landscapes
- Chemically Coating (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002145333A JP2003338516A (ja) | 2002-05-20 | 2002-05-20 | 半導体装置およびその製造方法 |
| US10/303,737 US6686660B2 (en) | 2002-05-20 | 2002-11-26 | Semiconductor device |
| DE10261460A DE10261460A1 (de) | 2002-05-20 | 2002-12-31 | Halbleitervorrichtung |
| KR10-2003-0005706A KR100503940B1 (ko) | 2002-05-20 | 2003-01-29 | 반도체장치 및 그 제조방법 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002145333A JP2003338516A (ja) | 2002-05-20 | 2002-05-20 | 半導体装置およびその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003338516A true JP2003338516A (ja) | 2003-11-28 |
| JP2003338516A5 JP2003338516A5 (https=) | 2005-09-29 |
Family
ID=29417113
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002145333A Pending JP2003338516A (ja) | 2002-05-20 | 2002-05-20 | 半導体装置およびその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (1) | US6686660B2 (https=) |
| JP (1) | JP2003338516A (https=) |
| KR (1) | KR100503940B1 (https=) |
| DE (1) | DE10261460A1 (https=) |
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006057360A1 (ja) * | 2004-11-25 | 2006-06-01 | Nec Corporation | 半導体装置及びその製造方法、配線基板及びその製造方法、半導体パッケージ並びに電子機器 |
| WO2015107796A1 (ja) * | 2014-01-20 | 2015-07-23 | 三菱電機株式会社 | 半導体素子およびその製造方法、ならびに半導体装置 |
| JP2016086069A (ja) * | 2014-10-24 | 2016-05-19 | 三菱電機株式会社 | 半導体素子および半導体装置 |
| EP3151272A1 (en) | 2015-09-30 | 2017-04-05 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing semiconductor device |
| JP2018137290A (ja) * | 2017-02-20 | 2018-08-30 | トヨタ自動車株式会社 | 半導体装置 |
| US10998257B2 (en) | 2019-03-11 | 2021-05-04 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing same |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2005265720A (ja) * | 2004-03-19 | 2005-09-29 | Nec Corp | 電気接点構造及びその形成方法と素子検査方法 |
| US8653657B2 (en) * | 2005-08-23 | 2014-02-18 | Rohm Co., Ltd. | Semiconductor chip, method of manufacturing semiconductor chip, and semiconductor device |
| JP2007184381A (ja) * | 2006-01-06 | 2007-07-19 | Matsushita Electric Ind Co Ltd | フリップチップ実装用回路基板とその製造方法、並びに半導体装置とその製造方法 |
| JP2007243031A (ja) * | 2006-03-10 | 2007-09-20 | Seiko Epson Corp | 配線基板の製造方法 |
| KR100771675B1 (ko) * | 2006-03-30 | 2007-11-01 | 엘지전자 주식회사 | 패키지용 인쇄회로기판 및 그 제조방법 |
| US7538429B2 (en) * | 2006-08-21 | 2009-05-26 | Intel Corporation | Method of enabling solder deposition on a substrate and electronic package formed thereby |
| US20080136019A1 (en) * | 2006-12-11 | 2008-06-12 | Johnson Michael E | Solder Bump/Under Bump Metallurgy Structure for High Temperature Applications |
| US8555494B2 (en) * | 2007-10-01 | 2013-10-15 | Intel Corporation | Method of manufacturing coreless substrate |
| US8058726B1 (en) | 2008-05-07 | 2011-11-15 | Amkor Technology, Inc. | Semiconductor device having redistribution layer |
| US9543262B1 (en) | 2009-08-18 | 2017-01-10 | Cypress Semiconductor Corporation | Self aligned bump passivation |
| US8455361B2 (en) * | 2010-01-07 | 2013-06-04 | Texas Instruments Incorporated | Electroless plating of porous and non-porous nickel layers, and gold layer in semiconductor device |
| US8362612B1 (en) | 2010-03-19 | 2013-01-29 | Amkor Technology, Inc. | Semiconductor device and manufacturing method thereof |
| US8552557B1 (en) | 2011-12-15 | 2013-10-08 | Amkor Technology, Inc. | Electronic component package fabrication method and structure |
| US8664090B1 (en) | 2012-04-16 | 2014-03-04 | Amkor Technology, Inc. | Electronic component package fabrication method |
| US9245862B1 (en) | 2013-02-12 | 2016-01-26 | Amkor Technology, Inc. | Electronic component package fabrication method and structure |
| US12417971B2 (en) * | 2021-11-22 | 2025-09-16 | Samsung Electronics Co., Ltd. | Semiconductor package with multilayer bonding pads |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02276249A (ja) | 1989-04-18 | 1990-11-13 | Seiko Epson Corp | 半導体回路バンプの製造方法 |
| US5656858A (en) * | 1994-10-19 | 1997-08-12 | Nippondenso Co., Ltd. | Semiconductor device with bump structure |
| JPH1140745A (ja) | 1997-07-17 | 1999-02-12 | Hitachi Ltd | 半導体装置およびその半導体装置を組み込んだ電子装置 |
| JPH11214421A (ja) | 1997-10-13 | 1999-08-06 | Matsushita Electric Ind Co Ltd | 半導体素子の電極形成方法 |
-
2002
- 2002-05-20 JP JP2002145333A patent/JP2003338516A/ja active Pending
- 2002-11-26 US US10/303,737 patent/US6686660B2/en not_active Expired - Fee Related
- 2002-12-31 DE DE10261460A patent/DE10261460A1/de not_active Ceased
-
2003
- 2003-01-29 KR KR10-2003-0005706A patent/KR100503940B1/ko not_active Expired - Fee Related
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| WO2006057360A1 (ja) * | 2004-11-25 | 2006-06-01 | Nec Corporation | 半導体装置及びその製造方法、配線基板及びその製造方法、半導体パッケージ並びに電子機器 |
| WO2015107796A1 (ja) * | 2014-01-20 | 2015-07-23 | 三菱電機株式会社 | 半導体素子およびその製造方法、ならびに半導体装置 |
| JP2016086069A (ja) * | 2014-10-24 | 2016-05-19 | 三菱電機株式会社 | 半導体素子および半導体装置 |
| EP3151272A1 (en) | 2015-09-30 | 2017-04-05 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing semiconductor device |
| KR20170038645A (ko) | 2015-09-30 | 2017-04-07 | 르네사스 일렉트로닉스 가부시키가이샤 | 반도체 장치 및 반도체 장치의 제조 방법 |
| US9922928B2 (en) | 2015-09-30 | 2018-03-20 | Renesas Electronics Corporation | Semiconductor device and method of manufacturing semiconductor device |
| JP2018137290A (ja) * | 2017-02-20 | 2018-08-30 | トヨタ自動車株式会社 | 半導体装置 |
| US10998257B2 (en) | 2019-03-11 | 2021-05-04 | Kabushiki Kaisha Toshiba | Semiconductor device and method of manufacturing same |
Also Published As
| Publication number | Publication date |
|---|---|
| KR20030090489A (ko) | 2003-11-28 |
| US20030214038A1 (en) | 2003-11-20 |
| KR100503940B1 (ko) | 2005-07-26 |
| US6686660B2 (en) | 2004-02-03 |
| DE10261460A1 (de) | 2003-12-11 |
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Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20050428 |
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| A621 | Written request for application examination |
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| A977 | Report on retrieval |
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