JP2003271538A5 - - Google Patents
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- Publication number
- JP2003271538A5 JP2003271538A5 JP2002075369A JP2002075369A JP2003271538A5 JP 2003271538 A5 JP2003271538 A5 JP 2003271538A5 JP 2002075369 A JP2002075369 A JP 2002075369A JP 2002075369 A JP2002075369 A JP 2002075369A JP 2003271538 A5 JP2003271538 A5 JP 2003271538A5
- Authority
- JP
- Japan
- Prior art keywords
- memory
- address
- signal
- module
- command signal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000015654 memory Effects 0.000 claims 166
- 238000010168 coupling process Methods 0.000 claims 9
- 238000005859 coupling reaction Methods 0.000 claims 9
- 230000008878 coupling Effects 0.000 claims 7
- 238000003780 insertion Methods 0.000 claims 2
- 230000037431 insertion Effects 0.000 claims 2
- 230000002265 prevention Effects 0.000 claims 1
- 238000012795 verification Methods 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002075369A JP4173970B2 (ja) | 2002-03-19 | 2002-03-19 | メモリシステム及びメモリモジュール |
| PCT/JP2003/002428 WO2003079202A1 (en) | 2002-03-19 | 2003-03-03 | Memory system using directional coupler for address |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002075369A JP4173970B2 (ja) | 2002-03-19 | 2002-03-19 | メモリシステム及びメモリモジュール |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003271538A JP2003271538A (ja) | 2003-09-26 |
| JP2003271538A5 true JP2003271538A5 (enExample) | 2005-09-08 |
| JP4173970B2 JP4173970B2 (ja) | 2008-10-29 |
Family
ID=28035364
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002075369A Expired - Fee Related JP4173970B2 (ja) | 2002-03-19 | 2002-03-19 | メモリシステム及びメモリモジュール |
Country Status (2)
| Country | Link |
|---|---|
| JP (1) | JP4173970B2 (enExample) |
| WO (1) | WO2003079202A1 (enExample) |
Families Citing this family (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6930904B2 (en) | 2002-11-22 | 2005-08-16 | Sun Microsystems, Inc. | Circuit topology for high-speed memory access |
| JP4741226B2 (ja) * | 2003-12-25 | 2011-08-03 | 株式会社日立製作所 | 半導体メモリモジュール、およびメモリシステム |
| JP2006011926A (ja) * | 2004-06-28 | 2006-01-12 | Ricoh Co Ltd | シリアルデータ転送システム、シリアルデータ転送装置、シリアルデータ転送方法及び画像形成装置 |
| KR100688515B1 (ko) | 2005-01-06 | 2007-03-02 | 삼성전자주식회사 | 메모리 모듈 및 시스템 |
| KR100703728B1 (ko) | 2005-01-11 | 2007-04-05 | 삼성전자주식회사 | 전자 기기 |
| US7577760B2 (en) | 2005-05-10 | 2009-08-18 | Samsung Electronics Co., Ltd. | Memory systems, modules, controllers and methods using dedicated data and control busses |
| JP4382842B2 (ja) | 2007-09-18 | 2009-12-16 | 富士通株式会社 | メモリ制御回路,遅延時間制御装置,遅延時間制御方法および遅延時間制御プログラム |
| US8503211B2 (en) | 2009-05-22 | 2013-08-06 | Mosaid Technologies Incorporated | Configurable module and memory subsystem |
| CN103035279B (zh) * | 2011-09-30 | 2015-07-08 | 无锡江南计算技术研究所 | 消除ddr3负载差异影响的传输线结构及形成方法、内存结构 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0784863A (ja) * | 1993-09-20 | 1995-03-31 | Hitachi Ltd | 情報処理装置およびそれに適した半導体記憶装置 |
| JPH07271712A (ja) * | 1994-03-29 | 1995-10-20 | Japan Radio Co Ltd | メモリアクセス方法及びこれを用いたフレームメモリアクセス装置 |
| JPH08335871A (ja) * | 1995-06-07 | 1996-12-17 | Matsushita Electron Corp | 半導体装置 |
| JP3546613B2 (ja) * | 1996-10-25 | 2004-07-28 | 株式会社日立製作所 | 回路基板 |
| JPH10242412A (ja) * | 1997-02-24 | 1998-09-11 | Fujitsu Ltd | 配線基板及びメモリ実装配線基板 |
| JP3820843B2 (ja) * | 1999-05-12 | 2006-09-13 | 株式会社日立製作所 | 方向性結合式メモリモジュール |
| JP3880286B2 (ja) * | 1999-05-12 | 2007-02-14 | エルピーダメモリ株式会社 | 方向性結合式メモリシステム |
| JP3757757B2 (ja) * | 2000-05-18 | 2006-03-22 | 株式会社日立製作所 | リード優先メモリシステム |
| KR100351053B1 (ko) * | 2000-05-19 | 2002-09-05 | 삼성전자 주식회사 | 종단저항을 내장하는 메모리 모듈 및 이를 포함하여 다중채널구조를 갖는 메모리 모듈 |
| KR100335501B1 (ko) * | 2000-06-09 | 2002-05-08 | 윤종용 | 향상된 데이터 버스 성능을 갖는 메모리 모듈 |
| KR100335504B1 (ko) * | 2000-06-30 | 2002-05-09 | 윤종용 | 제어 및 어드레스 버스를 공유하는 2채널 메모리 시스템및 이에 채용되는 메모리 모듈 |
| TW530248B (en) * | 2000-08-09 | 2003-05-01 | Hitachi Ltd | Data transmission system of directional coupling type using forward wave and reflective wave |
-
2002
- 2002-03-19 JP JP2002075369A patent/JP4173970B2/ja not_active Expired - Fee Related
-
2003
- 2003-03-03 WO PCT/JP2003/002428 patent/WO2003079202A1/ja not_active Ceased
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