JP2003234311A - 内部構造にアクセスするためにウェハ・スタックをダイシングする方法 - Google Patents

内部構造にアクセスするためにウェハ・スタックをダイシングする方法

Info

Publication number
JP2003234311A
JP2003234311A JP2003025614A JP2003025614A JP2003234311A JP 2003234311 A JP2003234311 A JP 2003234311A JP 2003025614 A JP2003025614 A JP 2003025614A JP 2003025614 A JP2003025614 A JP 2003025614A JP 2003234311 A JP2003234311 A JP 2003234311A
Authority
JP
Japan
Prior art keywords
wafer
stack
dicing
die assembly
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2003025614A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003234311A5 (enExample
Inventor
Peter G Hartwell
ピーター・ジー・ハートウェル
David Horsley
デイビッド・ホースレイ
Storrs T Hoen
ストーズ・ティー・ホーエン
Jonah A Harley
ジョナ・エイ・ハーレイ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
HP Inc
Original Assignee
Hewlett Packard Co
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hewlett Packard Co filed Critical Hewlett Packard Co
Publication of JP2003234311A publication Critical patent/JP2003234311A/ja
Publication of JP2003234311A5 publication Critical patent/JP2003234311A5/ja
Withdrawn legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/50—Multistep manufacturing processes of assemblies consisting of devices, the devices being individual devices of subclass H10D or integrated devices of class H10
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B81—MICROSTRUCTURAL TECHNOLOGY
    • B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00865—Multistep processes for the separation of wafers into individual elements
    • B81C1/00873—Multistep processes for the separation of wafers into individual elements characterised by special arrangements of the devices, allowing an easier separation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065—Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657—Stacked arrangements of devices
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06513—Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00—Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04—All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065—All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503—Stacked arrangements of devices
    • H01L2225/06555—Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Dicing (AREA)
  • Processing Of Stones Or Stones Resemblance Materials (AREA)
JP2003025614A 2002-02-01 2003-02-03 内部構造にアクセスするためにウェハ・スタックをダイシングする方法 Withdrawn JP2003234311A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/066,213 US6955976B2 (en) 2002-02-01 2002-02-01 Method for dicing wafer stacks to provide access to interior structures
US10/066213 2002-02-01

Publications (2)

Publication Number Publication Date
JP2003234311A true JP2003234311A (ja) 2003-08-22
JP2003234311A5 JP2003234311A5 (enExample) 2006-03-23

Family

ID=22068009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2003025614A Withdrawn JP2003234311A (ja) 2002-02-01 2003-02-03 内部構造にアクセスするためにウェハ・スタックをダイシングする方法

Country Status (4)

Country Link
US (2) US6955976B2 (enExample)
EP (1) EP1333485A3 (enExample)
JP (1) JP2003234311A (enExample)
TW (1) TWI261318B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007536105A (ja) * 2004-06-30 2007-12-13 インテル・コーポレーション マイクロエレクトロメカニカルシステム（ｍｅｍｓ）と受動素子が集積化されたモジュール
JP2013021096A (ja) * 2011-07-11 2013-01-31 Disco Abrasive Syst Ltd 積層ウェーハの加工方法

Families Citing this family (24)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE10232190A1 (de) * 2002-07-16 2004-02-05 Austriamicrosystems Ag Verfahren zur Herstellung eines Bauelements mit tiefliegenden Anschlußflächen
DE10322751B3 (de) * 2003-05-19 2004-09-30 X-Fab Semiconductor Foundries Ag Verfahren zur Herstellung eines in Kunststoff verschlossenen optoelektronischen Bauelementes
KR101252751B1 (ko) 2003-11-13 2013-04-09 어플라이드 머티어리얼스, 인코포레이티드 성형 표면을 갖는 유지 링
US7422962B2 (en) * 2004-10-27 2008-09-09 Hewlett-Packard Development Company, L.P. Method of singulating electronic devices
US7344956B2 (en) * 2004-12-08 2008-03-18 Miradia Inc. Method and device for wafer scale packaging of optical devices using a scribe and break process
US7282425B2 (en) * 2005-01-31 2007-10-16 International Business Machines Corporation Structure and method of integrating compound and elemental semiconductors for high-performance CMOS
DE102006033502A1 (de) 2006-05-03 2007-11-15 Osram Opto Semiconductors Gmbh Strahlungsemittierender Halbleiterkörper mit Trägersubstrat und Verfahren zur Herstellung eines solchen
US7808061B2 (en) * 2006-07-28 2010-10-05 Hewlett-Packard Development Company, L.P. Multi-die apparatus including moveable portions
US7892891B2 (en) * 2006-10-11 2011-02-22 SemiLEDs Optoelectronics Co., Ltd. Die separation
US8030754B2 (en) 2007-01-31 2011-10-04 Hewlett-Packard Development Company, L.P. Chip cooling channels formed in wafer bonding gap
US20080181558A1 (en) 2007-01-31 2008-07-31 Hartwell Peter G Electronic and optical circuit integration through wafer bonding
KR100826394B1 (ko) * 2007-05-17 2008-05-02 삼성전기주식회사 반도체 패키지 제조방법
US7662669B2 (en) * 2007-07-24 2010-02-16 Northrop Grumman Space & Mission Systems Corp. Method of exposing circuit lateral interconnect contacts by wafer saw
US7972940B2 (en) * 2007-12-28 2011-07-05 Micron Technology, Inc. Wafer processing
CN102227805A (zh) * 2008-11-28 2011-10-26 精工电子有限公司 圆片及封装件制品的制造方法
JPWO2010070753A1 (ja) * 2008-12-18 2012-05-24 セイコーインスツル株式会社 ウエハおよびパッケージ製品の製造方法
TWI513668B (zh) * 2009-02-23 2015-12-21 精工電子有限公司 玻璃密封型封裝的製造方法及玻璃基板
JP2012186532A (ja) 2011-03-03 2012-09-27 Seiko Instruments Inc ウエハ、パッケージの製造方法、及び圧電振動子
CN102744795A (zh) * 2011-04-21 2012-10-24 菱生精密工业股份有限公司 晶圆切割方法
TW201243930A (en) * 2011-04-21 2012-11-01 Lingsen Precision Ind Ltd Wafer dicing method
US8980676B2 (en) * 2012-06-25 2015-03-17 Raytheon Company Fabrication of window cavity cap structures in wafer level packaging
CN104340952A (zh) * 2013-08-09 2015-02-11 比亚迪股份有限公司 Mems圆片级真空封装方法及结构
EP3847697A4 (en) * 2018-09-06 2022-10-26 Board of Regents, The University of Texas System TECHNIQUES FOR NANOFABRICATION AND DESIGN OF CONFIGURABLE 3D ICs AND ASICs
EP4541220A3 (en) 2021-10-15 2025-07-30 Skechers U.S.A., Inc. II Footwear counter for easier entry and removal

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0137988B1 (en) * 1983-08-31 1989-11-29 Texas Instruments Incorporated Infrared imager
JP3584635B2 (ja) * 1996-10-04 2004-11-04 株式会社デンソー 半導体装置及びその製造方法
US6436793B1 (en) * 2000-12-28 2002-08-20 Xerox Corporation Methods of forming semiconductor structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007536105A (ja) * 2004-06-30 2007-12-13 インテル・コーポレーション マイクロエレクトロメカニカルシステム（ｍｅｍｓ）と受動素子が集積化されたモジュール
JP4746611B2 (ja) * 2004-06-30 2011-08-10 インテル・コーポレーション マイクロエレクトロメカニカルシステム（ｍｅｍｓ）と受動素子が集積化されたモジュール
JP2013021096A (ja) * 2011-07-11 2013-01-31 Disco Abrasive Syst Ltd 積層ウェーハの加工方法

Also Published As

Publication number Publication date
TW200303046A (en) 2003-08-16
US7042105B2 (en) 2006-05-09
US6955976B2 (en) 2005-10-18
US20050191791A1 (en) 2005-09-01
EP1333485A2 (en) 2003-08-06
EP1333485A3 (en) 2005-11-30
TWI261318B (en) 2006-09-01
US20030148553A1 (en) 2003-08-07

Similar Documents

Publication Publication Date Title
JP2003234311A (ja) 内部構造にアクセスするためにウェハ・スタックをダイシングする方法
US5657537A (en) Method for fabricating a stack of two dimensional circuit modules
KR100310220B1 (ko) 집적회로장치를제조하기위한장치및그제조방법
JP3245006B2 (ja) モノリシック電子モジュールの製造方法とその製造を容易にするためのワークピース
CN113523597B (zh) 晶圆切割方法
US20050282374A1 (en) Method of forming a thin wafer stack for a wafer level package
US5804464A (en) Semiconductor chip kerf clear method for forming semiconductor chips and electronic module therefore
JP2009088252A (ja) ウエハのダイシング方法および半導体チップ
US9064950B2 (en) Fabrication method for a chip package
CN102208438B (zh) 近乎无衬底的复合功率半导体器件及其方法
JPH08213548A (ja) ３次元集積回路の製造方法
US20020170175A1 (en) Method for producing micromechanical structures
JP2004534375A (ja) パケージ集積回路およびその製造方法
CN1157779C (zh) 一种处理装入智能插卡的削薄的芯片的方法
WO2022121119A1 (zh) 芯片键合方法
CN114628304A (zh) 芯片键合方法
TWI233182B (en) Method for producing separate monolithically integrated semiconductor circuits
CN113809006B (zh) 利用聚合物沉积技术保护管芯隅角
JP2006049419A (ja) ダイシング方法
JP2007165789A (ja) 半導体装置の製造方法
JPH1064855A (ja) 半導体装置の製造方法
JP2013026604A (ja) 接合基板の製造方法
US20050224952A1 (en) Three dimensional six surface conformal die coating
JP2001085363A (ja) 半導体装置の製造方法
JP2002203929A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20060203

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20060203

A761 Written withdrawal of application

Free format text: JAPANESE INTERMEDIATE CODE: A761

Effective date: 20080821