JP2003188357A5 - - Google Patents
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- Publication number
- JP2003188357A5 JP2003188357A5 JP2002273428A JP2002273428A JP2003188357A5 JP 2003188357 A5 JP2003188357 A5 JP 2003188357A5 JP 2002273428 A JP2002273428 A JP 2002273428A JP 2002273428 A JP2002273428 A JP 2002273428A JP 2003188357 A5 JP2003188357 A5 JP 2003188357A5
- Authority
- JP
- Japan
- Prior art keywords
- conductor
- magnetic memory
- memory element
- cap
- layer
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004020 conductor Substances 0.000 claims 16
- 230000005291 magnetic Effects 0.000 claims 10
- 239000011248 coating agent Substances 0.000 claims 2
- 238000000576 coating method Methods 0.000 claims 2
- 230000005294 ferromagnetic Effects 0.000 claims 1
- 230000005307 ferromagnetism Effects 0.000 claims 1
- 230000005415 magnetization Effects 0.000 claims 1
Claims (9)
- 磁気メモリ素子であって、
２つの方向のいずれかに向けられることができる磁化を有するデータ強磁性層（12）と、
誘電体層（914）と、その誘電体層（914）によって分離される第１および第２の導体（20、22）と、その第１および第２の導体（20、22）上の強磁性被覆（912a、912b、912a’、912b’）とを含む基準層（912、912’）と、及び
前記データ層と前記基準層（12と912、912’）との間のスペーサ層（16）とを含む、磁気メモリ素子。 - 前記基準層（912、912’）の前記被覆（912a、912b、912a’、912b’）が磁気的に非常に軟らかい、請求項１に記載の磁気メモリ素子。
- 前記スペーサ層（16）が絶縁性トンネル障壁である、請求項１に記載の磁気メモリ素子。
- 前記第１の導体（20）が前記スペーサ層（16）と前記第２の導体（22）との間に形成され、前記第２の導体（22）が、前記第１の導体（20）よりも非常に大きな断面積を有する、請求項１に記載の磁気メモリ素子。
- 前記第２の導体（22）が読出し導体であり、前記第１の導体（20）が読出し／書込み導体である、請求項４に記載の磁気メモリ素子。
- 前記第２の導体（22）が読出し／書込み導体であり、前記第１の導体（20）が読出し導体である、請求項４に記載の磁気メモリ素子。
- 前記被覆（912a、912b、912a’、912b’）が、前記第１の導体（20）上の第１の部分（912b、912b’）と、前記第２の導体（22）および前記誘電体層（914）上の第２の部分（912a、912a’）とを含み、前記第１の部分と前記第２の部分（912a、912b、912a’、912b’）との間に隙間が存在する、請求項４に記載の磁気メモリ素子。
- 前記第２の部分（912a）が側壁を含み、前記第１の部分（912b）がキャップ（912c）を含み、そのキャップ（912c）が前記側壁上に延在し、前記隙間が前記キャップ（912c）と前記側壁との間に存在する、請求項７に記載の磁気メモリ素子。
- 前記第２の部分（912a’）が側壁を含み、前記第１の部分（912b’）がキャップ（912c’）を含み、そのキャップ（912c’）が前記側壁上には延在せず、前記隙間が前記キャップ（912c’）と前記側壁との間に存在する、請求項７に記載の磁気メモリ素子。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/963,932 US6504221B1 (en) | 2001-09-25 | 2001-09-25 | Magneto-resistive device including soft reference layer having embedded conductors |
| US09/963932 | 2001-09-25 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2003188357A JP2003188357A (ja) | 2003-07-04 |
| JP2003188357A5 true JP2003188357A5 (ja) | 2005-04-28 |
| JP4128418B2 JP4128418B2 (ja) | 2008-07-30 |
Family
ID=25507914
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002273428A Expired - Fee Related JP4128418B2 (ja) | 2001-09-25 | 2002-09-19 | 導体を埋め込まれた磁気的に軟らかい基準層を含む磁気抵抗素子 |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6504221B1 (ja) |
| EP (1) | EP1296332B1 (ja) |
| JP (1) | JP4128418B2 (ja) |
| KR (1) | KR100896457B1 (ja) |
| CN (1) | CN100492528C (ja) |
| DE (1) | DE60203675T2 (ja) |
Families Citing this family (22)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6548849B1 (en) * | 2002-01-31 | 2003-04-15 | Sharp Laboratories Of America, Inc. | Magnetic yoke structures in MRAM devices to reduce programming power consumption and a method to make the same |
| US6597049B1 (en) * | 2002-04-25 | 2003-07-22 | Hewlett-Packard Development Company, L.P. | Conductor structure for a magnetic memory |
| US6780653B2 (en) | 2002-06-06 | 2004-08-24 | Micron Technology, Inc. | Methods of forming magnetoresistive memory device assemblies |
| US6850429B2 (en) * | 2002-08-02 | 2005-02-01 | Unity Semiconductor Corporation | Cross point memory array with memory plugs exhibiting a characteristic hysteresis |
| US6577529B1 (en) * | 2002-09-03 | 2003-06-10 | Hewlett-Packard Development Company, L.P. | Multi-bit magnetic memory device |
| JP3788964B2 (ja) | 2002-09-10 | 2006-06-21 | 株式会社東芝 | 磁気ランダムアクセスメモリ |
| US6950919B2 (en) * | 2003-03-26 | 2005-09-27 | Hewlett-Packard Development Company, L.P. | Computer system with operating system to dynamically adjust the main memory |
| US6865107B2 (en) * | 2003-06-23 | 2005-03-08 | Hewlett-Packard Development Company, L.P. | Magnetic memory device |
| US6865105B1 (en) * | 2003-09-22 | 2005-03-08 | Hewlett-Packard Development Company, L.P. | Thermal-assisted switching array configuration for MRAM |
| US6925000B2 (en) * | 2003-12-12 | 2005-08-02 | Maglabs, Inc. | Method and apparatus for a high density magnetic random access memory (MRAM) with stackable architecture |
| KR100634501B1 (ko) * | 2004-01-29 | 2006-10-13 | 삼성전자주식회사 | 자기 메모리 소자 및 그 제조방법 |
| US7193889B2 (en) * | 2004-02-11 | 2007-03-20 | Hewlett-Packard Development Company, Lp. | Switching of MRAM devices having soft magnetic reference layers |
| US7324369B2 (en) * | 2005-06-30 | 2008-01-29 | Freescale Semiconductor, Inc. | MRAM embedded smart power integrated circuits |
| US7444738B2 (en) * | 2005-07-29 | 2008-11-04 | Everspin Technologies, Inc. | Method for tunnel junction sensor with magnetic cladding |
| JP2007329222A (ja) * | 2006-06-07 | 2007-12-20 | Tdk Corp | 磁気記憶装置、磁気記憶装置の製造方法 |
| US7372753B1 (en) * | 2006-10-19 | 2008-05-13 | Unity Semiconductor Corporation | Two-cycle sensing in a two-terminal memory array having leakage current |
| US7379364B2 (en) * | 2006-10-19 | 2008-05-27 | Unity Semiconductor Corporation | Sensing a signal in a two-terminal memory array having leakage current |
| US7719876B2 (en) | 2008-07-31 | 2010-05-18 | Unity Semiconductor Corporation | Preservation circuit and methods to maintain values representing data in one or more layers of memory |
| US7830701B2 (en) * | 2008-09-19 | 2010-11-09 | Unity Semiconductor Corporation | Contemporaneous margin verification and memory access for memory cells in cross point memory arrays |
| EP2276034B1 (en) * | 2009-07-13 | 2016-04-27 | Crocus Technology S.A. | Self-referenced magnetic random access memory cell |
| US8625336B2 (en) * | 2011-02-08 | 2014-01-07 | Crocus Technology Inc. | Memory devices with series-interconnected magnetic random access memory cells |
| KR102354680B1 (ko) * | 2018-02-23 | 2022-01-25 | 에스케이하이닉스 주식회사 | 메모리 장치 |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3891511B2 (ja) * | 1997-06-12 | 2007-03-14 | キヤノン株式会社 | 磁性薄膜メモリ及びその記録再生方法 |
| US6040961A (en) * | 1997-10-27 | 2000-03-21 | International Business Machines Corporation | Current-pinned, current resettable soft AP-pinned spin valve sensor |
| US6169686B1 (en) * | 1997-11-20 | 2001-01-02 | Hewlett-Packard Company | Solid-state memory with magnetic storage cells |
| US6211559B1 (en) * | 1998-02-27 | 2001-04-03 | Motorola, Inc. | Symmetric magnetic tunnel device |
| US6872993B1 (en) * | 1999-05-25 | 2005-03-29 | Micron Technology, Inc. | Thin film memory device having local and external magnetic shielding |
| US6555858B1 (en) * | 2000-11-15 | 2003-04-29 | Motorola, Inc. | Self-aligned magnetic clad write line and its method of formation |
| US6538920B2 (en) * | 2001-04-02 | 2003-03-25 | Manish Sharma | Cladded read conductor for a pinned-on-the-fly soft reference layer |
| US6404674B1 (en) * | 2001-04-02 | 2002-06-11 | Hewlett Packard Company Intellectual Property Administrator | Cladded read-write conductor for a pinned-on-the-fly soft reference layer |
-
2001
- 2001-09-25 US US09/963,932 patent/US6504221B1/en not_active Expired - Lifetime
-
2002
- 2002-09-02 EP EP02256086A patent/EP1296332B1/en not_active Expired - Lifetime
- 2002-09-02 DE DE60203675T patent/DE60203675T2/de not_active Expired - Lifetime
- 2002-09-19 JP JP2002273428A patent/JP4128418B2/ja not_active Expired - Fee Related
- 2002-09-24 CN CNB021323429A patent/CN100492528C/zh not_active Expired - Lifetime
- 2002-09-24 KR KR1020020057844A patent/KR100896457B1/ko active IP Right Grant
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