JP2003179215A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2003179215A5 JP2003179215A5 JP2002301748A JP2002301748A JP2003179215A5 JP 2003179215 A5 JP2003179215 A5 JP 2003179215A5 JP 2002301748 A JP2002301748 A JP 2002301748A JP 2002301748 A JP2002301748 A JP 2002301748A JP 2003179215 A5 JP2003179215 A5 JP 2003179215A5
- Authority
- JP
- Japan
- Prior art keywords
- tunnel junction
- memory cell
- insulator
- resistance
- disposed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000012212 insulator Substances 0.000 claims 7
- 239000004020 conductor Substances 0.000 claims 5
- 230000005291 magnetic effect Effects 0.000 claims 5
- 230000005294 ferromagnetic effect Effects 0.000 claims 3
- 230000007423 decrease Effects 0.000 claims 2
Claims (10)
- メモリ・セルであって、
第１のトンネル接合と、
前記第１のトンネル接合に直列の第２のトンネル接合と、を有し、
前記第１のトンネル接合を、第１の抵抗状態から第２の抵抗状態に変化させることができ、前記第１のトンネル接合は、前記第２のトンネル接合とは異なる抵抗−電圧特性を有する、メモリ・セル。 - 前記第１のトンネル接合の抵抗は、前記メモリ・セルの両端に電圧が生じたときに前記第２のトンネル接合の抵抗よりも緩やかに減少する、請求項１に記載のメモリ・セル。
- 前記第１のトンネル接合が、
２つの磁性層と、
前記磁性層の間に配置された絶縁体と、
を有する、請求項１に記載のメモリ・セル。 - 前記第２のトンネル接合が前記第１のトンネル接合に直列の絶縁体を有する、請求項３に記載のメモリ・セル。
- 前記第２のトンネル接合が２つの導体を有し、該２つの導体は前記絶縁体の両側にそれぞれ配置される、請求項４に記載のメモリ・セル。
- 前記第２のトンネル接合は、前記第１のトンネル接合の前記磁性層のうちの１つを共用する、請求項４に記載のメモリ・セル。
- 前記第２のトンネル接合が導体を有し、前記絶縁体は該導体と前記共有される磁性層との間に配置される、請求項６に記載のメモリ・セル。
- 前記磁性層が強磁性体である、請求項３に記載のメモリ・セル。
- メモリ・セルであって、
２つの強磁性層と、該２つの強磁性層の間に配置された絶縁体と、を含む第１のトンネル接合と、
絶縁体と、該絶縁体に隣接する少なくとも１つの導体と、を含む第２のトンネル接合と、を有し、
前記第２のトンネル接合は前記第１のトンネル接合に直列である、メモリ・セル。 - 前記第１のトンネル接合の抵抗は、前記メモリ・セルの両端に電圧が生じたときに前記第２のトンネル接合の抵抗よりも緩やかに減少する、請求項９に記載のメモリ・セル。
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US09/983,404 | 2001-10-24 | ||
| US09/983,404 US6473337B1 (en) | 2001-10-24 | 2001-10-24 | Memory device having memory cells with magnetic tunnel junction and tunnel junction in series |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2003179215A JP2003179215A (ja) | 2003-06-27 |
| JP2003179215A5 true JP2003179215A5 (ja) | 2005-06-16 |
Family
ID=25529936
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002301748A Withdrawn JP2003179215A (ja) | 2001-10-24 | 2002-10-16 | トンネル接合に直列の磁気トンネル接合を備えたメモリ・セル |
Country Status (6)
| Country | Link |
|---|---|
| US (1) | US6473337B1 (ja) |
| EP (1) | EP1306850A3 (ja) |
| JP (1) | JP2003179215A (ja) |
| KR (1) | KR20030034026A (ja) |
| CN (1) | CN1414559A (ja) |
| TW (1) | TW567492B (ja) |
Families Citing this family (36)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6741494B2 (en) * | 1995-04-21 | 2004-05-25 | Mark B. Johnson | Magnetoelectronic memory element with inductively coupled write wires |
| US6674664B2 (en) * | 2001-05-07 | 2004-01-06 | Nve Corporation | Circuit selected joint magnetoresistive junction tunneling-giant magnetoresistive effects memory cells |
| US7067850B2 (en) * | 2001-10-16 | 2006-06-27 | Midwest Research Institute | Stacked switchable element and diode combination |
| KR20030034500A (ko) * | 2001-10-23 | 2003-05-09 | 주식회사 하이닉스반도체 | 마그네틱 램 |
| FR2832542B1 (fr) * | 2001-11-16 | 2005-05-06 | Commissariat Energie Atomique | Dispositif magnetique a jonction tunnel magnetique, memoire et procedes d'ecriture et de lecture utilisant ce dispositif |
| US6778421B2 (en) * | 2002-03-14 | 2004-08-17 | Hewlett-Packard Development Company, Lp. | Memory device array having a pair of magnetic bits sharing a common conductor line |
| US6751149B2 (en) * | 2002-03-22 | 2004-06-15 | Micron Technology, Inc. | Magnetic tunneling junction antifuse device |
| US6826077B2 (en) * | 2002-05-15 | 2004-11-30 | Hewlett-Packard Development Company, L.P. | Magnetic random access memory with reduced parasitic currents |
| US6667897B1 (en) * | 2002-06-28 | 2003-12-23 | International Business Machines Corporation | Magnetic tunnel junction containing a ferrimagnetic layer and anti-parallel layer |
| US6714444B2 (en) * | 2002-08-06 | 2004-03-30 | Grandis, Inc. | Magnetic element utilizing spin transfer and an MRAM device using the magnetic element |
| US6847547B2 (en) * | 2003-02-28 | 2005-01-25 | Grandis, Inc. | Magnetostatically coupled magnetic elements utilizing spin transfer and an MRAM device using the magnetic element |
| US6768150B1 (en) * | 2003-04-17 | 2004-07-27 | Infineon Technologies Aktiengesellschaft | Magnetic memory |
| US20050073878A1 (en) * | 2003-10-03 | 2005-04-07 | Taiwan Semiconductor Manufacturing Co., Ltd. | Multi-sensing level MRAM structure with different magnetoresistance ratios |
| US6947333B2 (en) * | 2003-10-30 | 2005-09-20 | Hewlett-Packard Development Company, L.P. | Memory device |
| KR100669363B1 (ko) * | 2004-10-26 | 2007-01-16 | 삼성전자주식회사 | 메모리 장치의 읽기 방법 |
| US7777261B2 (en) * | 2005-09-20 | 2010-08-17 | Grandis Inc. | Magnetic device having stabilized free ferromagnetic layer |
| JP2009509346A (ja) * | 2005-09-20 | 2009-03-05 | フリースケール セミコンダクター インコーポレイテッド | スピン依存トンネルセルおよびその形成方法 |
| KR100881181B1 (ko) * | 2006-11-13 | 2009-02-05 | 삼성전자주식회사 | 반도체 메모리 소자 및 그 제조 방법 |
| US7894248B2 (en) * | 2008-09-12 | 2011-02-22 | Grandis Inc. | Programmable and redundant circuitry based on magnetic tunnel junction (MTJ) |
| US8363460B2 (en) * | 2010-04-07 | 2013-01-29 | Avalanche Technology, Inc. | Method and apparatus for programming a magnetic tunnel junction (MTJ) |
| KR101676821B1 (ko) | 2010-03-18 | 2016-11-17 | 삼성전자주식회사 | 자기 메모리 소자 및 그 형성방법 |
| US9093149B2 (en) * | 2012-09-04 | 2015-07-28 | Qualcomm Incorporated | Low cost programmable multi-state device |
| KR101986335B1 (ko) * | 2012-10-08 | 2019-06-05 | 삼성전자주식회사 | 보상 저항성 소자를 포함하는 저항성 메모리 장치 |
| US20150103586A1 (en) * | 2013-10-16 | 2015-04-16 | Qualcomm Incorporated | Write driver and program driver for otp (one-time programmable) memory with magnetic tunneling junction cells |
| CN103545339B (zh) * | 2013-11-08 | 2015-12-02 | 北京航空航天大学 | 一种可高速计算、大容量存储的存储单元 |
| US10347691B2 (en) | 2014-05-21 | 2019-07-09 | Avalanche Technology, Inc. | Magnetic memory element with multilayered seed structure |
| US10438997B2 (en) | 2014-05-21 | 2019-10-08 | Avalanche Technology, Inc. | Multilayered seed structure for magnetic memory element including a CoFeB seed layer |
| US10050083B2 (en) | 2014-05-21 | 2018-08-14 | Avalanche Technology, Inc. | Magnetic structure with multilayered seed |
| US9496489B2 (en) * | 2014-05-21 | 2016-11-15 | Avalanche Technology, Inc. | Magnetic random access memory with multilayered seed structure |
| US9548095B2 (en) * | 2014-08-20 | 2017-01-17 | Everspin Technologies, Inc. | Redundant magnetic tunnel junctions in magnetoresistive memory |
| EP3314671A4 (en) | 2015-06-24 | 2019-03-20 | INTEL Corporation | SUPER METAL SPIN NETWORK FOR LOGIC AND MEMORY DEVICES |
| US9536926B1 (en) * | 2015-12-22 | 2017-01-03 | International Business Machines Corporation | Magnetic tunnel junction based anti-fuses with cascoded transistors |
| US10263179B2 (en) * | 2017-07-18 | 2019-04-16 | Nxp B.V. | Method of forming tunnel magnetoresistance (TMR) elements and TMR sensor element |
| KR102274831B1 (ko) * | 2019-05-30 | 2021-07-08 | 한국과학기술연구원 | 전기장 제어 마그네틱램 |
| CN112910466A (zh) * | 2021-01-27 | 2021-06-04 | 东南大学 | 一种磁性隧道结与电阻结合替代纯电阻的调制器电路 |
| US11972785B2 (en) * | 2021-11-15 | 2024-04-30 | International Business Machines Corporation | MRAM structure with enhanced magnetics using seed engineering |
Family Cites Families (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5701222A (en) * | 1995-09-11 | 1997-12-23 | International Business Machines Corporation | Spin valve sensor with antiparallel magnetization of pinned layers |
| US5991193A (en) * | 1997-12-02 | 1999-11-23 | International Business Machines Corporation | Voltage biasing for magnetic ram with magnetic tunnel memory cells |
| US6069820A (en) * | 1998-02-20 | 2000-05-30 | Kabushiki Kaisha Toshiba | Spin dependent conduction device |
| US5930164A (en) * | 1998-02-26 | 1999-07-27 | Motorola, Inc. | Magnetic memory unit having four states and operating method thereof |
| EP0959475A3 (en) * | 1998-05-18 | 2000-11-08 | Canon Kabushiki Kaisha | Magnetic thin film memory and recording and reproducing method and apparatus using such a memory |
| US6331944B1 (en) * | 2000-04-13 | 2001-12-18 | International Business Machines Corporation | Magnetic random access memory using a series tunnel element select mechanism |
| US6269018B1 (en) * | 2000-04-13 | 2001-07-31 | International Business Machines Corporation | Magnetic random access memory using current through MTJ write mechanism |
| US6541792B1 (en) * | 2001-09-14 | 2003-04-01 | Hewlett-Packard Development Company, Llp | Memory device having dual tunnel junction memory cells |
-
2001
- 2001-10-24 US US09/983,404 patent/US6473337B1/en not_active Expired - Fee Related
-
2002
- 2002-08-29 TW TW091119698A patent/TW567492B/zh active
- 2002-10-16 JP JP2002301748A patent/JP2003179215A/ja not_active Withdrawn
- 2002-10-24 KR KR1020020065323A patent/KR20030034026A/ko not_active Application Discontinuation
- 2002-10-24 EP EP02257399A patent/EP1306850A3/en not_active Withdrawn
- 2002-10-24 CN CN02146945A patent/CN1414559A/zh active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2003179215A5 (ja) | ||
| JP2003273334A5 (ja) | ||
| US7965542B2 (en) | Magnetic random access memory and write method of the same | |
| CA2713337C (en) | Magnetic tunnel junction cell including multiple magnetic domains | |
| JP2006510219A5 (ja) | ||
| EP1571713A4 (en) | DREHINJECTION DEVICE, MAGNETIC DEVICE USING THE SAME, THE MAGNETIC THIN FILM USED THEREIN | |
| JP2003060165A5 (ja) | ||
| WO2003107350A3 (en) | MAGNETORESISTIVE MEMORY WITH RANDOM ACCESS HAVING REDUCED SWITCHING FIELD | |
| EP1398795A3 (en) | Magnetic memory cell | |
| JP2003007977A5 (ja) | ||
| DE60312961D1 (de) | Multi-level speicherzelle | |
| TW200733104A (en) | A magnetoresistive tunnel junction magnetic device and its application to MRAM | |
| US20060138509A1 (en) | Magnetic random access memory with lower switching field through indirect exchange coupling | |
| JP2003037252A5 (ja) | ||
| JP2004006833A5 (ja) | ||
| EP1359589A3 (en) | Conductor structure for a magnetic memory | |
| KR102608134B1 (ko) | 자기 메모리 구조 및 디바이스 | |
| TW200405338A (en) | MRAM-cell and array-architecture with maximum read-out signal and reduced electro-magnetic interference | |
| US7208808B2 (en) | Magnetic random access memory with lower switching field | |
| JP2014195100A (ja) | 対称なｓｔｔ−ｍｒａｍビットセルデザイン | |
| JP2002151758A5 (ja) | ||
| WO2003098632A3 (en) | Methods of fabricating magnetoresistive memory devices | |
| EP1612804A3 (en) | Multi-bit magnetic random access memory element | |
| JP2003152118A5 (ja) | ||
| JPH10247382A (ja) | マルチピースセルおよびそのセルを含む磁気ランダムアクセスメモリアレイ |