JP2003151280A5 - - Google Patents

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Publication number
JP2003151280A5
JP2003151280A5 JP2001344484A JP2001344484A JP2003151280A5 JP 2003151280 A5 JP2003151280 A5 JP 2003151280A5 JP 2001344484 A JP2001344484 A JP 2001344484A JP 2001344484 A JP2001344484 A JP 2001344484A JP 2003151280 A5 JP2003151280 A5 JP 2003151280A5
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JP
Japan
Prior art keywords
column
bit line
memory device
semiconductor memory
common
Prior art date
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Granted
Application number
JP2001344484A
Other languages
English (en)
Japanese (ja)
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JP2003151280A (ja
JP3784301B2 (ja
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Publication date
Application filed filed Critical
Priority to JP2001344484A priority Critical patent/JP3784301B2/ja
Priority claimed from JP2001344484A external-priority patent/JP3784301B2/ja
Priority to US10/202,855 priority patent/US6741487B2/en
Priority to TW091117067A priority patent/TW564438B/zh
Priority to KR1020020048379A priority patent/KR100847279B1/ko
Publication of JP2003151280A publication Critical patent/JP2003151280A/ja
Publication of JP2003151280A5 publication Critical patent/JP2003151280A5/ja
Application granted granted Critical
Publication of JP3784301B2 publication Critical patent/JP3784301B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2001344484A 2001-11-09 2001-11-09 半導体記憶装置 Expired - Fee Related JP3784301B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2001344484A JP3784301B2 (ja) 2001-11-09 2001-11-09 半導体記憶装置
US10/202,855 US6741487B2 (en) 2001-11-09 2002-07-26 Semiconductor memory
TW091117067A TW564438B (en) 2001-11-09 2002-07-30 Semiconductor memory
KR1020020048379A KR100847279B1 (ko) 2001-11-09 2002-08-16 반도체 기억 장치

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2001344484A JP3784301B2 (ja) 2001-11-09 2001-11-09 半導体記憶装置

Publications (3)

Publication Number Publication Date
JP2003151280A JP2003151280A (ja) 2003-05-23
JP2003151280A5 true JP2003151280A5 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html) 2005-04-14
JP3784301B2 JP3784301B2 (ja) 2006-06-07

Family

ID=19158002

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2001344484A Expired - Fee Related JP3784301B2 (ja) 2001-11-09 2001-11-09 半導体記憶装置

Country Status (4)

Country Link
US (1) US6741487B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
JP (1) JP3784301B2 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
KR (1) KR100847279B1 (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)
TW (1) TW564438B (GUID-C5D7CC26-194C-43D0-91A1-9AE8C70A9BFF.html)

Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004103116A (ja) * 2002-09-10 2004-04-02 Matsushita Electric Ind Co Ltd 半導体装置
JP2005063548A (ja) * 2003-08-11 2005-03-10 Semiconductor Energy Lab Co Ltd メモリ及びその駆動方法
US7319633B2 (en) * 2003-12-19 2008-01-15 Semiconductor Energy Laboratory Co., Ltd. Semiconductor device
US7242624B2 (en) * 2005-06-14 2007-07-10 Qualcomm Incorporated Methods and apparatus for reading a full-swing memory array
US7286423B2 (en) * 2006-02-27 2007-10-23 Freescale Semiconductor, Inc. Bit line precharge in embedded memory
US7440335B2 (en) * 2006-05-23 2008-10-21 Freescale Semiconductor, Inc. Contention-free hierarchical bit line in embedded memory and method thereof
KR101362955B1 (ko) * 2006-06-30 2014-02-12 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치 및 그 제조 방법
US7477551B2 (en) * 2006-11-08 2009-01-13 Texas Instruments Incorporated Systems and methods for reading data from a memory array
US20080123437A1 (en) * 2006-11-29 2008-05-29 Vikas Agarwal Apparatus for Floating Bitlines in Static Random Access Memory Arrays
KR101245298B1 (ko) * 2007-10-11 2013-03-19 삼성전자주식회사 저항체를 이용한 비휘발성 메모리 장치
JP5315739B2 (ja) * 2008-03-21 2013-10-16 富士通株式会社 メモリ装置、メモリ制御方法
KR101044268B1 (ko) * 2008-11-28 2011-06-28 김동철 스프링 고정금구
JP5505274B2 (ja) 2010-11-22 2014-05-28 富士通セミコンダクター株式会社 スタティックｒａｍ
JP5772058B2 (ja) * 2011-02-24 2015-09-02 富士通セミコンダクター株式会社 半導体記憶装置
JP5760829B2 (ja) 2011-08-09 2015-08-12 富士通セミコンダクター株式会社 スタティックｒａｍ
JP5703200B2 (ja) 2011-12-01 2015-04-15 株式会社東芝 半導体記憶装置
TWI503821B (zh) * 2012-07-09 2015-10-11 Faraday Tech Corp 靜態隨機存取記憶裝置及其位元線電壓控制電路
GB2525904B (en) 2014-05-08 2018-05-09 Surecore Ltd Memory unit
JP6620472B2 (ja) * 2015-09-08 2019-12-18 凸版印刷株式会社 半導体記憶装置

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2618938B2 (ja) * 1987-11-25 1997-06-11 株式会社東芝 半導体記憶装置
US5995403A (en) * 1996-03-29 1999-11-30 Nec Corporation DRAM having memory cells each using one transfer gate and one capacitor to store plural bit data
JP3579205B2 (ja) * 1996-08-06 2004-10-20 株式会社ルネサステクノロジ 半導体記憶装置、半導体装置、データ処理装置及びコンピュータシステム
JP2000011639A (ja) * 1998-06-19 2000-01-14 Mitsubishi Electric Corp 半導体記憶装置
JP2000207886A (ja) 1999-01-08 2000-07-28 Seiko Epson Corp 半導体記憶装置

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