JP2003151263A5 - - Google Patents

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Publication number
JP2003151263A5
JP2003151263A5 JP2002273429A JP2002273429A JP2003151263A5 JP 2003151263 A5 JP2003151263 A5 JP 2003151263A5 JP 2002273429 A JP2002273429 A JP 2002273429A JP 2002273429 A JP2002273429 A JP 2002273429A JP 2003151263 A5 JP2003151263 A5 JP 2003151263A5
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JP
Japan
Prior art keywords
resistance state
determined
transition
voltage signal
reference layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2002273429A
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English (en)
Japanese (ja)
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JP2003151263A (ja
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Publication date
Priority claimed from US09/963,851 external-priority patent/US6538917B1/en
Application filed filed Critical
Publication of JP2003151263A publication Critical patent/JP2003151263A/ja
Publication of JP2003151263A5 publication Critical patent/JP2003151263A5/ja
Withdrawn legal-status Critical Current

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JP2002273429A 2001-09-25 2002-09-19 磁気的に軟らかい基準層を有する磁気抵抗素子のための読出し方法 Withdrawn JP2003151263A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/963,851 US6538917B1 (en) 2001-09-25 2001-09-25 Read methods for magneto-resistive device having soft reference layer
US09/963851 2001-09-25

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2007233234A Division JP4658102B2 (ja) 2001-09-25 2007-09-07 磁気的に軟らかい基準層を有する磁気抵抗素子のための読出し方法

Publications (2)

Publication Number Publication Date
JP2003151263A JP2003151263A (ja) 2003-05-23
JP2003151263A5 true JP2003151263A5 (enExample) 2005-04-28

Family

ID=25507809

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2002273429A Withdrawn JP2003151263A (ja) 2001-09-25 2002-09-19 磁気的に軟らかい基準層を有する磁気抵抗素子のための読出し方法
JP2007233234A Expired - Fee Related JP4658102B2 (ja) 2001-09-25 2007-09-07 磁気的に軟らかい基準層を有する磁気抵抗素子のための読出し方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2007233234A Expired - Fee Related JP4658102B2 (ja) 2001-09-25 2007-09-07 磁気的に軟らかい基準層を有する磁気抵抗素子のための読出し方法

Country Status (6)

Country Link
US (1) US6538917B1 (enExample)
EP (1) EP1296331A3 (enExample)
JP (2) JP2003151263A (enExample)
KR (1) KR20030027689A (enExample)
CN (1) CN1307643C (enExample)
TW (1) TWI263216B (enExample)

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US6795281B2 (en) * 2001-09-25 2004-09-21 Hewlett-Packard Development Company, L.P. Magneto-resistive device including soft synthetic ferrimagnet reference layer
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KR100408421B1 (ko) * 2002-01-16 2003-12-03 삼성전자주식회사 서브-어레이의 개수에 관계없이 계층형 입출력 라인구조를 가지는 반도체 메모리 장치
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US6724652B2 (en) * 2002-05-02 2004-04-20 Micron Technology, Inc. Low remanence flux concentrator for MRAM devices
US6780653B2 (en) * 2002-06-06 2004-08-24 Micron Technology, Inc. Methods of forming magnetoresistive memory device assemblies
US6683815B1 (en) * 2002-06-26 2004-01-27 Silicon Magnetic Systems Magnetic memory cell and method for assigning tunable writing currents
US20050195673A1 (en) * 2002-07-15 2005-09-08 Yoshiaki Asao Magnetic random access memory having memory cells configured by use of tunneling magnetoresistive elements
US6850433B2 (en) * 2002-07-15 2005-02-01 Hewlett-Packard Development Company, Lp. Magnetic memory device and method
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US6577529B1 (en) * 2002-09-03 2003-06-10 Hewlett-Packard Development Company, L.P. Multi-bit magnetic memory device
JP3788964B2 (ja) 2002-09-10 2006-06-21 株式会社東芝 磁気ランダムアクセスメモリ
JP3906145B2 (ja) * 2002-11-22 2007-04-18 株式会社東芝 磁気ランダムアクセスメモリ
US7002228B2 (en) * 2003-02-18 2006-02-21 Micron Technology, Inc. Diffusion barrier for improving the thermal stability of MRAM devices
JP2004296000A (ja) * 2003-03-27 2004-10-21 Hitachi Ltd 磁気抵抗効果型ヘッド、及びその製造方法
US7161875B2 (en) * 2003-06-12 2007-01-09 Hewlett-Packard Development Company, L.P. Thermal-assisted magnetic memory storage device
US6885582B2 (en) * 2003-06-12 2005-04-26 Hewlett-Packard Development Company, L.P. Magnetic memory storage device
US6819587B1 (en) * 2003-06-12 2004-11-16 Hewlett-Packard Development Company, L.P. Thermal-assisted nanotip magnetic memory storage device
US6842364B1 (en) * 2003-07-07 2005-01-11 Hewlett-Packard Development Company, L.P. Memory cell strings in a resistive cross point memory cell array
US6836422B1 (en) * 2003-07-07 2004-12-28 Hewlett-Packard Development Company, L.P. System and method for reading a memory cell
US7598555B1 (en) 2003-08-22 2009-10-06 International Business Machines Corporation MgO tunnel barriers and method of formation
US7274080B1 (en) 2003-08-22 2007-09-25 International Business Machines Corporation MgO-based tunnel spin injectors
US7027320B2 (en) * 2003-10-21 2006-04-11 Hewlett-Packard Development Company, L.P. Soft-reference magnetic memory digitized device and method of operation
US7286378B2 (en) * 2003-11-04 2007-10-23 Micron Technology, Inc. Serial transistor-cell array architecture
US7064970B2 (en) * 2003-11-04 2006-06-20 Micron Technology, Inc. Serial transistor-cell array architecture
US7026673B2 (en) * 2003-12-11 2006-04-11 International Business Machines Corporation Low magnetization materials for high performance magnetic memory devices
US7252852B1 (en) 2003-12-12 2007-08-07 International Business Machines Corporation Mg-Zn oxide tunnel barriers and method of formation
US6980466B2 (en) * 2004-01-15 2005-12-27 Hewlett-Packard Development Company, L.P. Soft-reference four conductor magnetic memory storage device
US7102920B2 (en) * 2004-03-23 2006-09-05 Hewlett-Packard Development Company, L.P. Soft-reference three conductor magnetic memory storage device
US7339813B2 (en) * 2004-09-30 2008-03-04 Sharp Laboratories Of America, Inc. Complementary output resistive memory cell
US20090218559A1 (en) * 2008-02-29 2009-09-03 Ulrich Klostermann Integrated Circuit, Memory Cell Array, Memory Module, and Method of Manufacturing an Integrated Circuit
US7760542B2 (en) 2008-04-21 2010-07-20 Seagate Technology Llc Spin-torque memory with unidirectional write scheme
US7751231B2 (en) * 2008-05-05 2010-07-06 Qimonda Ag Method and integrated circuit for determining the state of a resistivity changing memory cell
US8233319B2 (en) 2008-07-18 2012-07-31 Seagate Technology Llc Unipolar spin-transfer switching memory unit
US7933146B2 (en) 2008-10-08 2011-04-26 Seagate Technology Llc Electronic devices utilizing spin torque transfer to flip magnetic orientation
US7933137B2 (en) 2008-10-08 2011-04-26 Seagate Teachnology Llc Magnetic random access memory (MRAM) utilizing magnetic flip-flop structures
US7940592B2 (en) 2008-12-02 2011-05-10 Seagate Technology Llc Spin-torque bit cell with unpinned reference layer and unidirectional write current
EP2276034B1 (en) * 2009-07-13 2016-04-27 Crocus Technology S.A. Self-referenced magnetic random access memory cell
EP2575135B1 (en) * 2011-09-28 2015-08-05 Crocus Technology S.A. Magnetic random access memory (MRAM) cell and method for reading the MRAM cell using a self-referenced read operation
US9047945B2 (en) * 2012-10-15 2015-06-02 Marvell World Trade Ltd. Systems and methods for reading resistive random access memory (RRAM) cells
KR20140052676A (ko) 2012-10-25 2014-05-07 삼성디스플레이 주식회사 터치 센싱 패널의 제조 방법
US10170162B2 (en) * 2017-05-23 2019-01-01 Sandisk Technologies Llc Sense amplifier calibration
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JP2001067862A (ja) * 1999-09-01 2001-03-16 Sanyo Electric Co Ltd 磁気メモリ素子
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US6404674B1 (en) * 2001-04-02 2002-06-11 Hewlett Packard Company Intellectual Property Administrator Cladded read-write conductor for a pinned-on-the-fly soft reference layer
US6466471B1 (en) * 2001-05-29 2002-10-15 Hewlett-Packard Company Low power MRAM memory array

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