JP2003110092A - モジュールタイプの三次元チップの積み重ね構造 - Google Patents

モジュールタイプの三次元チップの積み重ね構造

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Publication number
JP2003110092A
JP2003110092A JP2002172815A JP2002172815A JP2003110092A JP 2003110092 A JP2003110092 A JP 2003110092A JP 2002172815 A JP2002172815 A JP 2002172815A JP 2002172815 A JP2002172815 A JP 2002172815A JP 2003110092 A JP2003110092 A JP 2003110092A
Authority
JP
Japan
Prior art keywords
receiving plate
chip
module
type
dimensional
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002172815A
Other languages
English (en)
Inventor
Wen-Lo Hsien
文樂 謝
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Orient Semiconductor Electronics Ltd
Original Assignee
Orient Semiconductor Electronics Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Orient Semiconductor Electronics Ltd filed Critical Orient Semiconductor Electronics Ltd
Publication of JP2003110092A publication Critical patent/JP2003110092A/ja
Pending legal-status Critical Current

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    • H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/6835—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using temporarily an auxiliary support
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Abstract

(57)【要約】 【課題】 モジュールタイプの三次元チップの積み重ね
構造を提供する。 【解決手段】 第一受け板１に第一チップ１１を設置し
て、第一チップ１１と第一受け板１とをチップ覆いの接
合方式で電気導通するように接続し、第一受け板１の底
面に第二チップ２１を設置して、第二チップ２１と第二
受け板２とをチップ覆いの接合方式で電気導通するよう
に接続し、第一受け板１と第二受け板２との内側に第一
フレキシブル回路基板５を異方向性の電気導通のフイル
ム又は膠１４、２４で接続することで、基本の構造が形
成される。

Description

【発明の詳細な説明】
【０００１】
【発明の属する技術分野】本発明はモジュールタイプの
三次元チップの積み重ね構造に関するものである。
【０００２】
【従来の技術】従来のセミコンダクターの構造形態に
は、固定エリアの集積程度を増加するために、改めてチ
ップの規格を設計してＩ／Ｏのピンの数量を向上する手
法以外に、二つのチップを受け板に積み重ねる手法がよ
く採用されている。その構造は図１に示すように、主
に、底部にスズボール４’を設ける受け板３’（interP
oser）で金属ワイヤ１１’の接合方式を採用して、チッ
プの接合膠１３’で貼り付けた第一チップ１’を電気導
通するように接合させる。その次にチップの接合膠２
３’で、第一チップ１’に第二チップ２’を貼り付け
る。のちに、第二チップ２’の足ペド２１’に金属ワイ
ヤ２２’で受け板３’と電気導通するように接合する。
もう一つの既存のチップの積み重ね構造は図２に示すよ
うに、底部に突出ブロック４’を設ける受け板３’でチ
ップ覆いの接合方式を採用して、第一チップ１’の金属
突出ブロック１４’と電気導通するように接合する。そ
の次に、チップの接合膠２３’で、第一チップ１’に第
二チップ２’を貼り付ける。のちに、第二チップ２’の
足ペド２１’に金属ワイヤ２２’で受け板３’と電気導
通するように接合する。上述した従来の構造技術は密度
を向上させるが、構造設計の欠陥により所定数以上積み
重ねることができない。所定数以上積み重ねると、パッ
ケージの大きさが拡大されるので、実際に応用できな
い。
【０００３】
【発明が解決しようとする課題】したがって本発明の主
な目的は、パッケージの大きさを拡大しないで積み重ね
数を増加するモジュールタイプの三次元チップの積み重
ね構造を提供することにある。
【０００４】
【課題を解決するための手段】上記課題を解決するため
の本発明の請求項１に記載のモジュールタイプの三次元
チップの積み重ね構造は、第一受け板と、第二受け板と
を備え、第一受け板に第一チップを設置して、第一チッ
プと第一受け板とをチップ覆いの接合方式で電気導通す
るように接続させ、第一受け板の底面に第二チップを設
置して、第二チップと第二受け板とをチップ覆いの接合
方式で電気導通するように接続させ、第一フレキシブル
回路基板を第一受け板と第二受け板との内側に異なる方
向性の電気導通のフイルム／膠で接続させることで、基
本の構造となることを特徴とする。
【０００５】また、請求項２は請求項１に記載のモジュ
ールタイプの三次元チップの積み重ね構造であり、第一
受け板の底面に、スズボールを設けることを特徴とす
る。また、請求項３は請求項２に記載のモジュールタイ
プの三次元チップの積み重ね構造であり、第二受け板の
上面を受け板としてその上にチップを設置して接続させ
ることを特徴とする。
【０００６】また、請求項４は請求項２に記載のモジュ
ールタイプの三次元チップの積み重ね構造であり、第二
受け板の上面を受け板として、その上にチップを設置し
て接続させ、第二受け板の上面に第三受け板を追加して
もよく、第二受け板に第三チップを設けて接続させ、第
二フレキシブル回路基板を第二受け板と第三受け板との
内側に異なる方向性の電気導通のフイルム／膠で接続さ
せることで、積み重なる延ばし構造へ組成させることを
特徴とする。
【０００７】また、請求項５は請求項３又は４記載のモ
ジュールタイプの三次元チップの積み重ね構造であり、
チップと受け板との接合はチップ覆い接合形態を採用す
ることを特徴とする。また、請求項６は請求項３又は４
記載のモジュールタイプの三次元チップの積み重ね構造
であり、チップと受け板との接合はワイヤ接続の接合形
態を採用することを特徴とする。
【０００８】
【発明の実施の形態】本発明の目的、特徴および効果な
どを、以下にさらに具体的な実施例に図面をあわせて詳
しく説明する。まずは図３を参照する。それは本発明の
第一実施例によるモジュールタイプの三次元チップの積
み重ね構造を示す断面図であり、主に、次の要素から形
成される。
【０００９】第一受け板１：第一受け板１の底面に、ス
ズボール１５を設ける。また、第一受け板１の正面に第
一チップ１１を設置して、第一チップ１１と受け板１と
をチップ覆いの接合方式で、電気導通するように接続さ
せる。 第二受け板２：受け板の底面に第二チップ２１を設置し
て、第二チップ２１と受け板とをチップ覆いの接合方式
で、電気導通するように接続させる。
【００１０】それから、第一フレキシブル回路基板５を
第一受け板１と第二受け板２との内側に異方向性の電気
導通のフイルム／膠（ＡＣＦ、Anisotropic Conductive
Film /ＡＣＰ、Anisotropic Conductive Paste)１４、
２４で立体の構造へ接続させることで、基本の構造とな
る。
【００１１】続いて、図４を参照する。上述の基本構造
には、第二受け板２の上面に第三チップ３１を追加して
もよく、それにより第一延ばし構造３を形成してもよ
い。つまり、第二受け板２の上面を受け板としてその上
に第三チップ３１を設置して、覆いの接合方式で電気導
通するように接続させる。
【００１２】図５を参照する。前掲図３の第一延ばし構
造３には、第三受け板４０を追加してもよい。その受け
板の底側に、第四チップ４１を設けて接続させる。それ
から、第二フレキシブル回路基板６を第二受け板２と第
三受け板４０との内側に異方向性の電気導通のフイルム
／膠３４、４４で接続させることで、第二延ばし構造４
へ組成させる。
【００１３】また、上述の第二延ばし構造４は二重の基
本構造の組み合わせに限られない。空間条件の許容範囲
ならば、自由に多数層で組み合わせることができる。勿
論、上述の第一延ばし構造３は基本の構造に架設する以
外、第二延ばし構造４に実施してもよい。
【００１４】図６を参照する。それは本発明の第二実施
例によるモジュールタイプの三次元チップの積み重ね構
造であり、次の要素を含む。 第一受け板７１：第一受け板７１の底面に、スズボール
７１６を設ける。また、第一受け板７１の正面に第一チ
ップ７１１を設置して、第一チップ７１１と受け板とを
ワイヤ接続の接合方式で、電気導通するように接続させ
る。
【００１５】第二受け板７２：受け板の底面に第二チッ
プ７２１を設置して、第二チップ７２１と受け板とをワ
イヤ接続の接合方式で、電気導通するように接続させ
る。それから、第一フレキシブル回路基板７５を第一受
け板７１と第二受け板７２との内側に異方向性の電気導
通のフイルム／膠７１５、７２５で立体の構造へ接続さ
せることで、基本の構造となる。
【００１６】続いて、図７を参照する。上述の基本構造
としては、第二受け板７２の上面に第三チップ７３１を
追加してもよく、それにより第一延ばし構造７３を形成
してもよい。つまり、第二受け板７２の上面を受け板と
して、その上に第三チップ７３１を設置して、それとワ
イヤ接続の接合方式で電気導通するように接続させる。
【００１７】図８を参照する。前掲図７の第一延ばし構
造７３には、第三受け板７４０を追加してもよい。その
受け板の底側に、第四チップ７４１を設けて接続させ
る。のちに、第二フレキシブル回路基板７６を第二受け
板７２と第三受け板７４０との内側に異方向性の電気導
通のフイルム／膠７３５、７４５で接続させ、第二延ば
し構造７４へ組成させる。
【００１８】また、上述の第二延ばし構造７４は二重の
基本構造の組み合わせに限られない。空間条件の許容範
囲ならば、自由に多数層で組み合わせることができる。
勿論、上述の第一延ばし構造７３は基本の構造に架設す
る以外、第二延ばし構造７４に実施してもよい。
【００１９】
【発明の効果】要するに、ニーズに基づいて、フレキシ
ブルに積み重なる構造を創造する。
【図面の簡単な説明】
【図１】従来の二次元チップの積み重ね構造を示す断面
図である。
【図２】従来の他の二次元チップの積み重ね構造を示す
断面図である。
【図３】本発明の第一実施例によるモジュールタイプの
三次元チップの積み重ね構造においてチップ覆い方式で
のチップの接合形態の基本構造を示す断面図である。
【図４】本発明の第一実施例によるモジュールタイプの
三次元チップの積み重ね構造においてチップ覆い方式で
のチップの接合形態の第一延ばし構造を示す断面図であ
る。
【図５】本発明の第一実施例によるモジュールタイプの
三次元チップの積み重ね構造においてチップ覆い方式で
のチップの接合形態の第二延ばし構造を示す断面図であ
る。
【図６】本発明の第二実施例によるモジュールタイプの
三次元チップの積み重ね構造においてワイヤ接続方式で
のチップの接合形態の基本構造を示す断面図である。
【図７】本発明の第二実施例によるモジュールタイプの
三次元チップの積み重ね構造においてワイヤ接続方式で
のチップの接合形態の第一延ばし構造を示す断面図であ
る。
【図８】本発明の第二実施例によるモジュールタイプの
三次元チップの積み重ね構造においてワイヤ接続方式で
のチップの接合形態の第二延ばし構造を示す断面図であ
る。
【符号の説明】
１、７１ 第一受け板 ２、７２ 第二受け板 ３、７３ 第一延ばし構造 ５、７５ 第一フレキシブル回路基板 ６、７６ 第二フレキシブル回路基板 １１、７１１ 第一チップ １４、２４、３４、４４、７１５、７２５、７３５、７
４５ 異方向性の電気導通フイルム／膠 １５、７１６ スズボール ２１、７２１ 第二チップ ３１、７３１ 第三チップ ４０、７４０ 第三受け板 ４１、７４１ 第四チップ

Claims (6)

    【特許請求の範囲】
  1. 【請求項１】 第一受け板と、第二受け板とを備え、 前記第一受け板に第一チップを設置して、前記第一チッ
    プと前記第一受け板とをチップ覆いの接合方式で電気導
    通するように接続し、 前記第一受け板の底面に第二チップを設置して、前記第
    二チップと前記第二受け板とをチップ覆いの接合方式で
    電気導通するように接続し、 前記第一受け板と前記第二受け板との内側に第一フレキ
    シブル回路基板を異方向性の電気導通のフイルム又は膠
    で接続することで、基本の構造が形成されることを特徴
    とするモジュールタイプの三次元チップの積み重ね構
    造。
  2. 【請求項２】 前記第一受け板の底面に、スズボールを
    設けることを特徴とする請求項１記載のモジュールタイ
    プの三次元チップの積み重ね構造。
  3. 【請求項３】 前記第二受け板の上面を受け板として、
    その上にチップを設置して接続させることを特徴とする
    請求項２記載のモジュールタイプの三次元チップの積み
    重ね構造。
  4. 【請求項４】 前記第二受け板の上面を受け板として、
    その上にチップを設置して接続し、前記第二受け板の上
    面に第三受け板を追加し、前記第二受け板に第三チップ
    を設けて接続し、前記第二受け板と前記第三受け板との
    内側に第二フレキシブル回路基板を異方向性の電気導通
    のフイルム又は膠で接続することで、積み重なる延ばし
    構造が形成されることを特徴とする請求項２記載のモジ
    ュールタイプの三次元チップの積み重ね構造。
  5. 【請求項５】 チップと受け板との接合はチップ覆い接
    合形態を採用することを特徴とする請求項３又は４記載
    のモジュールタイプの三次元チップの積み重ね構造。
  6. 【請求項６】 チップと受け板との接合はワイヤ接続の
    接合形態を採用することを特徴とする請求項３又は４記
    載のモジュールタイプの三次元チップの積み重ね構造。
JP2002172815A 2001-09-26 2002-06-13 モジュールタイプの三次元チップの積み重ね構造 Pending JP2003110092A (ja)

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TW090123853 2001-09-26
TW90123853A TW513791B (en) 2001-09-26 2001-09-26 Modularized 3D stacked IC package

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Publication Number Publication Date
JP2003110092A true JP2003110092A (ja) 2003-04-11

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