JP2003031806A - Ｍｏｓトランジスタ及びその製造方法 - Google Patents

Ｍｏｓトランジスタ及びその製造方法

Info

Publication number
JP2003031806A
JP2003031806A JP2002116977A JP2002116977A JP2003031806A JP 2003031806 A JP2003031806 A JP 2003031806A JP 2002116977 A JP2002116977 A JP 2002116977A JP 2002116977 A JP2002116977 A JP 2002116977A JP 2003031806 A JP2003031806 A JP 2003031806A
Authority
JP
Japan
Prior art keywords
film
mos transistor
fine particles
silicon
polycrystalline silicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2002116977A
Other languages
English (en)
Japanese (ja)
Other versions
JP2003031806A5 (https=
Inventor
Naoki Kanda
直樹 神田
Arihito Ogawa
有人 小川
Eisuke Nishitani
英輔 西谷
Miwako Nakahara
美和子 中原
Masayoshi Yoshida
正義 吉田
Kiyoshi Ogata
潔 尾形
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP2002116977A priority Critical patent/JP2003031806A/ja
Priority to US10/143,192 priority patent/US6905928B2/en
Publication of JP2003031806A publication Critical patent/JP2003031806A/ja
Priority to US10/642,036 priority patent/US20040145001A1/en
Priority to US10/641,908 priority patent/US6870224B2/en
Publication of JP2003031806A5 publication Critical patent/JP2003031806A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01314—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the conductor comprising a layer of Ge, C or of compounds of Si, Ge or C contacting the insulator
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0181—Manufacturing their gate insulating layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

Landscapes

  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
JP2002116977A 2001-05-09 2002-04-19 Ｍｏｓトランジスタ及びその製造方法 Pending JP2003031806A (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2002116977A JP2003031806A (ja) 2001-05-09 2002-04-19 Ｍｏｓトランジスタ及びその製造方法
US10/143,192 US6905928B2 (en) 2001-05-09 2002-05-09 MOS transistor apparatus and method of manufacturing same
US10/642,036 US20040145001A1 (en) 2001-05-09 2003-08-15 MOS transistor devices and method of manufacturing same
US10/641,908 US6870224B2 (en) 2001-05-09 2003-08-15 MOS transistor apparatus and method of manufacturing same

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
JP2001-138520 2001-05-09
JP2001138520 2001-05-09
JP2002116977A JP2003031806A (ja) 2001-05-09 2002-04-19 Ｍｏｓトランジスタ及びその製造方法

Publications (2)

Publication Number Publication Date
JP2003031806A true JP2003031806A (ja) 2003-01-31
JP2003031806A5 JP2003031806A5 (https=) 2005-09-22

Family

ID=26614809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002116977A Pending JP2003031806A (ja) 2001-05-09 2002-04-19 Ｍｏｓトランジスタ及びその製造方法

Country Status (2)

Country Link
US (3) US6905928B2 (https=)
JP (1) JP2003031806A (https=)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2005026253A (ja) * 2003-06-30 2005-01-27 Hitachi Kokusai Electric Inc 半導体装置の製造方法
JP2006261664A (ja) * 2005-03-18 2006-09-28 Kovio Inc レーザパターニングされた金属ゲートを備えるｍｏｓトランジスタ及びそれを形成するための方法
US7172934B2 (en) 2003-05-08 2007-02-06 Sharp Kabushiki Kaisha Method of manufacturing a semiconductor device with a silicon-germanium gate electrode
JP2007165401A (ja) * 2005-12-09 2007-06-28 Nec Electronics Corp 半導体装置および半導体装置の製造方法
JP2009147388A (ja) * 2009-03-30 2009-07-02 Hitachi Kokusai Electric Inc 半導体装置の製造方法
JP2009164569A (ja) * 2007-09-11 2009-07-23 Applied Materials Inc 制御された結晶構造を用いた、ドーパント及び多層シリコン膜の使用による多結晶シリコン膜及び周囲層の応力の調節

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US7589029B2 (en) 2002-05-02 2009-09-15 Micron Technology, Inc. Atomic layer deposition and conversion
US7335552B2 (en) * 2002-05-15 2008-02-26 Raytheon Company Electrode for thin film capacitor devices
US7105425B1 (en) * 2002-05-16 2006-09-12 Advanced Micro Devices, Inc. Single electron devices formed by laser thermal annealing
KR100493018B1 (ko) * 2002-06-12 2005-06-07 삼성전자주식회사 반도체 장치의 제조방법
US6784103B1 (en) * 2003-05-21 2004-08-31 Freescale Semiconductor, Inc. Method of formation of nanocrystals on a semiconductor structure
JP2005079310A (ja) * 2003-08-29 2005-03-24 Semiconductor Leading Edge Technologies Inc 半導体装置及びその製造方法
US7296247B1 (en) * 2004-08-17 2007-11-13 Xilinx, Inc. Method and apparatus to improve pass transistor performance
JP4958408B2 (ja) * 2005-05-31 2012-06-20 三洋電機株式会社 半導体装置
US7927948B2 (en) 2005-07-20 2011-04-19 Micron Technology, Inc. Devices with nanocrystals and methods of formation
US7989290B2 (en) 2005-08-04 2011-08-02 Micron Technology, Inc. Methods for forming rhodium-based charge traps and apparatus including rhodium-based charge traps
US7575978B2 (en) 2005-08-04 2009-08-18 Micron Technology, Inc. Method for making conductive nanoparticle charge storage element
US7605030B2 (en) 2006-08-31 2009-10-20 Micron Technology, Inc. Hafnium tantalum oxynitride high-k dielectric and metal gates
US20080272437A1 (en) * 2007-05-01 2008-11-06 Doris Bruce B Threshold Adjustment for High-K Gate Dielectric CMOS
US8367506B2 (en) 2007-06-04 2013-02-05 Micron Technology, Inc. High-k dielectrics with gold nano-particles
US8598020B2 (en) * 2010-06-25 2013-12-03 Applied Materials, Inc. Plasma-enhanced chemical vapor deposition of crystalline germanium
JP5624425B2 (ja) * 2010-10-14 2014-11-12 株式会社東芝 半導体装置及びその製造方法
US10367089B2 (en) * 2011-03-28 2019-07-30 General Electric Company Semiconductor device and method for reduced bias threshold instability
US9698019B2 (en) * 2014-03-14 2017-07-04 Taiwan Semiconductor Manufacturing Company, Ltd. N-work function metal with crystal structure
JP6560112B2 (ja) * 2015-12-09 2019-08-14 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法

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FR2544752B1 (fr) * 1983-04-25 1985-07-05 Commissariat Energie Atomique Procede de croissance amorphe d'un corps avec cristallisation sous rayonnement
US4670063A (en) * 1985-04-10 1987-06-02 Eaton Corporation Semiconductor processing technique with differentially fluxed radiation at incremental thicknesses
US5424244A (en) * 1992-03-26 1995-06-13 Semiconductor Energy Laboratory Co., Ltd. Process for laser processing and apparatus for use in the same
US5444302A (en) * 1992-12-25 1995-08-22 Hitachi, Ltd. Semiconductor device including multi-layer conductive thin film of polycrystalline material
KR100362751B1 (ko) * 1994-01-19 2003-02-11 소니 가부시끼 가이샤 반도체소자의콘택트홀및그형성방법
US5809211A (en) * 1995-12-11 1998-09-15 Applied Materials, Inc. Ramping susceptor-wafer temperature using a single temperature input
TW315493B (en) * 1996-02-28 1997-09-11 Tokyo Electron Co Ltd Heating apparatus and heat treatment apparatus
KR100297498B1 (ko) * 1996-11-20 2001-10-24 윤덕용 마이크로파를이용한다결정박막의제조방법
US6066547A (en) * 1997-06-20 2000-05-23 Sharp Laboratories Of America, Inc. Thin-film transistor polycrystalline film formation by nickel induced, rapid thermal annealing method
JP4810712B2 (ja) * 1997-11-05 2011-11-09 ソニー株式会社 不揮発性半導体記憶装置及びその読み出し方法
JP3523093B2 (ja) * 1997-11-28 2004-04-26 株式会社東芝 半導体装置およびその製造方法
US6114258A (en) * 1998-10-19 2000-09-05 Applied Materials, Inc. Method of oxidizing a substrate in the presence of nitride and oxynitride films
US6437403B1 (en) * 1999-01-18 2002-08-20 Sony Corporation Semiconductor device
US6288943B1 (en) * 2000-07-12 2001-09-11 Taiwan Semiconductor Manufacturing Corporation Method for programming and reading 2-bit p-channel ETOX-cells with non-connecting HSG islands as floating gate
KR100425934B1 (ko) * 2000-12-29 2004-04-03 주식회사 하이닉스반도체 실리콘-게르마늄막 형성 방법
US6670263B2 (en) * 2001-03-10 2003-12-30 International Business Machines Corporation Method of reducing polysilicon depletion in a polysilicon gate electrode by depositing polysilicon of varying grain size
JP3997731B2 (ja) * 2001-03-19 2007-10-24 富士ゼロックス株式会社 基材上に結晶性半導体薄膜を形成する方法

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7172934B2 (en) 2003-05-08 2007-02-06 Sharp Kabushiki Kaisha Method of manufacturing a semiconductor device with a silicon-germanium gate electrode
JP2005026253A (ja) * 2003-06-30 2005-01-27 Hitachi Kokusai Electric Inc 半導体装置の製造方法
JP2006261664A (ja) * 2005-03-18 2006-09-28 Kovio Inc レーザパターニングされた金属ゲートを備えるｍｏｓトランジスタ及びそれを形成するための方法
JP2007165401A (ja) * 2005-12-09 2007-06-28 Nec Electronics Corp 半導体装置および半導体装置の製造方法
JP2009164569A (ja) * 2007-09-11 2009-07-23 Applied Materials Inc 制御された結晶構造を用いた、ドーパント及び多層シリコン膜の使用による多結晶シリコン膜及び周囲層の応力の調節
JP2009147388A (ja) * 2009-03-30 2009-07-02 Hitachi Kokusai Electric Inc 半導体装置の製造方法

Also Published As

Publication number Publication date
US6905928B2 (en) 2005-06-14
US20040145001A1 (en) 2004-07-29
US20040051139A1 (en) 2004-03-18
US6870224B2 (en) 2005-03-22
US20030183901A1 (en) 2003-10-02

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