JP2002538624A5 - - Google Patents

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Publication number
JP2002538624A5
JP2002538624A5 JP2000603088A JP2000603088A JP2002538624A5 JP 2002538624 A5 JP2002538624 A5 JP 2002538624A5 JP 2000603088 A JP2000603088 A JP 2000603088A JP 2000603088 A JP2000603088 A JP 2000603088A JP 2002538624 A5 JP2002538624 A5 JP 2002538624A5
Authority
JP
Japan
Prior art keywords
underfill material
integrated circuit
substrate
underfill
processing station
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000603088A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002538624A (ja
Filing date
Publication date
Priority claimed from US09/262,132 external-priority patent/US6528345B1/en
Application filed filed Critical
Publication of JP2002538624A publication Critical patent/JP2002538624A/ja
Publication of JP2002538624A5 publication Critical patent/JP2002538624A5/ja
Pending legal-status Critical Current

Links

JP2000603088A 1999-03-03 2000-02-08 制御崩壊チップ接続（ｃ４）集積回路パッケージをアンダーフィルするプロセス・ライン Pending JP2002538624A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US09/262,132 1999-03-03
US09/262,132 US6528345B1 (en) 1999-03-03 1999-03-03 Process line for underfilling a controlled collapse
PCT/US2000/003243 WO2000052751A1 (en) 1999-03-03 2000-02-08 A process line for underfilling a controlled collapse chip connection (c4) integrated circuit package

Publications (2)

Publication Number Publication Date
JP2002538624A JP2002538624A (ja) 2002-11-12
JP2002538624A5 true JP2002538624A5 (enExample) 2007-03-15

Family

ID=22996282

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000603088A Pending JP2002538624A (ja) 1999-03-03 2000-02-08 制御崩壊チップ接続（ｃ４）集積回路パッケージをアンダーフィルするプロセス・ライン

Country Status (7)

Country Link
US (1) US6528345B1 (enExample)
JP (1) JP2002538624A (enExample)
KR (1) KR100438991B1 (enExample)
CN (1) CN1171296C (enExample)
AU (1) AU2986100A (enExample)
MX (1) MXPA01008581A (enExample)
WO (1) WO2000052751A1 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6833629B2 (en) 2001-12-14 2004-12-21 National Starch And Chemical Investment Holding Corporation Dual cure B-stageable underfill for wafer level
US7238550B2 (en) * 2002-02-26 2007-07-03 Tandon Group Ltd. Methods and apparatus for fabricating Chip-on-Board modules
US6798806B1 (en) * 2002-09-03 2004-09-28 Finisar Corporation Hybrid mirror VCSELs
US7242097B2 (en) 2003-06-30 2007-07-10 Intel Corporation Electromigration barrier layers for solder joints
US7026376B2 (en) * 2003-06-30 2006-04-11 Intel Corporation Fluxing agent for underfill materials
US20050121310A1 (en) * 2003-12-03 2005-06-09 Intel Corporation Method and substrate to control flow of underfill
JP5262045B2 (ja) * 2007-09-27 2013-08-14 富士通セミコンダクター株式会社 電極の形成方法及び半導体装置の製造方法
US7915732B2 (en) * 2008-06-30 2011-03-29 International Business Mahines Corporation Production of integrated circuit chip packages prohibiting formation of micro solder balls

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US5990552A (en) 1997-02-07 1999-11-23 Intel Corporation Apparatus for attaching a heat sink to the back side of a flip chip package
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US6238948B1 (en) 1999-03-03 2001-05-29 Intel Corporation Controlled collapse chip connection (C4) integrated circuit package that has a fillet which seals an underfill material

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