JP2002304880A5 - - Google Patents

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Publication number
JP2002304880A5
JP2002304880A5 JP2002019411A JP2002019411A JP2002304880A5 JP 2002304880 A5 JP2002304880 A5 JP 2002304880A5 JP 2002019411 A JP2002019411 A JP 2002019411A JP 2002019411 A JP2002019411 A JP 2002019411A JP 2002304880 A5 JP2002304880 A5 JP 2002304880A5
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JP
Japan
Prior art keywords
blocking
shared
information storage
memory elements
storage device
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Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2002019411A
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English (en)
Japanese (ja)
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JP2002304880A (ja
JP4474087B2 (ja
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Publication date
Priority claimed from US09/771,857 external-priority patent/US6356477B1/en
Application filed filed Critical
Publication of JP2002304880A publication Critical patent/JP2002304880A/ja
Publication of JP2002304880A5 publication Critical patent/JP2002304880A5/ja
Application granted granted Critical
Publication of JP4474087B2 publication Critical patent/JP4474087B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2002019411A 2001-01-29 2002-01-29 回り込み電流を阻止する共有デバイスを含むクロスポイントメモリアレイ Expired - Fee Related JP4474087B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US09/771,857 US6356477B1 (en) 2001-01-29 2001-01-29 Cross point memory array including shared devices for blocking sneak path currents
US771857 2001-01-29

Publications (3)

Publication Number Publication Date
JP2002304880A JP2002304880A (ja) 2002-10-18
JP2002304880A5 true JP2002304880A5 (enExample) 2005-03-03
JP4474087B2 JP4474087B2 (ja) 2010-06-02

Family

ID=25093157

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002019411A Expired - Fee Related JP4474087B2 (ja) 2001-01-29 2002-01-29 回り込み電流を阻止する共有デバイスを含むクロスポイントメモリアレイ

Country Status (8)

Country Link
US (1) US6356477B1 (enExample)
EP (1) EP1227495B1 (enExample)
JP (1) JP4474087B2 (enExample)
KR (1) KR100878306B1 (enExample)
CN (1) CN1213453C (enExample)
DE (1) DE60137403D1 (enExample)
HK (1) HK1048703B (enExample)
TW (1) TW520498B (enExample)

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US20060171200A1 (en) * 2004-02-06 2006-08-03 Unity Semiconductor Corporation Memory using mixed valence conductive oxides
US7203129B2 (en) * 2004-02-16 2007-04-10 Taiwan Semiconductor Manufacturing Company, Ltd. Segmented MRAM memory array
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US7221584B2 (en) * 2004-08-13 2007-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. MRAM cell having shared configuration
WO2006041430A1 (en) * 2004-09-17 2006-04-20 Hewlett-Packard Development Company, L.P. Data storage device and method of forming the same
EP1792149B1 (en) * 2004-09-22 2010-03-31 Nantero, Inc. Random access memory including nanotube switching elements
JP2006127583A (ja) * 2004-10-26 2006-05-18 Elpida Memory Inc 不揮発性半導体記憶装置及び相変化メモリ
US7142471B2 (en) * 2005-03-31 2006-11-28 Sandisk 3D Llc Method and apparatus for incorporating block redundancy in a memory array
US7359279B2 (en) * 2005-03-31 2008-04-15 Sandisk 3D Llc Integrated circuit memory array configuration including decoding compatibility with partial implementation of multiple memory layers
US7054219B1 (en) 2005-03-31 2006-05-30 Matrix Semiconductor, Inc. Transistor layout configuration for tight-pitched memory array lines
US7272052B2 (en) * 2005-03-31 2007-09-18 Sandisk 3D Llc Decoding circuit for non-binary groups of memory line drivers
US20070132049A1 (en) * 2005-12-12 2007-06-14 Stipe Barry C Unipolar resistance random access memory (RRAM) device and vertically stacked architecture
US7680170B2 (en) * 2006-06-15 2010-03-16 Oclaro Photonics, Inc. Coupling devices and methods for stacked laser emitter arrays
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US8289662B2 (en) * 2008-05-20 2012-10-16 International Business Machines Corporation Tunnel junction resistor for high resistance devices and systems using the same
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