JP2002043201A - 半導体装置の製造方法及び半導体装置 - Google Patents

半導体装置の製造方法及び半導体装置

Info

Publication number
JP2002043201A
JP2002043201A JP2000229206A JP2000229206A JP2002043201A JP 2002043201 A JP2002043201 A JP 2002043201A JP 2000229206 A JP2000229206 A JP 2000229206A JP 2000229206 A JP2000229206 A JP 2000229206A JP 2002043201 A JP2002043201 A JP 2002043201A
Authority
JP
Japan
Prior art keywords
alignment
forming
insulating film
interlayer insulating
opening
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2000229206A
Other languages
English (en)
Japanese (ja)
Other versions
JP2002043201A5 (https=
Inventor
Masakazu Okada
昌和 岡田
Keiichi Higashiya
恵市 東谷
Hiroyuki Chibahara
宏幸 千葉原
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2000229206A priority Critical patent/JP2002043201A/ja
Priority to US09/800,579 priority patent/US6383910B2/en
Publication of JP2002043201A publication Critical patent/JP2002043201A/ja
Publication of JP2002043201A5 publication Critical patent/JP2002043201A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/501—Marks applied to devices, e.g. for alignment or identification for use before dicing

Landscapes

  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2000229206A 2000-07-28 2000-07-28 半導体装置の製造方法及び半導体装置 Pending JP2002043201A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2000229206A JP2002043201A (ja) 2000-07-28 2000-07-28 半導体装置の製造方法及び半導体装置
US09/800,579 US6383910B2 (en) 2000-07-28 2001-03-08 Method of manufacturing a semiconductor device, and a semiconductor device manufactured thereby

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000229206A JP2002043201A (ja) 2000-07-28 2000-07-28 半導体装置の製造方法及び半導体装置

Publications (2)

Publication Number Publication Date
JP2002043201A true JP2002043201A (ja) 2002-02-08
JP2002043201A5 JP2002043201A5 (https=) 2007-08-30

Family

ID=18722366

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000229206A Pending JP2002043201A (ja) 2000-07-28 2000-07-28 半導体装置の製造方法及び半導体装置

Country Status (2)

Country Link
US (1) US6383910B2 (https=)
JP (1) JP2002043201A (https=)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916743B2 (en) 2001-07-19 2005-07-12 Sanyo Electric Co., Ltd. Semiconductor device and method for manufacturing thereof
US7465604B2 (en) 2004-07-01 2008-12-16 Samsung Electronics Co., Ltd. Methods of fabricating alignment key structures in semiconductor devices including protected electrode structures
JP2011238652A (ja) * 2010-05-06 2011-11-24 Renesas Electronics Corp 半導体装置およびその製造方法

Families Citing this family (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6774452B1 (en) 2002-12-17 2004-08-10 Cypress Semiconductor Corporation Semiconductor structure having alignment marks with shallow trench isolation
DE10324052B4 (de) * 2003-05-27 2007-06-28 Infineon Technologies Ag Verfahren zur Herstellung eines Halbleiterspeichers mit Charge-Trapping-Speicherzellen
US7244653B2 (en) * 2004-03-23 2007-07-17 United Microelectronics Corporation Method and structure in the manufacture of mask read only memory
US7196429B2 (en) * 2004-04-26 2007-03-27 Macronix International Co., Ltd. Method of reducing film stress on overlay mark
JP5509543B2 (ja) * 2008-06-02 2014-06-04 富士電機株式会社 半導体装置の製造方法
US8129270B1 (en) * 2008-12-10 2012-03-06 Novellus Systems, Inc. Method for depositing tungsten film having low resistivity, low roughness and high reflectivity
US9548228B2 (en) 2009-08-04 2017-01-17 Lam Research Corporation Void free tungsten fill in different sized features
US9034768B2 (en) 2010-07-09 2015-05-19 Novellus Systems, Inc. Depositing tungsten into high aspect ratio features
US12444651B2 (en) 2009-08-04 2025-10-14 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US10256142B2 (en) 2009-08-04 2019-04-09 Novellus Systems, Inc. Tungsten feature fill with nucleation inhibition
US9653353B2 (en) 2009-08-04 2017-05-16 Novellus Systems, Inc. Tungsten feature fill
CN102509696B (zh) * 2011-10-28 2016-04-06 上海华虹宏力半导体制造有限公司 对准标记的形成方法
US9082826B2 (en) 2013-05-24 2015-07-14 Lam Research Corporation Methods and apparatuses for void-free tungsten fill in three-dimensional semiconductor features
US9972504B2 (en) 2015-08-07 2018-05-15 Lam Research Corporation Atomic layer etching of tungsten for enhanced tungsten deposition fill
US9978610B2 (en) 2015-08-21 2018-05-22 Lam Research Corporation Pulsing RF power in etch process to enhance tungsten gapfill performance
US10566211B2 (en) 2016-08-30 2020-02-18 Lam Research Corporation Continuous and pulsed RF plasma for etching metals
CN113467188B (zh) * 2020-03-30 2022-05-13 长鑫存储技术有限公司 半导体结构及其制备方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09162102A (ja) * 1995-12-07 1997-06-20 Mitsubishi Electric Corp アライメントマーク検出方法
JPH09199591A (ja) * 1996-01-23 1997-07-31 Ricoh Co Ltd 半導体装置の製造方法
JPH09223656A (ja) * 1996-02-16 1997-08-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH10177944A (ja) * 1996-12-18 1998-06-30 Sony Corp 半導体装置の製造方法
JPH1167894A (ja) * 1997-08-25 1999-03-09 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH1187262A (ja) * 1997-09-03 1999-03-30 Toshiba Corp 半導体装置及びその製造方法
JP2000031114A (ja) * 1998-06-25 2000-01-28 Samsung Electron Co Ltd 半導体素子の製造方法及び半導体素子

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0682762B2 (ja) 1988-09-27 1994-10-19 日本電気株式会社 半導体装置
US5173438A (en) * 1991-02-13 1992-12-22 Micron Technology, Inc. Method of performing a field implant subsequent to field oxide fabrication by utilizing selective tungsten deposition to produce encroachment-free isolation
JP3111924B2 (ja) * 1997-04-11 2000-11-27 日本電気株式会社 半導体装置の製造方法
US6232228B1 (en) * 1998-06-25 2001-05-15 Samsung Electronics Co., Ltd. Method of manufacturing semiconductor devices, etching composition for manufacturing semiconductor devices, and semiconductor devices made using the method
JP3516593B2 (ja) * 1998-09-22 2004-04-05 シャープ株式会社 半導体装置及びその製造方法

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09162102A (ja) * 1995-12-07 1997-06-20 Mitsubishi Electric Corp アライメントマーク検出方法
JPH09199591A (ja) * 1996-01-23 1997-07-31 Ricoh Co Ltd 半導体装置の製造方法
JPH09223656A (ja) * 1996-02-16 1997-08-26 Matsushita Electric Ind Co Ltd 半導体装置の製造方法
JPH10177944A (ja) * 1996-12-18 1998-06-30 Sony Corp 半導体装置の製造方法
JPH1167894A (ja) * 1997-08-25 1999-03-09 Mitsubishi Electric Corp 半導体装置及びその製造方法
JPH1187262A (ja) * 1997-09-03 1999-03-30 Toshiba Corp 半導体装置及びその製造方法
JP2000031114A (ja) * 1998-06-25 2000-01-28 Samsung Electron Co Ltd 半導体素子の製造方法及び半導体素子

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6916743B2 (en) 2001-07-19 2005-07-12 Sanyo Electric Co., Ltd. Semiconductor device and method for manufacturing thereof
US7465604B2 (en) 2004-07-01 2008-12-16 Samsung Electronics Co., Ltd. Methods of fabricating alignment key structures in semiconductor devices including protected electrode structures
JP2011238652A (ja) * 2010-05-06 2011-11-24 Renesas Electronics Corp 半導体装置およびその製造方法

Also Published As

Publication number Publication date
US20020016059A1 (en) 2002-02-07
US6383910B2 (en) 2002-05-07

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